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* | TI: Rework SRAM definitions and maximumsTom Rini2016-09-06-51/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On all TI platforms the ROM defines a "downloaded image" area at or near the start of SRAM which is followed by a reserved area. As it is at best bad form and at worst possibly harmful in corner cases to write in this reserved area, we stop doing that by adding in the define NON_SECURE_SRAM_IMG_END to say where the end of the downloaded image area is and make SRAM_SCRATCH_SPACE_ADDR be one kilobyte before this. At current we define the end of scratch space at 0x228 bytes past the start of scratch space this this gives us a lot of room to grow. As these scratch uses are non-optional today, all targets are modified to respect this boundary. Tested on OMAP4 Pandaboard, OMAP3 Beagle xM Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Nagendra T S <nagendra@mistralsolutions.com> Cc: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Felipe Balbi <balbi@ti.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Paul Kocialkowski <contact@paulk.fr> Cc: Enric Balletbo i Serra <eballetbo@gmail.com> Cc: Adam Ford <aford173@gmail.com> Cc: Steve Sakoman <sakoman@gmail.com> Cc: Stefan Roese <sr@denx.de> Cc: Thomas Weber <weber@corscience.de> Cc: Hannes Schmelzer <oe5hpm@oevsv.at> Cc: Thomas Chou <thomas@wytron.com.tw> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Simon Glass <sjg@chromium.org> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Sam Protsenko <semen.protsenko@linaro.org> Cc: Heiko Schocher <hs@denx.de> Cc: Samuel Egli <samuel.egli@siemens.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Cc: Ben Whitten <ben.whitten@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Sekhar Nori <nsekhar@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: "B, Ravi" <ravibabu@ti.com> Cc: "Matwey V. Kornilov" <matwey.kornilov@gmail.com> Cc: Ladislav Michl <ladis@linux-mips.org> Cc: Ash Charles <ashcharles@gmail.com> Cc: "Kipisz, Steven" <s-kipisz2@ti.com> Cc: Daniel Allred <d-allred@ti.com> Signed-off-by: Tom Rini <trini@konsulko.com> Tested-by: Lokesh Vutla <lokeshvutla@ti.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Ladislav Michl <ladis@linux-mips.org>
* | board/BuR/common: increase NET_RETRY_COUNT to 10Hannes Schmelzer2016-09-06-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Sometimes boards may need more time to become stable network connection due to several reasons: - phy speed - link-partner (switch) Therefore we increase the retry-count to 10 for making sure that network connection works always. Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at> Reviewed-by: Tom Rini <trini@konsulko.com>
* | arm: dts: update DTS files for meson-gxbb and odroid-c2Beniamino Galvani2016-09-06-0/+364
| | | | | | | | | | | | | | Import DTS files and dt-bindings includes from Linux 4.8-rc1. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | serial: bcm283x_mu: Detect disabled serial deviceAlexander Graf2016-09-06-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On the raspberry pi, you can disable the serial port to gain dynamic frequency scaling which can get handy at times. However, in such a configuration the serial controller gets its rx queue filled up with zero bytes which then happily get transmitted on to whoever calls getc() today. This patch adds detection logic for that case by checking whether the RX pin is mapped to GPIO15 and disables the mini uart if it is not mapped properly. That way we can leave the driver enabled in the tree and can determine during runtime whether serial is usable or not, having a single binary that allows for uart and non-uart operation. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* | Revert "sunxi: Move the SPL stack top to 0x1A000 on Allwinner A64/A80"Andre Przywara2016-09-06-2/+3
|/ | | | | | | | | | | | | | | | | | | | This commit moved the SPL stack into SRAM C, which worked when the SPL set the AHB1 clock down to 100 MHz to cope with the flaky SRAM C access from the CPU. However booting with boot0 (and thus not using SPL at all) we still run with a 200 MHz AHB1, so any access to SRAM C is prone to fail. Since this commit does _not_ only affect the SPL code, but also the U-Boot proper, we fail when booting with boot0. As the introduction of tiny-printf reduced the size of the SPL, we can afford to have the SPL stack in SRAM A1. This reverts commit 1a83fb4a17d959d7b037999ab7ed7e62429abe34 and fixes booting the Pine64 when using boot0. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* ARM: tegra: Add support for TK1-SOM board from Colorado EngineeringPeter Chubb2016-09-01-0/+73
| | | | | | | | | | | | | | The Colorado TK1 SOM is a small form factor board similar to the Jetson TK1. The main differences lie in the pinmux, and in that the PCIe controller is set to use in 4lanes+1lane, rather than 2+2. The pinmux header here was generated from a spreadsheet provided by Colorado Engineering using the tegra-pinmux scripts. The spreadsheet was converted from v09 to v11 by me. Signed-off-by: Peter Chubb <peter.chubb@data61.csiro.au> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* x86: efi: Fix EFI 64-bit payload build warningsBin Meng2016-08-30-12/+20
| | | | | | | | | | | | | | | | | There are lots of warnings when building EFI 64-bit payload. include/asm-generic/bitops/__fls.h:17:2: warning: left shift count >= width of type if (!(word & (~0ul << 32))) { ^ In fact, U-Boot itself as EFI payload is running in 32-bit mode. So BITS_PER_LONG needs to still be 32, but EFI status codes are 64-bit when booting from 64-bit EFI. Introduce EFI_BITS_PER_LONG to bridge those status codes with U-Boot's BITS_PER_LONG. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: efi: payload: Make EFI payload build againBin Meng2016-08-30-1/+1
| | | | | | | | Since commit 73c5c39 "Makefile: Drop unnecessary -dtb suffixes", EFI payload does not build anymore. This fixes the build. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-uniphierTom Rini2016-08-28-0/+1
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| * ARM: uniphier: support system reset functionality for PSCIMasahiro Yamada2016-08-28-0/+1
| | | | | | | | | | | | | | | | | | | | This supports the system reset via PSCI for ARMv7 SoCs. Because the system reset is not supported on PSCI 0.1, let's define CONFIG_ARMV7_PSCI_1_0. (it is supported since PSCI 0.2, but there is no CONFIG to enable it in U-Boot for now.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2016-08-26-0/+248
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| * | sunxi: Sync dts files with upstream kernelHans de Goede2016-08-26-0/+248
| |/ | | | | | | | | | | | | | | | | | | | | | | | | Sync dts files with the current (Aug 18th 2016) state of Maxime's linux/sunxi/for-next repo. Note this commit also updates configs/MSI_Primo81_defconfig, adding: "# CONFIG_REQUIRE_SERIAL_CONSOLE is not set", this is necessary because the tablet does not have a reachable uart so the dts sync drops its serial0 alias. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | ARM: Move SYS_CACHELINE_SIZE over to KconfigTom Rini2016-08-26-136/+0
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This series moves the CONFIG_SYS_CACHELINE_SIZE. First, in nearly all cases we are mirroring the values used by the Linux Kernel here. Also, so long as (and in this case, it is true) we implement flushes in hunks that are no larger than the smallest implementation (and given that we mirror the Linux Kernel, again we are fine) it is OK to align higher. The biggest changes here are that we always use 64 bytes for CPU_V7 even if for example the underlying core is only 32 bytes (this mirrors Linux). Second, we say ARM64 uses 64 bytes not 128 (as found in the Linux Kernel) as we do not need multi-platform support (to this degree) and only the Cavium ThunderX 88xx series has a use for such large alignment. Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Stefan Roese <sr@denx.de> Cc: Nagendra T S <nagendra@mistralsolutions.com> Cc: Vaibhav Hiremath <hvaibhav@ti.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com> Cc: Steve Rae <steve.rae@raedomain.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Stefan Agner <stefan.agner@toradex.com> Acked-by: Heiko Schocher <hs@denx.de> Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Cc: Peter Griffin <peter.griffin@linaro.org> Acked-by: Paul Kocialkowski <contact@paulk.fr> Cc: Anatolij Gustschin <agust@denx.de> Acked-by: "Pali Rohár" <pali.rohar@gmail.com> Cc: Adam Ford <aford173@gmail.com> Cc: Steve Sakoman <sakoman@gmail.com> Cc: Grazvydas Ignotas <notasas@gmail.com> Cc: Nishanth Menon <nm@ti.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Robert Baldyga <r.baldyga@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Thomas Weber <weber@corscience.de> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: David Feng <fenghua@phytium.com.cn> Cc: Alison Wang <b18965@freescale.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Simon Glass <sjg@chromium.org> Cc: York Sun <york.sun@nxp.com> Cc: Shengzhou Liu <Shengzhou.Liu@nxp.com> Cc: Mingkai Hu <mingkai.hu@nxp.com> Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Cc: Aneesh Bansal <aneesh.bansal@freescale.com> Cc: Saksham Jain <saksham.jain@nxp.com> Cc: Qianyu Gong <qianyu.gong@nxp.com> Cc: Wang Dongsheng <dongsheng.wang@nxp.com> Cc: Alex Porosanu <alexandru.porosanu@freescale.com> Cc: Hongbo Zhang <hongbo.zhang@nxp.com> Cc: tang yuantian <Yuantian.Tang@freescale.com> Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com> Cc: Josh Wu <josh.wu@atmel.com> Cc: Bo Shen <voice.shen@atmel.com> Cc: Viresh Kumar <viresh.kumar@linaro.org> Cc: Hannes Schmelzer <oe5hpm@oevsv.at> Cc: Thomas Chou <thomas@wytron.com.tw> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Sam Protsenko <semen.protsenko@linaro.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Christophe Ricard <christophe-h.ricard@st.com> Cc: Anand Moon <linux.amoon@gmail.com> Cc: Beniamino Galvani <b.galvani@gmail.com> Cc: Carlo Caione <carlo@endlessm.com> Cc: huang lin <hl@rock-chips.com> Cc: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Cc: Xu Ziyuan <xzy.xu@rock-chips.com> Cc: "jk.kernel@gmail.com" <jk.kernel@gmail.com> Cc: "Ariel D'Alessandro" <ariel@vanguardiasur.com.ar> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Samuel Egli <samuel.egli@siemens.com> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Ian Campbell <ijc@hellion.org.uk> Cc: Siarhei Siamashka <siarhei.siamashka@gmail.com> Cc: Boris Brezillon <boris.brezillon@free-electrons.com> Cc: Andre Przywara <andre.przywara@arm.com> Cc: Bernhard Nortmann <bernhard.nortmann@web.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Ben Whitten <ben.whitten@gmail.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Alexander Graf <agraf@suse.de> Cc: Sekhar Nori <nsekhar@ti.com> Cc: Vitaly Andrianov <vitalya@ti.com> Cc: "Andrew F. Davis" <afd@ti.com> Cc: Murali Karicheri <m-karicheri2@ti.com> Cc: Carlos Hernandez <ceh@ti.com> Cc: Ladislav Michl <ladis@linux-mips.org> Cc: Ash Charles <ashcharles@gmail.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Daniel Allred <d-allred@ti.com> Cc: Gong Qianyu <Qianyu.Gong@freescale.com> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Chin Liang See <clsee@altera.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Paul Kocialkowski <contact@paulk.fr>
* spl: Remove unused CONFIG_SPL_SPI_* definitionsChris Packham2016-08-26-14/+0
| | | | | | | | | As of commit 88e34e5 ("spl: replace CONFIG_SPL_SPI_* with CONFIG_SF_DEFAULT_*") these defines are not used. Remove them to avoid confusion. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
* Merge branch 'rmobile' of git://git.denx.de/u-boot-shTom Rini2016-08-20-22/+298
|\ | | | | | | | | [trini: Drop CMD_BOOTI as it's now on by default on ARM64] Signed-off-by: Tom Rini <trini@konsulko.com>
| * ARM: rmobile: Remove duplicate configs by Kconfig in rcar-gen3-common.hNobuhiro Iwamatsu2016-08-17-7/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | This commit remove dupilicate following configs from rcar-gen3-common.h. - CONFIG_CMD_BOOTZ - CONFIG_BOOTDELAY - CONFIG_CMD_EDITENV - CONFIG_CMD_SAVEENV - CONFIG_CMD_MEMORY - CONFIG_CMD_RUN - CONFIG_CMD_LOADS Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * arm: rmobile: Update defconfigNobuhiro Iwamatsu2016-08-17-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This updated defconfig following boards: - Alt - Gose - Koelsh - Lager - Porter - Silk - Stout - Blanche Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * arm: rmobile: Add BLANCHE board supportmasakazu.mochizuki.wd@hitachi.com2016-08-17-0/+124
| | | | | | | | | | | | | | | | | | | | BLANCHE is development board based on R-Car V2H SoC (R8A7792) This commit supports the following periherals: - SCIF, Ethernet, QSPI, MMC Signed-off-by: Masakazu Mochizuki <masakazu.mochizuki.wd@hitachi.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * ARM: rmobile: Add support salvator-x boardNobuhiro Iwamatsu2016-08-17-0/+159
| | | | | | | | | | | | | | | | Salvator-x is an entry level development board based on R-Car H3 SoC (R8A7795). This commit supports SCIF only. Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * ARM: rmobile: Add support R8A7795Nobuhiro Iwamatsu2016-08-17-0/+3
| | | | | | | | | | | | | | | | | | Renesas R8A7795 is CPU with Cortex-a57. This supports the basic register definition and GPIO and framework of PFC. Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * ARM: Rmobile: Rename CONFIG_RMOBILE to CONFIG_ARCH_RMOBILENobuhiro Iwamatsu2016-08-17-22/+22
| | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | fastboot: move to KconfigSteve Rae2016-08-20-16/+0
| | | | | | | | | | | | | | - move bcm23550_w1d to Kconfig - move bcm28155_ap to Kconfig Signed-off-by: Steve Rae <steve.rae@raedomain.com>
* | cmd: booti: move CONFIG_CMD_BOOTI to KconfigMasahiro Yamada2016-08-20-6/+0
| | | | | | | | | | | | | | | | | | | | This command is used to boot ARM64 Linux. I made DISTRO_DEFAULTS select this option for ARM64 to respect include/config_distro_defaults.h. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* | tests: Introduce DT overlay testsMaxime Ripard2016-08-20-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | This adds a bunch of unit tests for the "fdt apply" command. They've all been run successfully in the sandbox. However, as you still require an out-of-tree dtc with overlay support, this is disabled by default. Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* | libfdt: Add overlay application functionMaxime Ripard2016-08-20-0/+30
| | | | | | | | | | | | | | | | | | | | The device tree overlays are a good way to deal with user-modifyable boards or boards with some kind of an expansion mechanism where we can easily plug new board in (like the BBB, the Raspberry Pi or the CHIP). Add a new function to merge overlays with a base device tree. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* | libfdt: Add fdt_setprop_inplace_namelen_partialMaxime Ripard2016-08-20-0/+21
| | | | | | | | | | | | | | | | | | | | Add a function to modify inplace only a portion of a property.. This is especially useful when the property is an array of values, and you want to update one of them without changing the DT size. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Simon Glass <sjg@chromium.org>
* | libfdt: Add fdt_getprop_namelen_wMaxime Ripard2016-08-20-0/+7
| | | | | | | | | | | | | | Add a function to retrieve a writeable property only by the first characters of its name. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* | libfdt: Add fdt_path_offset_namelenMaxime Ripard2016-08-20-1/+15
| | | | | | | | | | | | | | | | Add a namelen variant of fdt_path_offset to retrieve the node offset using only a fixed number of characters. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* | libfdt: Add max phandle retrieval functionMaxime Ripard2016-08-20-0/+13
| | | | | | | | | | | | | | | | Add a function to retrieve the highest phandle in a given device tree. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Stefan Agner <stefan@agner.ch> Acked-by: Simon Glass <sjg@chromium.org>
* | libfdt: Add iterator over propertiesMaxime Ripard2016-08-20-0/+24
| | | | | | | | | | | | | | | | | | Implement a macro based on fdt_first_property_offset and fdt_next_property_offset that provides a convenience to iterate over all the properties of a given node. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Simon Glass <sjg@chromium.org>
* | libfdt: Add new headers and definesMaxime Ripard2016-08-20-0/+6
| | | | | | | | | | | | | | | | | | | | The libfdt overlay support introduces a bunch of new includes and functions. Make sure we are able to build it by adding the needed glue. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Simon Glass <sjg@chromium.org>
* | vsprintf: Include stdarg for va_listMaxime Ripard2016-08-20-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | vsprintf.h doesn't include the stdarg.h file, which means that it relies on the files that include vsprintf.h to include stdarg.h as well. Add an explicit include to avoid build errors when simply including that file. Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* | x86: Add DFI BT700 BayTrail board supportStefan Roese2016-08-16-0/+74
| | | | | | | | | | | | | | | | | | | | This patch adds support for the DFI BayTrail BT700 QSeven SoM installed on the DFI Q7X-151 baseboard. The baseboard is equipped with the Nuvoton NCT6102D Super IO chip providing the UART as console. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | x86: conga-qeval20-qa3: Add SMBus support and SMSC2513 config codeStefan Roese2016-08-16-5/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch includes the following changes: - Remove Designware I2C support from dts as its not used - Configure SMBus PADs in dts - Enable I2C commands and I2C support - Configure SMSC2513 USB hub via SMBus upon startup - Move environment location to match Minnowmax example - Enhancement of the default environment Signed-off-by: Stefan Roese <sr@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | misc: Add simple driver for some Nuvoton NCT6102D devicesStefan Roese2016-08-16-0/+34
| | | | | | | | | | | | | | | | | | | | | | This simple driver provides some functions to control some of the integrated devices. The watchdog is enabled per default. This driver adds a function to disable the watchdog. Also the internal legacy UART (io address 0x3f8/0x2f8) is enabled per default. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org>
* | xtensa: add support for the 'xtfpga' evaluation boardChris Zankel2016-08-15-0/+268
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 'xtfpga' board is actually a set of FPGA evaluation boards that can be configured to run an Xtensa processor. - Avnet Xilinx LX60 - Avnet Xilinx LX110 - Avnet Xilinx LX200 - Xilinx ML605 - Xilinx KC705 These boards share the same components (open-ethernet, ns16550 serial, lcd display, flash, etc.). Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* | xtensa: add support for the xtensa processor architecture [1/2]Chris Zankel2016-08-15-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The Xtensa processor architecture is a configurable, extensible, and synthesizable 32-bit RISC processor core provided by Cadence. This is the first part of the basic architecture port with changes to common files. The 'arch/xtensa' directory, and boards and additional drivers will be in separate commits. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-atmelTom Rini2016-08-15-1/+3
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| * | mmc: atmel_sdhci: Convert to the driver model supportWenyou Yang2016-08-15-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the driver to the driver model while retaining the existing legacy code. This allows the driver to support boards that have converted to driver model as well as those that have not. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Heiko Schocher <hs@denx.de>
| * | clk.h: inline clk_get_by_name()Andreas Bießmann2016-08-15-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix compile warning for non OF_CONTROL builds: ---8<--- In file included from /Volumes/devel/u-boot/drivers/gpio/atmel_pio4.c:10:0: /Volumes/devel/u-boot/include/clk.h:107:12: warning: 'clk_get_by_name' defined but not used [-Wunused-function] --->8--- Signed-off-by: Andreas Bießmann <andreas@biessmann.org> Acked-by: Stephen Warren <swarren@nvidia.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini2016-08-15-18/+28
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| * | | net: mii: Clean up legacy glue that is not usedJoe Hershberger2016-08-15-13/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The cleanup of the legacy mii registration API that's no longer used now that the drivers have been converted to use the (more) modern API. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | | net: mii: Changes not made by spatchJoe Hershberger2016-08-15-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the functions passed to the registration function are not in the same C file (extern) then spatch will not handle the dependent changes. Make those changes manually. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> For the 4xx related files: Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | | net/ethoc: support private memory configurationsMax Filippov2016-08-15-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ethoc device can be configured to have a private memory region instead of having access to the main memory. In that case egress packets must be copied into that memory for transmission and pointers to that memory need to be passed to net_process_received_packet or returned from the recv callback. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | | net/ethoc: add CONFIG_DM_ETH supportMax Filippov2016-08-15-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Extract reusable parts from ethoc_init, ethoc_set_mac_address, ethoc_send and ethoc_receive, move the rest under #ifdef CONFIG_DM_ETH. Add U_BOOT_DRIVER, eth_ops structure and implement required methods. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | | net/ethoc: add Kconfig entry for the driverMax Filippov2016-08-15-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add Kconfig entry for the driver, remove #define CONFIG_ETHOC from the only board configuration that uses it and put it into that board's defconfig. Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | | net: macb: Fix build error for CONFIG_DM_ETH enabledWenyou Yang2016-08-15-0/+4
| |/ / | | | | | | | | | | | | | | | | | | | | | Use the right phy_connect() prototype for CONFIGF_DM_ETH. Support to get the phy interface from dt and set GMAC_UR. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | ARM: tegra: fix trimslice environment locationStephen Warren2016-08-15-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Trimslice currently stores its environment at 512KiB into the SPI flash chip. The U-Boot binary has grown such that the size of the boot image (which includes the Tegra BCT, padding, and the U-Boot binary) is slightly larger than 512K now. Consequently, writing the boot image to flash corrupts the saved environment, and equally, writing to or erasing the environment will corrupt the bootloader, which in turn will cause the Tegra boot ROM to enter recovery mode during boot, making it look as if the system is non-operational. Note that tegra-uboot-flasher writes to the environment during the flashing process. Solve this by moving the environment as high as possible in flash. This will allow the U-Boot binary to roughly double in size before this problem is hit again, at which point there's nothing we can do anyway since the binary won't fit into flash. 99% of other Tegra boards store the environment in eMMC and use a negative value for CONFIG_ENV_OFFSET, which already automatically places the environment as near the end of boot flash as possible. The 1 remaining board hard-codes CONFIG_ENV_OFFSET to 2MiB, which allows for plenty more bloat. Reported-by: Stephen L Arnold <nerdboy@gentoo.org> Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | ARM: tegra: enable PCIe controller on p2771-0000Stephen Warren2016-08-15-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | p2771-0000 has a couple of PCIe ports; one physically x4 desktop PCI connector (which may run at x2 electrically, depending on the board version and configuration) and a x1 connection to the M.2 slot (which may not be active, depending on the board version and configuration). This change enables those. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | ARM: tegra: enable I2C buses for P2771-0000Bryan Wu2016-08-15-0/+3
|/ / | | | | | | | | | | | | | | | | | | Enable I2C devices in DT and enable building tegra_i2c.c driver. Signed-off-by: Bryan Wu <pengw@nvidia.com> (swarren, commit msg rework, fixed DT node sort order) Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
generated by cgit v1.1 at 2024-07-15 22:13:45 +0000