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* 85xx: Added P1020 Processor Support.Poonam Aggrwal2009-08-28-0/+2
| | | | | | | | | | | | | | P1020 is another member of QorIQ series of processors which falls in ULE category. It is an e500 based dual core SOC. Being a scaled down version of P2020 it has following differences: - 533MHz - 800MHz core frequency. - 256Kbyte L2 cache - Ethernet controllers with classification capabilities. Also the SOC is pin compatible with P2020 Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Add support for P2020RDB boardPoonam Aggrwal2009-08-28-1/+557
| | | | | | | | | | | | | The code base adds P1 & P2 RDB platforms support. The folder and file names can cater to future SOCs of P1/P2 family. P1 & P2 processors are 85xx platforms, part of Freescale QorIQ series. Tested following on P2020RDB: 1. eTSECs 2. DDR, NAND, NOR, I2C. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 8xxx: Removed CONFIG_NUM_CPUS from 85xx/86xxPoonam Aggrwal2009-08-28-14/+14
| | | | | | | | | | | | | The number of CPUs are getting detected dynamically by checking the processor SVR value. Also removed CONFIG_NUM_CPUS references from all the platforms with 85xx/86xx processors. This can help to use the same u-boot image across the platforms. Also revamped and corrected few Freescale Copyright messages. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Remove unused CONFIG_CLEAR_LAW0 definesPeter Tyser2009-08-28-3/+0
| | | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Add a 36-bit physical configuration for MPC8536DSKumar Gala2009-08-28-10/+72
| | | | | | | | | | We move all IO addressed (CCSR, localbus, PCI) above the 4G boundary to allow for larger memory sizes. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* pci/fsl_pci_init: Rework PCI ATMU setup to handle >4G of memoryKumar Gala2009-08-28-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | The old PCI ATMU setup code would just mimic the PCI regions into the ATMU registers. For simple memory maps in which all memory, MMIO, etc space fit into 4G this works ok. However there are issues with we have >4G of memory as we know can't access all of memory and we need to ensure that PCICSRBAR (PEXCSRBAR on PCIe) isn't overlapping with anything since we can't turn it off. We first setup outbound windows based on what the board code setup in the pci regions for MMIO and IO access. Next we place PCICSRBAR below the MMIO window. After which we try to setup the inbound windows to map as much of memory as possible. On PCIe based controllers we are able to overmap the ATMU setup since RX & TX links are separate but report the proper amount of inbound address space to the region tracking to ensure there is no overlap. On PCI based controllers we use as many inbound windows as available to map as much of the memory as possible. Additionally we changed all the CCSR register access to use proper IO accessor functions. Also had to add CONFIG_SYS_CCSRBAR_PHYS to some 86xx platforms that didn't have it defined. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* pci/fsl_pci_init: Use PCIe capability to determine if controller is PCIeKumar Gala2009-08-28-0/+1
| | | | | | | | Change the code to use the PCIe capabilities register to determine if we are a PCIe controller or not. Additionally cleaned up some white space and formatting in the file. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* pci/fsl_pci_init: Fold fsl_pci_setup_inbound_windows into fsl_pci_initKumar Gala2009-08-28-1/+0
| | | | | | | | Every platform that calls fsl_pci_init calls fsl_pci_setup_inbound_windows before it calls fsl_pci_init. There isn't any reason to just call it from fsl_pci_init and simplify things a bit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* pci/fsl_pci_init: Fold pci_setup_indirect into fsl_pci_initKumar Gala2009-08-28-1/+1
| | | | | | | | Every platform that calls fsl_pci_init calls pci_setup_indirect before it calls fsl_pci_init. There isn't any reason to just call it from fsl_pci_init and simplify things a bit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Merge branch 'next' of git://git.denx.de/u-boot-nand-flash into nextWolfgang Denk2009-08-28-2/+19
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| * NAND: DaVinci: V2 Adding 4 BIT ECC supportSandeep Paulraj2009-08-26-0/+10
| | | | | | | | | | | | | | | | This patch adds 4 BIT ECC support in the DaVinci NAND driver. Tested on both the DM355 and DM365. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * MTD:NAND: ADD new ECC mode NAND_ECC_HW_OOB_FIRSTSandeep Paulraj2009-08-26-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the new mode NAND_ECC_HW_OOB_FIRST in the nand code to support 4-bit ECC on TI DaVinci devices with large page (up to 2K) NAND chips. This ECC mode is similar to NAND_ECC_HW, with the exception of read_page API that first reads the OOB area, reads the data in chunks, feeds the ECC from OOB area to the ECC hw engine and perform any correction on the data as per the ECC status reported by the engine. This patch has been accepted by Andrew Morton and can be found at http://userweb.kernel.org/~akpm/mmotm/broken-out/mtd-nand-add-new-ecc-mode-ecc_hw_oob_first.patch Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Sneha Narnakaje <nsnehaprabha@ti.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * NAND: ADD page Parameter to all read_page/read_page_raw API'sSandeep Paulraj2009-08-26-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a new "page" parameter to all NAND read_page/read_page_raw APIs. The read_page API for the new mode ECC_HW_OOB_FIRST requires the page information to send the READOOB command and read the OOB area before the data area. This patch has been accepted by Andrew Morton and can be found at http://userweb.kernel.org/~akpm/mmotm/broken-out/mtd-nand-add-page-parameter-to-all-read_page-read_page_raw-apis.patch WE would like this to become part of the u-boot GIT as well Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Sneha Narnakaje <nsnehaprabha@ti.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * 83xx, kmeter1: added NAND supportHeiko Schocher2009-08-26-0/+6
| | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * OneNAND: Remove unused read_spareramKyungmin Park2009-08-26-2/+1
| | | | | | | | | | | | | | Remove unused read_spareram and add unlock_all as kernel does Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | OneNAND: Remove unused read_spareramKyungmin Park2009-08-26-2/+1
| | | | | | | | | | | | Remove unused read_spareram and add unlock_all as kernel does Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
* | galaxy5200: Cleanup typo and trailing whitespaceEric Millbrandt2009-08-26-4/+4
|/ | | | Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>
* Merge branch 'next' of git://www.denx.de/git/u-boot-coldfire into nextWolfgang Denk2009-08-26-0/+4
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| * ColdFire: Fix missing _IO_BASE which caused compile errorTsiChung Liew2009-08-26-0/+4
| | | | | | | | | | | | | | | | | | The compile error was caused by a recent patch. Affected platforms - M5253DEMO.h, M5253EVBE.h, and M54455EVB.h. Adding the _IO_BASE automatically defined to 0 in asm-m68k/io.h if it isn't set in platform configuration file. Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
* | Support up to 7 banks for ids as specified in JEDEC JEP106ZNiklaus Giger2009-08-26-1/+9
|/ | | | | | | | see http://www.jedec.org/download/search/jep106Z.pdf Add some second source legacy flash chips 256x8. Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org> Signed-off-by: Stefan Roese <sr@denx.de>
* Merge branch 'next' of git://git.denx.de/u-boot-net into nextWolfgang Denk2009-08-25-59/+83
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| * Convert CS8900 Ethernet driver to CONFIG_NET_MULTI APIBen Warren2009-08-25-59/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All in-tree boards that use this controller have CONFIG_NET_MULTI added Also: - changed CONFIG_DRIVER_CS8900 to CONFIG_CS8900 - changed CS8900_BASE to CONFIG_CS8900_BASE - changed CS8900_BUS?? to CONFIG_CS8900_BUS?? - cleaned up line lengths - modified VCMA9 command function that accesses the device - removed MAC address initialization from lib_arm/board.c Signed-off-by: Ben Warren <biggerbadderben@gmail.com> Tested-by: Wolfgang Denk <wd@denx.de> Acked-by: Wolfgang Denk <wd@denx.de>
| * arm nomadik: activate defrag choose 4k transfer block sizeAlessandro Rubini2009-08-25-0/+4
| | | | | | | | | | | | | | | | This chooses 4kB data size for both TFTP and NFS, as an example about how to use support for IP fragments. Signed-off-by: Alessandro Rubini <rubini@gnudd.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | Merge branch 'master' into nextWolfgang Denk2009-08-25-10/+16
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| * Merge branch 'master' of git://git.denx.de/u-boot-blackfinWolfgang Denk2009-08-25-2/+2
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| | * Blackfin: cm-bf527/cm-bf537: increase flash sectorsHarald Krapfenbauer2009-08-23-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Newer revisions of these boards have slightly larger flashes, so increase the configured number of sectors so that U-Boot works on all revisions. Signed-off-by: Harald Krapfenbauer <Harald.Krapfenbauer@bluetechnix.at> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | include/s3c24x0.h: fix S3C24X0_SPI_CHANNEL declarationWolfgang Denk2009-08-25-8/+14
| |/ | | | | | | | | | | | | The SPI controller on the S3C24X0 has 8 bit registers, not 32 bit. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
* | Switch from per-driver to common definition of bin2bcd and bcd2binAlbin Tonnerre2009-08-25-0/+5
| | | | | | | | | | Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com> Acked-by: Stefan Roese <sr@denx.de>
* | Replace BCD2BIN and BIN2BCD macros with inline functionsAlbin Tonnerre2009-08-25-19/+12
| | | | | | | | | | | | | | | | | | | | In the process, also remove backward-compatiblity macros BIN_TO_BCD and BCD_TO_BIN and update the sole board using them to use the new bin2bcd and bcd2bin instead Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Detlev Zundel <dzu@denx.de>
* | Add support for the galaxy5200Eric Millbrandt2009-08-25-0/+428
| | | | | | | | | | | | | | | | | | Add support for the DEKA Research and Development galaxy5200 board The galaxy5200 is an Freescale mpc5200 based embedded industrial control board. Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>
* | unify {CONFIG_,}ENV_IS_EMBEDDEDMike Frysinger2009-08-25-19/+28
|/ | | | | | | | | | Some boards have fallen out of sync by defining CONFIG_ENV_IS_EMBEDDED manually. While it is useful to have this available to the build system, let's do it automatically rather than forcing people to opt into it. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
* start a linker script helper fileMike Frysinger2009-08-23-0/+25
| | | | | | | | | | | | | | | Start a common header file for common linker script code (such as workarounds for older linkers) rather than doing this in the build system. As fallout, we no longer execute the linker every time config.mk is included by a build file (which can easily be 70+ times), but rather only execute it once. This also fixes a bug in the major version checking by creating a macro to easily compare versions and keep people from making the same common mistake (forgetting to check major and minor together). Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* include/mmc.h: Fix typo in IS_SD() macroAlbin Tonnerre2009-08-23-1/+1
| | | | Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
* Merge branch 'master' of /home/wd/git/u-boot/custodiansWolfgang Denk2009-08-22-36/+40
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| * mpc83xx: accommodate larger kernel sizes by defaultKim Phillips2009-08-21-20/+20
| | | | | | | | | | | | | | linux mpc83xx_defconfig kernels are getting bigger, accommodate for their growth by adjusting default load and fdt addresses. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: mpc8377erdb - change DDR settings to those from latest bspKim Phillips2009-08-21-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | when using Linus' 83xx_defconfig, the mpc8377rdb would hang at boot at either: NET: Registered protocol family 16 or the io scheduler cfq registered message. Fixing up these DDR settings appears to fix the problem. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: tqm8349 - remove pci & flash window conflictKim Phillips2009-08-21-1/+1
| | | | | | | | | | | | | | | | | | | | | | commit 9993e196da707a0a1cd4584f1fcef12382c1c144 "mpc83xx: convert all remaining boards over to 83XX_GENERIC_PCI" remapped pci windows on tqm834x to make it more consistent with the other 83xx boards. During that time however, the author failed to realize that FLASH_BASE was occupying the same range as what PCI1_MEM_BASE was being assigned. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Tested-by: Wolfgang Denk <wd@denx.de>
| * mpc83xx: add missing CSCONFIG_ODT_WR_CFG for 832x CPUsHeiko Schocher2009-08-21-0/+3
| | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: mpc8349 - delete unused SYS_MID_FLASH_JUMPPaul Gortmaker2009-08-21-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This was introduced with the MPC8349EMDS board, and then copied to a couple other boards by nature of being the reference implementation. u-boot$git grep CONFIG_SYS_MID_FLASH_JUMP include/configs/MPC8349EMDS.h:#define CONFIG_SYS_MID_FLASH_JUMP 0x7F000000 include/configs/sbc8349.h:#define CONFIG_SYS_MID_FLASH_JUMP 0x7F000000 include/configs/vme8349.h:#define CONFIG_SYS_MID_FLASH_JUMP 0x7F000000 u-boot$ It currently isn't used, so delete it before it spreads further. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: sbc8349 - make enabling PCI more user friendlyPaul Gortmaker2009-08-21-9/+13
| | | | | | | | | | | | | | | | | | | | Prior to this commit, to enable PCI, you had to go manually edit the board config header, which isn't really user friendly. This adds the typical PCI make targets to the toplevel Makefile in accordance with what is being done with other boards. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | arm: rd6281a: Fixed NAND specific warningPrafulla Wadaskar2009-08-21-0/+1
|/ | | | | | | It is recommended to define the macro CONFIG_SYS_64BIT_VSPRINTF for NAND specific warning removal, same is done in this patch Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
* Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2009-08-18-0/+4
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| * ppc4xx: Fix "chip_config" command for AMCC ArchesStefan Roese2009-08-18-0/+4
| | | | | | | | | | | | | | | | | | | | This patch fixes the "chip_config" command for I2C bootstrap EEPROM configuration. First it changes the I2C bootstrap EEPROM address to 0x54 as this is used on Arches (instead of 0x52 on Canyonlands/ Glacier). Additionally, the NAND bootstrap settings are removed for Arches since Arches doesn't support NAND-booting. Signed-off-by: Stefan Roese <sr@denx.de>
* | Update the mtd driver name in bootargs for at91-based boardsAlbin Tonnerre2009-08-18-18/+18
| | | | | | | | | | | | | | | | The name of the atmel nand driver in the kernel changed from at91_nand to atmel_nand back in June 2008, but the at91-based boards config files still refer to at91_nand. This patch updates them with the new name Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
* | omap3: Fixed a problem with hweccBen Goska2009-08-18-2/+2
| | | | | | | | | | | | | | | | In commit 187af954cf7958c24efcf0fd62289bbdb4f1f24e there was a typo that offset all the ecc registers by 4 bytes, fixed that. Signed-off-by: Ben Goska <goskab@onid.oregonstate.edu> Acked-by: Dirk Behme <dirk.behme@googlemail.com>
* | Monahans: avoid floating point calculationsWolfgang Denk2009-08-17-1/+1
|/ | | | | | | | | | | Current code for the Monahans CPU defined OSCR_CLK_FREQ as 3.250 (MHz) which caused floating point operations to be used. This resulted in unresolved references to some FP related libgcc functions when using U-Boot's private libgcc functions. Change the code to use fixed point math only. Signed-off-by: Wolfgang Denk <wd@denx.de>
* zlib: updated to v.1.2.3Giuseppe CONDORELLI2009-08-11-227/+491
| | | | | | | | | | | | | This patch updates zlib to the latest stable version. Only relevant zlib parts were ported to u-boot tree, as already did for the current zlib (0.95). New zlib guarantees a faster inflate performances other then others improvements as explained at www.zlib.net. It also includes Alessandro Rubini's patches to allow 0 as destination pointer and to call watchdog reset if required by architecture. Signed-off-by: Giuseppe Condorelli <giuseppe.condorelli@st.com> Reviewed-by: Angelo Castello <angelo.castello@st.com> Reviewed-by: Alessandro Rubini <rubini-list@gnudd.com>
* Merge branch 'master' of git://git.denx.de/u-boot-netWolfgang Denk2009-08-11-0/+1
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| * arm: A320: driver for FTMAC100 ethernet controllerPo-Yu Chuang2009-08-10-0/+1
| | | | | | | | | | | | | | This patch adds an FTMAC100 ethernet driver for Faraday A320 evaluation board. Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | 85xx: Removed BEDBUG support from FSL 85xx boardsKumar Gala2009-08-10-4/+0
|/ | | | | | | | | For some reason the MPC8544 enabled BEDBUG if PCI was enabled and that got copied int the MPC8536, MPC8572 and P2020 DS boards. The BEDBUG support has never been made to work completely on e500/85xx so we just disable it to save space and match the other FSL 85xx boards. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
generated by cgit v1.1 at 2024-11-29 11:05:55 +0000