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* ppc4xx: Add fdt support for VOM405 boardsMatthias Fuchs2008-09-03-0/+2
| | | | | Signed-off-by: Matthias Fuchs <mf@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Coding style cleanupMatthias Fuchs2008-09-03-83/+79
| | | | | | | Wrap long lines etc. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Enable USB on PLU405 boardsMatthias Fuchs2008-09-03-4/+16
| | | | | | | | | | This patch enables the PCI-OHCI controller on PLU405 board. Also the default CPU frequency is updated to 266 MHz and command line editing is enabled. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Add fdt support for PLU405 boardsMatthias Fuchs2008-09-03-0/+2
| | | | | Signed-off-by: Matthias Fuchs <mf@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Increase U-Boot size to 384kB for PLU405 boardsMatthias Fuchs2008-09-03-3/+3
| | | | | Signed-off-by: Matthias Fuchs <mf@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
* device: make device_register() clone the deviceJean-Christophe PLAGNIOL-VILLARD2008-09-02-0/+1
| | | | | | | This is expected by the callers, but this fact was hidden well within the old list implementation. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* Merge branch 'Makefile' of git://git.denx.de/u-boot-armWolfgang Denk2008-09-01-125/+477
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| * devices: merge to list_headJean-Christophe PLAGNIOL-VILLARD2008-08-31-80/+5
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * update linux/listJean-Christophe PLAGNIOL-VILLARD2008-08-31-45/+472
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2008-09-01-3/+1358
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| * | davinci: fix remaining dm644x_ethJean-Christophe PLAGNIOL-VILLARD2008-08-31-2/+2
| | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * | smdk6400: Use CONFIG_FLASH_CFI_DRIVERJean-Christophe PLAGNIOL-VILLARD2008-08-31-1/+1
| | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * | smdk6400: remove redundant bootargs definitionGuennadi Liakhovetski2008-08-31-1/+0
| | | | | | | | | | | | | | | | | | Double bootargs setting leads to a duplicated environmant entry. Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
| * | ARM: Add support for S3C6400 based SMDK6400 boardGuennadi Liakhovetski2008-08-31-0/+308
| | | | | | | | | | | | | | | | | | | | | | | | | | | SMDK6400 can only boot U-Boot from NAND-flash. This patch adds a nand_spl driver for it too. The board can also boot from the NOR flash, but due to hardware limitations it can only address 64KiB on it, which is not enough for U-Boot. Based on the original sources by Samsung for U-Boot 1.1.6. Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
| * | ARM: Add arm1176 core with S3C6400 SoCGuennadi Liakhovetski2008-08-31-1/+1049
| |/ | | | | | | | | | | Based on the original S3C64XX port by Samsung for U-Boot 1.1.6. Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2008-09-01-1/+1
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| * | ppc4xx: Increase image size for NAND boot targetStefan Roese2008-08-30-1/+1
| |/ | | | | | | | | | | | | This is needed since now with HUSH enabled (amcc-common.h) the image read from NAND exceeds the previous limit. Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-shWolfgang Denk2008-09-01-1/+905
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| * | sh: Fix compile error rsk7203 boardNobuhiro Iwamatsu2008-08-31-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | This boards used old type preprocessor. This patch fix compile error. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: Fix compile error sh7785lcr boardNobuhiro Iwamatsu2008-08-31-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | This boards used old type preprocessor. This patch fix compile error. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: Renesas Solutions AP325RXA board supportNobuhiro Iwamatsu2008-08-31-0/+177
| | | | | | | | | | | | | | | | | | | | | | | | | | | AP325RXA is SH7723's reference board. This has SCIF, NOR Flash, Ethernet, USB host, LCDC, SD Host, Camera and other. In this patch, support SCIF, NOR Flash, and Ethernet. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: add support Renesas SH7723Nobuhiro Iwamatsu2008-08-31-0/+211
| | | | | | | | | | | | | | | | | | | | | | | | Renesas SH7723 has 5 SCIF, SD, Camera, LCDC and other. This patch supports CPU register's header file and SCIF serial driver. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: Renesas RSK+ 7203 board supportNobuhiro Iwamatsu2008-08-31-0/+107
| | | | | | | | | | | | | | | | | | | | | This adds initial support for the RTE RSK+ SH7203 board. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: Add support Renesas SH7203 processorNobuhiro Iwamatsu2008-08-31-0/+41
| | | | | | | | | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: Add support SH2/SH2A which is CPU of Renesas TechnologyNobuhiro Iwamatsu2008-08-31-1/+44
| | | | | | | | | | | | | | | | | | | | | Add support SH2/SH2A basic function. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: Renesas R0P7785LC0011RL board supportNobuhiro Iwamatsu2008-08-31-0/+167
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This board has SH7785, 512MB DDR2-SDRAM, NOR Flash, Graphic, Ethernet, USB, SD, RTC, and I2C controller. This patch supports the following functions: - 128MB DDR2-SDRAM (29-bit address mode only) - NOR Flash - USB host - Ethernet Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: add support for SH7785Yoshihiro Shimoda2008-08-31-0/+158
| |/ | | | | | | | | | | | | | | Renesas SH7785 has DDR2-SDRAM controller, PCI, and other. This patch supports CPU register's header file. Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc5xxxWolfgang Denk2008-08-31-0/+95
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| * | Move MPC5xxx_FEC driver to drivers/netBen Warren2008-08-29-0/+93
| | | | | | | | | | | | Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | ADS5121: Fix NOR and CPLD ALE timing for rev 2 siliconJohn Rigby2008-08-28-0/+2
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MPC5121 rev 2 silicon has a new register for controlling how long CS is asserted after deassertion of ALE in multiplexed mode. The default is to assert CS together with ALE. The alternative is to assert CS (ALEN+1)*LPC_CLK clocks after deassertion of ALE. The default is wrong for the NOR flash and CPLD on the ADS5121. This patch turns on the alternative for CS0 (NOR) and CS2 (CPLD) it does so conditionally based on silicon rev 2.0 or greater. Signed-off-by: Martha J Marx <mmarx@silicontkx.com> Signed-off-by: John Rigby <jrigby@freescale.com>
* | ColdFire: I2C fix for multiple platformsTsiChung Liew2008-08-28-11/+19
| | | | | | | | Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
* | ColdFire: Add CONFIG_MII_INIT for M5272C3TsiChung Liew2008-08-28-0/+1
| | | | | | | | Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
* | ColdFire: Multiple fixes for MCF5445x platformsTsiChung Liew2008-08-28-7/+3
| | | | | | | | | | | | | | | | | | | | Add FEC pin set and mii reset in __mii_init(). Change legacy flash vendor from 2 to AMD LEGACY (0xFFF0), change cfi_offset to 0, and change CFG_FLASH_CFI to CONFIG_FLASH_CFI_LEGACY. Correct M54451EVB and M54455EVB env settings in configuration file. Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
* | ColdFire: Change the SDRAM BRD2WT timing from 3 to 7TsiChung Liew2008-08-28-2/+2
| | | | | | | | | | | | | | The user manuals recommend 7. Signed-off-by: Kurt Mahan <kmahan@freescale.com> Acked-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
* | ColdFire: Raise uart baudrate to 115200 bpsTsiChung Liew2008-08-28-8/+8
|/ | | | | | | M5249EVB, M5271EVB, M5272C3, M5275EVB and M5282EVB platforms uart baudrate increase from 19200 to 115200 bps Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc5xxxWolfgang Denk2008-08-28-0/+376
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| * mpc52xx: added support for the MPC5200 based MUC.MC52 board from MAN.Heiko Schocher2008-08-27-0/+376
| | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* | mpc85xx: Add support for the MPC8536DS reference boardKumar Gala2008-08-27-0/+594
| | | | | | | | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com> Signed-off-by: Dejan Minic <minic@freescale.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | mpc85xx: Add support for the MPC8536Kumar Gala2008-08-27-3/+18
| | | | | | | | | | | | | | | | | | | | | | The MPC8536 Adds SDHC and SATA controllers to the PQ3 family. We also have SERDES init code for the 8536. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com> Signed-off-by: Dejan Minic <minic@freescale.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Dave Liu <daveliu@freescale.com>
* | mpc85xx: Add support for the MPC8572DS reference boardKumar Gala2008-08-27-0/+576
| | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | FSL DDR: Remove old SPD support from cpu/mpc85xxKumar Gala2008-08-27-0/+4
| | | | | | | | | | | | | | All 85xx boards have been converted to the new code so we can remove the old SPD DDR setup code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | FSL DDR: Convert STXSSA to new DDR code.Kumar Gala2008-08-27-13/+17
| | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | FSL DDR: Convert STXGP3 to new DDR code.Kumar Gala2008-08-27-13/+17
| | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | FSL DDR: Convert SBC8560 to new DDR code.Kumar Gala2008-08-27-9/+41
| | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | FSL DDR: Convert MPC8540EVAL to new DDR code.Kumar Gala2008-08-27-7/+19
| | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | FSL DDR: Convert PM856 to new DDR code.Kumar Gala2008-08-27-30/+28
| | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | FSL DDR: Convert PM854 to new DDR code.Kumar Gala2008-08-27-30/+28
| | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | FSL DDR: Convert sbc8548 to new DDR code.Kumar Gala2008-08-27-13/+18
| | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | FSL DDR: Convert atum8548 to new DDR code.Kumar Gala2008-08-27-32/+30
| | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | FSL DDR: Convert socrates to new DDR code.Kumar Gala2008-08-27-11/+18
| | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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