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* arm: odroid: pmic77686: allow buck voltage settingsSuriyan Ramasami2014-11-17-0/+3
| | | | | | | | Allow to set the buck voltage for the max77686. This will be used to reset the SMC LAN9730 ethernet on the odroids. Signed-off-by: Suriyan Ramasami <suriyan.r@gmail.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* SMDK2410: convert to generic boardDavid Müller (ELSOFT AG)2014-11-17-0/+2
| | | | | | | | Compile-time tested only, as I currently don't have access to the eval board. Signed-off-by: David Müller <d.mueller@elsoft.ch> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* exynos: Increase command line buffer size (CONFIG_SYS_CBSIZE)Ian Campbell2014-11-17-2/+2
| | | | | | | | | | | I was running into this limit with a not overly long PXE append line. Since the PXE code wants to print the resulting command line increase CONFIG_SYS_PBSIZE too. Signed-off-by: Ian Campbell <ian.campbell@citrix.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* exynos5: Use config_distro_bootcmd.hIan Campbell2014-11-17-22/+47
| | | | | | | | | | | | | | | | This replaces the existing CONFIG_BOOTCOMMAND for exynos5250 and 5420. exynos4 platforms seem to have existing complex extra env configuration for booting and so are excluded here. Hence the bootcmd.h is added to exynos5-common.h. I have build tested on all exynos platforms (MAKEALL -s exynos), but only boot tested on arndale. Signed-off-by: Ian Campbell <ian.campbell@citrix.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Guillaume GARDET <guillaume.gardet@free.fr> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* exynos: Enable config_distro_defaults.hIan Campbell2014-11-17-24/+2
| | | | | | | | | | | | | | | ...and remove explicit setting of things which this implies. This is done for all exynos platforms (4 & 5) so it is added to exynos-common.h I'm mainly interested in CONFIG_CMD_BOOTZ and CONFIG_SUPPORT_RAW_INITRD I have build tested on all exynos platforms (MAKEALL -s exynos), but only boot tested on arndale. Signed-off-by: Ian Campbell <ian.campbell@citrix.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Guillaume GARDET <guillaume.gardet@free.fr> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* Config: Exynos5420: Refactor SDRAM Bank and SizeAkshay Saraswat2014-11-17-4/+12
| | | | | | | | | | | | | | Since, not every board may have all memory channels configured and all available banks of DMC used, we wish to refactor configs for Memory Bank size and numbers as per board memory config. For Example, Peach-Pit has 2GB memory and will be using only 4 banks but Peach-Pi has 3.5GB memory and will be using all 7 available SDRAM banks. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* Config: Exynos5800: Enable build for Peach-PiAkshay Saraswat2014-11-17-3/+52
| | | | | | | | | | | | | This adds following things : - New config and defconfig for Peach-Pi board. - Alterations in Kconfig and MAINTAINERS. - Addition of CONFIG_EXYNOS5800. - ADdition of exynos5800-peach-pi in dts list. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2014-11-14-2/+149
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| * powerpc/85xx: enable some P1/P2 boards mtdparts for nor flashYangbo Lu2014-11-14-0/+75
| | | | | | | | | | | | | | | | | | | | Enable these boards mtdparts for nor flash: p1020rdb-pd, p1021rdb-pc, p1022ds, p1025twr, and p2020rdb-pc. Signed-off-by: Xie Xiaobo <X.Xie@freescale.com> Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Cc: York Sun <yorksun@freescale.com> Cc: Scott Wood <scottwood@freescale.com>
| * keymile/powerpc: move to the architecture-generic board systemValentin Longchamp2014-11-14-0/+9
| | | | | | | | | | | | | | | | | | | | | | This converts all the Keymile powerpc boards to the generic board initialization. This includes the 3 Keymile powerpc subsystems: km82xx, km83xx, and kmp204x. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * powerpc/BSC9131RDB: Enable creation of dynamic partitions for NANDAshish Kumar2014-11-14-0/+17
| | | | | | | | | | | | | | | | | | | | * fdt_fixup_mtdparts is called from ft_board_setup * Run "mtdparts default" to create NAND partition on uboot * Use mtdparts to create partitions dynamically rather than using static partitions in device tree Signed-off-by: Ashish Kumar <Ashish.Kumar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * powerpc/BSC9132QDS: Enable creation of dynamic partition for NAND and NORAshish Kumar2014-11-14-0/+21
| | | | | | | | | | | | | | | | | | | | * fdt_fixup_mtdparts is called from ft_board_setup * run "mtdparts default" to create NAND, NOR partition on uboot * Use mtdparts to create partitions dynamically rather than using static partitions in device tree Signed-off-by: Ashish Kumar <Ashish.Kumar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * powerpc/t4rdb: Add support of CPLDChunhe Lan2014-11-14-0/+23
| | | | | | | | | | | | | | | | | | | | | | This support of CPLD includes - Files and register definitions - Command to switch alternate bank - Command to switch default bank Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * sbc8548: enable and test CONFIG_SYS_GENERIC_BOARDPaul Gortmaker2014-11-14-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tested on the following baseline (note "dirty" since I enabled ALT_BOOT in the config in order to use the alternate boot bank.) Everything seems to work fine with no additional changes. The banner warning message is now gone. --- U-Boot 2014.10-rc1-00075-ge49f14af1349-dirty (Aug 14 2014 - 10:26:15) CPU: 8548E, Version: 2.1, (0x80390021) Core: e500, Version: 2.2, (0x80210022) Clock Configuration: CPU0:990 MHz, CCB:396 MHz, DDR:198 MHz (396 MT/s data rate), LBC:99 MHz L1: D-cache 32 KiB enabled I-cache 32 KiB enabled I2C: ready DRAM: Detected UDIMM SDRAM: 128 MiB 256 MiB (DDR2, 64-bit, CL=3, ECC off) Flash: 72 MiB L2: 512 KiB enabled *** Warning - bad CRC, using default environment PCI: Host, 64 bit, 66 MHz, sync, arbiter 00:01.0 - 8086:1026 - Network controller PCI1: Bus 00 - 00 PCIe1: Root Complex, x1 gen1, regs @ 0xe000a000 02:00.0 - 1148:9e00 - Network controller PCIe1: Bus 01 - 02 In: serial Out: serial Err: serial Net: eTSEC0 [PRIME], eTSEC1 Hit any key to stop autoboot: 0 => ver U-Boot 2014.10-rc1-00075-ge49f14af1349-dirty (Aug 14 2014 - 10:26:15) powerpc-linux-gcc (GCC) 4.5.2 GNU ld (GNU Binutils) 2.21 => --- Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * mpc85xx/kmp204x: raise u-boot size to 768KBValentin Longchamp2014-11-14-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Until now this defined to be 512KB and the total binary size actually was on the edge of this limit. Most of the powerpc boards have thus moved to 768KB. Since on the current kmp204x boards there is 1MB reserved for u-boot on the SPI boot flash, there is no problem to set the limit to 768KB as well to be on line with the other powerpc boards and to eventually configure in some additional features (and binary size) to u-boot. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2014-11-14-2/+272
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| * arm: mx6: add support for TBS2910 Matrix ARM miniPCSoeren Moch2014-11-13-0/+242
| | | | | | | | | | | | | | Add initial support for TBS2910 Matrix ARM miniPC. Support includes MMC, Ethernet, UARTs, HDMI, USB, SATA, PCI, I2C, RTC. Signed-off-by: Soeren Moch <smoch@web.de>
| * imx6: add spl in the header fileJohn Tobias2014-11-13-0/+6
| | | | | | | | | | | | | | | | add the spl info in the header file. Also, added a macro statement in m6sabre_common.h to avoid compiler warning. Signed-off-by: John Tobias <john.tobias.ph@gmail.com>
| * imx: mx6q/dlsabreauto: And NAND flash supportYe.Li2014-11-13-0/+16
| | | | | | | | | | | | | | | | | | | | | | The i.MX6Q/DL sabreauto board has one NAND socket, set the CONFIG_NAND_MXS and relevant NAND configurations to enable the MXS NAND flash driver. Add board level codes to set IOMUX and clock for GPMI-NAND and BCH module. Signed-off-by: Ye.Li <B37916@freescale.com> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
| * imx: mx6q/dl sabre_common: Move MMC ENV offset to 512KB positionYe.Li2014-11-13-1/+1
| | | | | | | | | | | | | | | | | | | | Set the CONFIG_ENV_OFFSET from 384KB to 512KB offset, so we will have larger space for u-boot image. When enabling NAND flash support feature, the u-boot image size has exceeded the 384KB, which causes overlay to the environment variables storage. Signed-off-by: Ye.Li <B37916@freescale.com> Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
| * mx53loco: Change 'fdt_file' dynamicallyFabio Estevam2014-11-13-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | Since kernel 3.15 there are two dtb's for the imx53-qsb board: imx53-qsb.dtb - For the boards with DA9053 PMIC imx53-qsrb.dtb - For the boards with MC34708 PMIC Change the 'fdt_file' dynamically, so that the correct dtb can be used depending on the board variant. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
| * ot1200: add support for EHCIChristian Gmeiner2014-11-13-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot 2014.10-17457-g0b23780-dirty (Nov 10 2014 - 11:41:04) CPU: Freescale i.MX6D rev1.2 at 792 MHz Reset cause: WDOG Board: ot1200 I2C: ready DRAM: 1 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 SF: Detected M25P16 with page size 256 Bytes, erase size 64 KiB, total 2 MiB In: serial Out: serial Err: serial Net: using phy at 0 FEC [PRIME] Hit any key to stop autoboot: 0 => usb start (Re)start USB... USB0: Port not available. USB1: USB EHCI 1.00 scanning bus 1 for devices... 4 USB Device(s) found => usb tree USB device tree: 1 Hub (480 Mb/s, 0mA) | u-boot EHCI Host Controller | +-2 Hub (480 Mb/s, 2mA) | +-3 Mass Storage (480 Mb/s, 80mA) | USBest Technology USB Mass Storage Device 0000000000028B | +-4 Vendor specific (480 Mb/s, 2mA) => Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini2014-11-13-14/+56
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| * | sun6i: ehci: Add sun6i ehci supportHans de Goede2014-11-13-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | Add support for the 2 ehci controllers found on the sun6i (A31) soc. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Acked-by: Marek Vasut <marex@denx.de>
| * | sunxi: ehci: Add proper Kconfig options to select the usb Vbus gpio-sHans de Goede2014-11-13-14/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add proper Kconfig options to select the usb Vbus gpio-s, besides moving to Kconfig being the right thing to do, an added advantage of this is that it allows for boards without Vbus gpio-s. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | sun6i: Add clock functions needed for SPL / DRAM initHans de Goede2014-11-13-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add clock_init_safe and clockset_pll5 functions, as these are needed for SPL support resp. DRAM init (which is needed for SPL too). Also add some extra clock register constant defines. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | sun6i: Add basic axp221 driverOliver Schinagl2014-11-13-0/+50
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The A31 uses the AXP221 pmic for various voltages. Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> -- Changes in v2: -Rebase Changes in v3: -Add support for all dldo and aldo-s -Add Kconfig option to select building AXP221 and to select voltage of dldo and aldo-s Changes in v4: -Add axp221_setbits helper function -Use symbolic names for enabled bits in CTRL1 - CTRL3 registers
* | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-11-13-0/+2
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| * | km_arm: convert the km_arm boards to the generic board supportValentin Longchamp2014-11-12-0/+2
| |/ | | | | | | | | | | | | This implies that all the km_kirkwood boards and their variants now are using the generic board init sequence. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
* | zynq: zybo: Move CONFIG_DEFAULT_DEVICE_TREE to defconfigMichal Simek2014-11-13-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a MIME GnuPG-signed message. If you see this text, it means that your E-mail or Usenet software does not support MIME signed messages. The Internet standard for MIME PGP messages, RFC 2015, was published in 1996. To open this message correctly you will need to install E-mail or Usenet software that supports modern Internet standards. Move CONFIG_DEFAULT_DEVICE_TREE from board config directly to defconfig. This patch removes compilation warning: include/configs/zynq_zybo.h:24:0: warning: "CONFIG_DEFAULT_DEVICE_TREE" redefined [enabled by default] #define CONFIG_DEFAULT_DEVICE_TREE zynq-zybo Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblazeTom Rini2014-11-13-0/+31
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| * | configs: zynq: Add config support for ZYBOTinghui Wang2014-11-11-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds config support needed for ZYBO target and has been tested on Rev. B ZYBO hardware. Signed-off-by: Tinghui Wang <steven.wang@digilentinc.com> [PC changes: * Dropped boards.cfg change (rebase conflict) * Dropped custom u-boot env * Added DTS * Misc forward-porting changes ] Signed-off-by: Peter Crosthwiate <crosthwaite.peter@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | powerpc: remove orphaned boards mcc200 and prs200Nikita Kiryanov2014-11-12-398/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mcc200 and prs200 are old and have no maintainer. Remove the boards. This also removes the mcc200 specific 1bpp BMP support from common/lcd.c Cc: Wolfgang Denk <wd@denx.de> Cc: Anatolij Gustschin <agust@denx.de> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: York Sun <yorksun@freescale.com> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
* | | Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini2014-11-11-1/+137
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| * | | arm: socfpga: Add DT support for SoCFPGA and add socfpga_socrates targetStefan Roese2014-11-07-0/+90
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch includes the latest DT sources for socfpga from the current Linux kernel. And enables CONFIG_OF_CONTROL for the new build target "socfpga_socrates" (the EBV SoCrates board) to make use of this new DT support. Until this patch, the only SoCFPGA U-Boot target in mainline is "socfpga_cyclone5". This build target is not (yet) changed to support DT. So nothing changes for this target. Even though the long-term goal should be to move all SoCFPGA targets over to DT. One of the reasons to enable DT support in SoCFPGA is, that I need to support multiple different SPI controllers for this platform. This is the QSPI Cadence controller and the Designware SPI master controller. Both are implemented in the SoCFPGA. And enabling both controllers is only possible by using the new driver model (DM). The DM SPI code only supports DT based probing. So it was easier to move SoCFPGA to DT than to add the (deprecated) platform-data based probing to the DM SPI suport. Note that the image with the dtb embedded is u-boot-dtb.img. This needs to be used now for those DT enabled boards instead of u-boot.img. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Vince Bridgers <vbridger@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Pavel Machek <pavel@denx.de> Cc: Simon Glass <sjg@chromium.org>
| * | | socfpga_cyclone5.h: fix kernel console argument in default environmentAnatolij Gustschin2014-11-07-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With fresh environment the kernel gets wrong console argument and boots without console output. Fix it. Reported-by: Dinh Nguyen <dinguyen@opensource.altera.com> Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Marek Vasut <marex@denx.de>
| * | | arm: socfpga: Add example config entry for EPCS/EPCQ SPIMarek Vasut2014-10-31-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add example config file entry for the Altera SPI controller. This SPI controller can also, under special conditions, be used to operate the EPCS/EPCQ SPI NOR. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Vince Bridgers <vbridger@altera.com> Cc: Pavel Machek <pavel@denx.de> Cc: Stefan Roese <sr@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * | | arm: socfpga: Add I2C support to SoCFPGAStefan Roese2014-10-30-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds I2C support for the SoCFPGA. Using the designware I2C controller driver. It supports all 4 I2C busses on the SoCFPGA. The designware I2C driver has now been converted to the CONFIG_SYS_I2C framework. So lets enable it on SoCFPGA. Tested on SoCrates. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Vince Bridgers <vbridger@altera.com> Cc: Pavel Machek <pavel@denx.de> Cc: Heiko Schocher <hs@denx.de>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2014-11-11-1/+36
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| * | | usb: include <asm/cache.h> and <part.h> from include/usb.hMasahiro Yamada2014-11-07-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The header file include/usb.h references ARCH_DMA_MINALIGH and block_dev_desc_t, thus it must include <asm/cache.h> and <part.h>. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | arm: socfpga: Add example UDC configMarek Vasut2014-11-07-1/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add example of an USB UDC configuration with DFU and UMS. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Vince Bridgers <vbridger@altera.com> Acked-by: Pavel Machek <pavel@denx.de> Cc: Stefan Roese <sr@denx.de> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
| * | | usb: s3c-otg: Allow custom gusbcfgMarek Vasut2014-11-07-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow passing in a custom configuration of the gusbcfg register via platform data. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Vince Bridgers <vbridger@altera.com> Acked-by: Pavel Machek <pavel@denx.de> Cc: Stefan Roese <sr@denx.de> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com>
| * | | usb: s3c-otg: Split out PHY controlMarek Vasut2014-11-07-0/+4
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Split the Samsung specific PHY control into a separate file and compile this into the S3C OTG driver only if used on a Samsung system. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Vince Bridgers <vbridger@altera.com> Acked-by: Pavel Machek <pavel@denx.de> Cc: Stefan Roese <sr@denx.de> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com>
* | | ARM: UniPhier: call pin_init() also in the normal bootMasahiro Yamada2014-11-12-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_UNIPHIER_SERIAL has been moved to Kconfig and it is defined in ./.config but not in spl/.config, so pin_init() should be called from the normal image so that UART works correctly. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | ARM: UniPhier: decrease pre-reloc malloc area sizeMasahiro Yamada2014-11-12-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the current implementation of the boot sequence of UniPhier platform, 32KB temporary RAM is available before relocation. The malloc area and the stack shares the 32KB area. With CONFIG_SYS_MALLOC_F_LEN set to 0x7000 (28KB), only 0x1000 (4KB) is left for the stack. In some use cases, the system hangs up with stack over-flow. Even with driver-model UART enabled, the malloc area of 0x2000 (8KB) should be enough. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | ARM: UniPhier: enable USB featuresMasahiro Yamada2014-11-12-0/+7
| | | | | | | | | | | | | | | | | | FAT-formated USB storage device access is available. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | ARM: UniPhier: move DDR related configuration to KconfigMasahiro Yamada2014-11-12-6/+0
| | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-blackfinTom Rini2014-11-10-0/+1
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| * | | bfin: the max bfin sdh block count is 127Sonic Zhang2014-11-10-0/+1
| |/ / | | | | | | | | | Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-11-10-0/+388
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generated by cgit v1.1 at 2024-12-27 07:56:53 +0000