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* x86: Remove eNET boardsSimon Glass2013-02-14-619/+0
| | | | | | | These are no longer used and should be removed. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-02-12-185/+1292
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| * Tegra114: Add/enable Dalmore build (T114 reference board)Tom Warren2013-02-11-0/+129
| | | | | | | | | | | | | | This build is stripped down. It boots to the command prompt. GPIO is the only peripheral supported. Others TBD. Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra: cardhu: config: enable SPIAllen Martin2013-02-11-0/+11
| | | | | | | | | | | | | | | | Turn on SPI in cardhu config file Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra: add SPI SLINK driverAllen Martin2013-02-11-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add driver for tegra SPI "SLINK" style driver. This controller is similar to the tegra20 SPI "SFLASH" controller. The difference is that the SLINK controller is a genernal purpose SPI controller and the SFLASH controller is special purpose and can only talk to FLASH devices. In addition there are potentially many instances of an SLINK controller on tegra and only a single instance of SFLASH. Tegra20 is currently ths only version of tegra that instantiates an SFLASH controller. This driver supports basic PIO mode of operation and is configurable (CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4 devices per controller may be attached, although typically only a single chip select line is exposed from tegra per controller so in reality this is usually limited to 1. To enable this driver, use CONFIG_TEGRA_SLINK Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra: spi: add fdt support to tegra SPI SFLASH driverAllen Martin2013-02-11-0/+1
| | | | | | | | | | | | | | | | | | Add support for configuring tegra SPI driver from devicetree. Support is keyed off CONFIG_OF_CONTROL. Add entry in seaboard dts file for spi controller to describe seaboard spi. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra: don't hard-code LCD into default TEGRA_DEVICE_SETTINGSStephen Warren2013-02-11-2/+9
| | | | | | | | | | | | | | | | | | Only add "lcd" into TEGRA_DEVICE_SETTINGS if CONFIG_VIDEO_TEGRA. Otherwise, "lcd" is meaningless. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * AM335X: Set fdt_high for AM335X devices to enable booting with Device Treehvaibhav@ti.com2013-02-07-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | For AM335X boards, such as the EVM and Bone Linux kernel fails to locate the device tree blob on boot. The reason being is that u-boot is copying the DT blob to the upper part of RAM when booting the kernel and the kernel is unable to access the blob. By setting the fdt_high variable to 0xffffffff (to prevent the copy) the kernel is able to locate the DT blob and boot. This patch is tested on BeagleBone platform. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Tom Rini <trini@ti.com>
| * pcm051: Add support for Phytec phyCORE-AM335xLars Poeschel2013-02-07-0/+301
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The board is named pcm051 and has this hardware: SOC: TI AM3359 DDR3-RAM: 2x MT41J256M8HX-15EIT:D 512MiB ETH 1: LAN8710AI SPI-Flash: W25Q64BVSSIG RTC: RV-4162-C7 I2C-EEPROM: CAT32WC32 NAND: MT29F4G08_VFPGA63 PMIC: TPS65910A3 LCD Supported: UART 1 MMC/SD ETH 1 USB I2C SPI Not yet supported: NAND RTC LCD Signed-off-by: Lars Poeschel <poeschel@lemonage.de> [trini: Add #define CONFIG_PHY_ADDR 0 to config] Signed-off-by: Tom Rini <trini@ti.com>
| * omap4: allow the use of a plain text env file instead boot scriptsJavier Martinez Canillas2013-02-07-3/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For production systems it is better to use script images since they are protected by checksums and carry valuable information like name and timestamp. Also, you can't validate the content passed to env import. But for development, it is easier to use the env import command and plain text files instead of script-images. Since both OMAP4 supported boards (Panda and TI SDP4430) are used primarily for development, this patch allows U-Boot to load env var from a text file in case that an boot.scr script-image is not present. The variable uenvcmd (if existent) will be executed (using run) after uEnv.txt was loaded. If uenvcmd doesn't exist the default boot sequence will be started. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Acked-by: Nishanth Menon <nm@ti.com>
| * OMAP3: igep00x0: add boot status GPIO LEDJavier Martinez Canillas2013-02-07-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds an GPIO LED boot status for IGEP boards. The GPIO LED used is the red LED0 while the Linux kernel uses the green LED0 as the boot status. By using different GPIO LEDs, the user can know in which step of the boot process the board currently is. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
| * OMAP3: use a single board file for IGEP devicesJavier Martinez Canillas2013-02-07-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Even when the IGEPv2 board and the IGEP Computer-on-Module are different from a form factor point of view, they are very similar in the fact that share many components and how they are wired. So, it is possible (and better) to have a single board file for both devices and just use the CONFIG_MACH_TYPE to make a differentiation between each board when needed. This change avoids code duplication by removing 298 lines of code and makes future maintenance easier. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
| * Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2013-02-02-5/+436
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| | * mx23evk: Add initial board supportOtavio Salvador2013-01-28-0/+202
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following features are supported: * 128 MB DDR1 SDRAM * DUART * SD/MMC Card Socket Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
| | * mx23_olinuxino: Add default environmentOtavio Salvador2013-01-28-7/+70
| | | | | | | | | | | | | | | | | | This adds a default environment with support for MMC booting. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
| | * mxs: mmc: mx23_olinuxino: Add MMC supportMarek Vasut2013-01-28-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the MMC attached to SSP1. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
| | * net: fec_mxc: get phydev before fec_probeTroy Kisky2013-01-28-0/+7
| | | | | | | | | | | | Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| | * phy: add phy_find_by_mask/phy_connect_devTroy Kisky2013-01-28-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is useful to be able to try a range of possible phy addresses to connect. Also, an ethernet device is not required to use phy_find_by_mask leading to better separation of mii vs ethernet, as suggested by Andy Fleming. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| | * net: fec_mxc: delete CONFIG_FEC_MXC_MULTITroy Kisky2013-01-28-3/+0
| | | | | | | | | | | | | | | | | | | | | It is more logical to test for CONFIG_FEC_MXC_PHYADDR to determine whether to define the function fecmxc_initialize. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| | * mx6qsabre_common: Let mmc partition be board specificFabio Estevam2013-01-28-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 49ea0ff5 (49ea0ff5) introduced CONFIG_SYS_MMC_ENV_PART into mx6qsabresd.h to store the mmc partition, but in order for it to have effect we should place it into 'mmcpart' variable. Also add CONFIG_SYS_MMC_ENV_PART into mx6qsabreauto.h. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| | * mx6qsabreauto: enable USB host interfaceKnut Wohlrab2013-01-28-0/+11
| | | | | | | | | | | | | | | | | | The USB host interface is routed to plug USB1/J30 on the mother board. Signed-off-by: Knut Wohlrab <knut.wohlrab@de.bosch.com>
| | * mxs: Add MX23 olinuxino board supportMarek Vasut2013-01-21-0/+135
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for MX23-based Olinuxino board. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
| | * mxs: Linux uses ttyAMA0 as DUARTMarek Vasut2013-01-21-1/+1
| | | | | | | | | | | | | | | | | | | | | Replace use of ttyAM0 with ttyAMA0 as default serial console. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * | Tegra30: I2C: Enable I2C driver on CardhuTom Warren2013-01-16-0/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | Tested all 5 'buses', i2c probe enumerates device addresses on all but dev 4 (I2C4) [no devices on that bus on my Cardhu]. Note that this uses the extant tegra_i2c.c driver w/o modification. Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | Tegra30: Add/enable Cardhu build (T30 reference board)Tom Warren2013-01-16-173/+301
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This build is stripped down. It boots to the command prompt. GPIO is the only peripheral supported. Others TBD. include/configs/tegra-common.h now holds common config options for Tegra SoCs. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| * | Tegra30: Add generic Tegra30 build supportTom Warren2013-01-16-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds basic Tegra30 (T30) build support - no specific board is targeted. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| * | tegra: remove custom TEGRA_DEVICE_SETTINGS for board filesMarc Dietrich2013-01-16-18/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TEGRA_DEVICE_SETTINGS lives now in tegra-common-post.h. This removes custom TEGRA_DEVICE_SETTINGS for all tegra boards providing video output, except seaboard, which was fixed by Stephen already. Cc: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Marc Dietrich <marvin24@gmx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | tegra: enable LCD on PAZ00Marc Dietrich2013-01-16-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | This adds LCD panel descriptions to the device tree of PAZ00 and enables LCD support in the configuration. Signed-off-by: Marc Dietrich <marvin24@gmx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | tegra: Enable LCD on TECThierry Reding2013-01-16-1/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | The TEC ships with a 7" LCD panel that provides a resolution of 800x480 pixels. Add a corresponding panel description to the device tree and enable LCD support in the configuration. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | tegra: Enable LCD on Medcom-WideThierry Reding2013-01-16-0/+14
| |/ | | | | | | | | | | | | | | | | The Medcom-Wide has a 15" LCD panel with a resolution of 1366x768 pixels. Add a corresponding panel description to the device tree and enable LCD support in the configuration. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | Clean up libfdt.h includesGerald Van Baren2013-02-08-2/+1
| | | | | | | | | | | | | | | | | | | | The libfdt.h file is the definition file for libfdt. It is unnecessary to include other fdt header files (the necessary ones are pulled in by libfdt.h). Signed-off-by: Gerald Van Baren <gvb@unssw.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Stefan Roese <sr@denx.de>
* | common/fdt_support.c: sparse fixesKim Phillips2013-02-07-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | trivial: fdt_support.c:89:64: warning: Using plain integer as NULL pointer fdt_support.c:325:65: warning: Using plain integer as NULL pointer fdt_support.c:352:65: warning: Using plain integer as NULL pointer For the following bad constant expression, We hardcode the max. number of memory banks to four for the foreseeable future, and add an error with instructions on what to do once it's exceeded: fdt_support.c:397:22: error: bad constant expression For the rest below, sparse found a couple of wrong endian conversions in of_bus_default_translate() and fdt_get_base_address(), but otherwise the rest is mostly annotation fixes: fdt_support.c:64:24: warning: cast to restricted __be32 fdt_support.c:192:21: warning: incorrect type in assignment (different base types) fdt_support.c:192:21: expected unsigned int [unsigned] [usertype] tmp fdt_support.c:192:21: got restricted __be32 [usertype] <noident> fdt_support.c:201:21: warning: incorrect type in assignment (different base types) fdt_support.c:201:21: expected unsigned int [unsigned] [addressable] [usertype] tmp fdt_support.c:201:21: got restricted __be32 [usertype] <noident> fdt_support.c:304:13: warning: incorrect type in assignment (different base types) fdt_support.c:304:13: expected unsigned int [unsigned] [usertype] val fdt_support.c:304:13: got restricted __be32 [usertype] <noident> fdt_support.c:333:13: warning: incorrect type in assignment (different base types) fdt_support.c:333:13: expected unsigned int [unsigned] [usertype] val fdt_support.c:333:13: got restricted __be32 [usertype] <noident> fdt_support.c:359:13: warning: incorrect type in assignment (different base types) fdt_support.c:359:13: expected unsigned int [unsigned] [usertype] val fdt_support.c:359:13: got restricted __be32 [usertype] <noident> fdt_support.c:373:21: warning: cast to restricted __be32 fdt_support.c:963:48: warning: incorrect type in argument 1 (different base types) fdt_support.c:963:48: expected restricted __be32 const [usertype] *p fdt_support.c:963:48: got unsigned int [usertype] *<noident> fdt_support.c:971:48: warning: incorrect type in argument 1 (different base types) fdt_support.c:971:48: expected restricted __be32 const [usertype] *p fdt_support.c:971:48: got unsigned int [usertype] *<noident> fdt_support.c:984:29: warning: incorrect type in argument 1 (different base types) fdt_support.c:984:29: expected restricted __be32 const [usertype] *cell fdt_support.c:984:29: got unsigned int [usertype] *addr fdt_support.c:996:32: warning: incorrect type in argument 1 (different base types) fdt_support.c:996:32: expected restricted __be32 const [usertype] *cell fdt_support.c:996:32: got unsigned int [usertype] *addr fdt_support.c:1041:41: warning: incorrect type in argument 1 (different base types) fdt_support.c:1041:41: expected restricted __be32 const [usertype] *cell fdt_support.c:1041:41: got unsigned int [usertype] *addr fdt_support.c:1053:41: warning: incorrect type in argument 2 (different base types) fdt_support.c:1053:41: expected restricted __be32 const [usertype] *range fdt_support.c:1053:41: got unsigned int const [usertype] *[assigned] ranges fdt_support.c:1064:53: warning: incorrect type in argument 2 (different base types) fdt_support.c:1064:53: expected restricted __be32 const [usertype] *addr fdt_support.c:1064:53: got unsigned int [usertype] *addr fdt_support.c:1110:50: warning: incorrect type in argument 2 (different base types) fdt_support.c:1110:50: expected restricted __be32 const [usertype] *addr fdt_support.c:1110:50: got unsigned int *<noident> fdt_support.c:1121:49: warning: incorrect type in argument 1 (different base types) fdt_support.c:1121:49: expected restricted __be32 const [usertype] *cell fdt_support.c:1121:49: got unsigned int *<noident> fdt_support.c:1147:60: warning: incorrect type in argument 2 (different base types) fdt_support.c:1147:60: expected restricted __be32 const [usertype] *addr fdt_support.c:1147:60: got unsigned int *<noident> fdt_support.c:1081:5: warning: symbol '__of_translate_address' was not declared. Should it be static? fdt_support.c:1154:5: error: symbol 'fdt_translate_address' redeclared with different type (originally declared at include/fdt_support.h:95) - incompatible argument 3 (different base types) fdt_support.c: In function 'fdt_node_offset_by_compat_reg': fdt_support.c:1173:17: warning: initialization discards 'const' qualifier from pointer target type [enabled by default] See also linux kernel commit 0131d897 "of/address: use proper endianess in get_flags". Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Cc: Jerry Van Baren <gvb.uboot@gmail.com>
* | libfdt: update from upstream dtc commit 142419eKim Phillips2013-02-07-16/+16
| | | | | | | | | | | | | | commit 142419e "dtc/libfdt: sparse fixes", for u-boot's libfdt copy. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Cc: Jerry Van Baren <gvb.uboot@gmail.com>
* | libfdt: update fdt.h from upstream dtcKim Phillips2013-02-07-21/+21
| | | | | | | | | | | | | | | | upstream dtc commit feafcd972cb744750a65728440c99526e6199a6d "dtc/libfdt: introduce fdt types for annotation by endian checkers". Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Cc: Jerry Van Baren <gvb.uboot@gmail.com>
* | libfdt_env.h: add fdt type definitionsKim Phillips2013-02-07-0/+5
| | | | | | | | | | | | | | fdt types are big endian. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Cc: Jerry Van Baren <gvb.uboot@gmail.com>
* | treewide: include libfdt_env.h before fdt.hKim Phillips2013-02-07-1/+1
| | | | | | | | | | | | | | | | | | | | | | and, if including libfdt.h which includes libfdt_env.h in the correct order, don't include fdt.h before libfdt.h. this is needed to get the fdt type definitions set from the project environment before fdt.h uses them. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Cc: Jerry Van Baren <gvb.uboot@gmail.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-microblazeTom Rini2013-02-04-4/+0
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| * | microblaze: Remove FSL support from generic boardMichal Simek2013-02-04-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | This code was targetting one specific Microblaze platform configuration which is obsolete and fsl bus isn't used in this way. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | serial: arm_dcc: Remove CONFIG_ARM_DCC_MULTI optionMichal Simek2013-02-04-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_ARM_DCC_MULTI should be also removed in the patch "serial: Remove CONFIG_SERIAL_MULTI from serial drivers" (sha1: a3827250606895ec2dd4b8d867342b7cabf3692f) Because the driver defines serial_* functions which cause conflict with serial.c (multiple definition of serial_*) Removing CONFIG_SERIAL_MULTI function also require to define default_serial_console for cases where another serial driver is not available in the system. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Marek Vasut <marex@denx.de>
* | | cmd_time: merge run_command_and_time_it with cmd_processRichard Genoud2013-02-04-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As far as every arch has a get_timer function, run_command_and_time_it code can now disappear. Signed-off-by: Richard Genoud <richard.genoud@gmail.com> Acked-By: Che-Liang Chiou <clchiou@chromium.org> [trini: s/ulong/unsigned long/ in command.h portion] Signed-off-by: Tom Rini <trini@ti.com>
* | | FAT: use toupper/tolower instead of recoding themRichard Genoud2013-02-04-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | toupper/tolower function are already declared, so use them. Signed-off-by: Richard Genoud <richard.genoud@gmail.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* | | configs:Remove unused macro CONFIG_DISCOVER_PHYAshok2013-02-04-2/+0
| | | | | | | | | | | | | | | | | | | | | Remove unused macro CONFIG_DISCOVER_PHY from configs. Signed-off-by: Ashok Kumar Reddy <ashokkourla2000@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de>
* | | Add generic global_dataSimon Glass2013-02-04-0/+102
|/ / | | | | | | | | | | | | Add a generic global_data structure which all archs will eventually use. Signed-off-by: Simon Glass <sjg@chromium.org>
* | corenet: Disable video on P2020DSAndy Fleming2013-01-30-1/+1
| | | | | | | | | | | | | | | | The P2020DS build had grown too large, and video support isn't enabled in almost any other Freescale board. Disabling it allows us to keep building, and provides options for reenabling it later. Signed-off-by: Andy Fleming <afleming@freescale.com>
* | powerpc/85xx: Add BSC9132QDS supportPrabhakar Kushwaha2013-01-30-0/+667
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BSC9132QDS is a Freescale reference design board for BSC9132 SoC. BSC9132 SOC is an integrated device that targets the evolving Microcell, Picocell, and Enterprise-Femto base station market subsegments. It combines Power Architecture e500v2 and DSP StarCore SC3850 core technologies with MAPLE-B2F baseband acceleration processing elements. BSC9132QDS Overview -------------------- 2Gbyte DDR3 (on board DDR), Dual Ranki 32Mbyte 16bit NOR flash 128Mbyte 2K page size NAND Flash 256 Kbit M24256 I2C EEPROM 128 Mbit SPI Flash memory SD slot USB-ULPI eTSEC1: Connected to SGMII PHY eTSEC2: Connected to SGMII PHY PCIe CPRI SerDes I2C RTC DUART interface: supports one UARTs up to 115200 bps for console display Apart from the above it also consists various peripherals to support DSP functionalities. This patch adds support for mainly Power side functionalities and peripherals Signed-off-by: Naveen Burmi <NaveenBurmi@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | powerpc/p2041: set RCW and PBI files for .pbl build or P2041RDBValentin Longchamp2013-01-30-0/+2
| | | | | | | | | | | | | | | | | | | | | | In order to be able to build a u-boot.pbl image, both the CONFIG_PBLPBI_CONFIG and CONFIG_PBLRCW_CONFIG variables have to be defined. This patch sets these two files for the P2041RDB board. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | powerpc/b4860qds: Added Support for B4860QDSYork Sun2013-01-30-0/+820
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | B4860QDS is a high-performance computing evaluation, development and test platform supporting the B4860 QorIQ Power Architecture processor. B4860QDS Overview ------------------ - DDRC1: Ten separate DDR3 parts of 16-bit to support 72-bit (ECC) at 1866MT/s, ECC, 4 GB of memory in two ranks of 2 GB. - DDRC2: Five separate DDR3 parts of 16-bit to support 72-bit (ECC) at 1866MT/s, ECC, 2 GB of memory. Single rank. - SerDes 1 multiplexing: Two Vitesse (transmit and receive path) cross-point 16x16 switch VSC3316 - SerDes 2 multiplexing: Two Vitesse (transmit and receive path) cross-point 8x8 switch VSC3308 - USB 2.0 ULPI PHY USB3315 by SMSC supports USB port in host mode. - B4860 UART port is available over USB-to-UART translator USB2SER or over RS232 flat cable. - A Vitesse dual SGMII phy VSC8662 links the B4860 SGMII lines to 2xRJ-45 copper connectors for Stand-alone mode and to the 1000Base-X over AMC MicroTCA connector ports 0 and 2 for AMC mode. - The B4860 configuration may be loaded from nine bits coded reset configuration reset source. The RCW source is set by appropriate DIP-switches: - 16-bit NOR Flash / PROMJet - QIXIS 8-bit NOR Flash Emulator - 8-bit NAND Flash - 24-bit SPI Flash - Long address I2C EEPROM - Available debug interfaces are: - On-board eCWTAP controller with ETH and USB I/F - JTAG/COP 16-pin header for any external TAP controller - External JTAG source over AMC to support B2B configuration - 70-pin Aurora debug connector - QIXIS (FPGA) logic: - 2 KB internal memory space including - IDT840NT4 clock synthesizer provides B4860 essential clocks : SYSCLK, DDRCLK1, 2 and RTCCLK. - Two 8T49N222A SerDes ref clock devices support two SerDes port clocks - total four refclk, including CPRI clock scheme Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Sandeep Singh <Sandeep@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | powerpc/mpc8544ds: Add USB controller support for MPC8544DSHongtao Jia2013-01-30-0/+12
| | | | | | | | | | | | | | | | | | USB controller in uboot is a required feature for MPC8544DS. Without this support there is no 'usb' command in uboot. Signed-off-by: Jia Hongtao <B38951@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | powerpc/mpc8572ds: Enable bank interleaving to cs0+cs1 for dual-rank DIMMsHongtao Jia2013-01-30-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The controller interleaving only takes the usable memory mapped to cs0. In the case of bank interleaving not enabled, only half of dual-rank DIMM will be used. For single-rank DIMM bank interleaving will be auto disabled. Signed-off-by: Jia Hongtao <B38951@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | powerpc/t4240qds: Update IFC timing for NOR flashYork Sun2013-01-30-5/+5
| | | | | | | | | | | | | | | | Relax parameters to give address latching more time to setup. Tighten parameters to make it overall faster. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
generated by cgit v1.1 at 2024-11-18 23:10:51 +0000