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* dm: core: Allow the uclass to set up a device's child after bindingSimon Glass2015-01-29-0/+2
| | | | | | | | | | | | For buses, after a child is bound, allow the uclass to perform some processing. This can be used to figure out the address of the child (e.g. the chip select for SPI slaves) so that it is ready to be probed. This avoids bus drivers having to repeat the same process, which really should be done by the uclass, since it is common. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* dm: core: Allow uclasses to specify private data for a device's childrenSimon Glass2015-01-29-0/+4
| | | | | | | | | | | | | | In many cases the per-child private data for a device's children is defined by the uclass rather than the individual driver. For example, a SPI bus needs to store information about each of its children, but all SPI drivers store the same information. It makes sense to allow the uclass to define this data. If the driver provides a size value for its per-child private data, then use it. Failng that, fall back to that provided by the uclass. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* dm: core: Add a flag to control sequence numberingSimon Glass2015-01-29-0/+5
| | | | | | | | | | | | | | | | At present we try to use the 'reg' property and device tree aliases to give devices a sequence number. The 'reg' property is often actually a memory address, so the sequence numbers thus-obtained are not useful. It would be better if the devices were just sequentially numbered in that case. In fact neither I2C nor SPI use this feature, so drop it. Some devices need us to look up an alias to number them within the uclass. Add a flag to control this, so it is not done unless it is needed. Adjust the tests to test this new behaviour. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* dm: core: Add a function to get a device's uclass IDSimon Glass2015-01-29-0/+8
| | | | | | | This is useful to check which uclass a device is in. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* dm: core: Add a post_bind method for parentsSimon Glass2015-01-29-0/+2
| | | | | | | | Allow parent drivers to be called when a new child is bound to them. This allows a bus to set up information it needs for that child. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* dm: core: Allow uclasses to specify platdata for a device's childrenSimon Glass2015-01-29-0/+5
| | | | | | | | | | | | | | In many cases the child platform data for a device's children is defined by the uclass rather than the individual devices. For example, a SPI bus needs to know the chip select and speed for each of its children. It makes sense to allow this information to be defined the SPI uclass rather than each individual driver. If the device provides a size value for its child platdata, then use it. Failng that, fall back to that provided by the uclass. Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: core: Allow parents to have platform data for their childrenSimon Glass2015-01-29-0/+19
| | | | | | | | | | | | For buses it is common for parents to need to know the address of the child on the bus, the bus speed to use for that child, and other information. This can be provided in platform data attached to each child. Add driver model support for this, including auto-allocation which can be requested using a new property to specify the size of the data. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* dm: core: Improve comments for uclass_first/next_device()Simon Glass2015-01-29-0/+4
| | | | | | Mention that the devices are probed ready for use. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: i2c: Provide an offset length parameter where neededSimon Glass2015-01-29-2/+6
| | | | | | | | | | Rather than assuming that the chip offset length is 1, allow it to be provided. This allows chips that don't use the default offset length to be used (at present they are only supported by the command line 'i2c' command which sets the offset length explicitly). Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de>
* dm: i2c: Add a compatbility layerSimon Glass2015-01-29-0/+59
| | | | | | | | | | | | | For boards which use multiple I2C devices, or for SOCs which support multiple boards, we might want to convert these to driver model at different times. At present this is difficult because we need to either use CONFIG_DM_I2C for a board or not. Add a compatibility layer which implements the old API, thus allowing a board to move to driver model for I2C without requiring that everything it uses is moved in the same commit. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: i2c: Rename driver model I2C functions to permit compatibilitySimon Glass2015-01-29-10/+9
| | | | | | | | | | | Add a dm_ prefix to driver model I2C functions so that we can keep the old ones around. This is a little unfortunate, but on reflection it is too difficult to change the API. We can undo this rename when most boards and drivers are converted to use driver model for I2C. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: fdt: Remove the old GPIO functionsSimon Glass2015-01-29-77/+0
| | | | | | | Now that we support device tree GPIO bindings directly in the driver model GPIO uclass we can remove these functions. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: mmc: Remove use of fdtdec GPIO supportSimon Glass2015-01-29-3/+3
| | | | | | These functions are going away, so use the new uclass support instead. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: cros_ec: Remove use of fdtdec GPIO supportSimon Glass2015-01-29-1/+2
| | | | | | These functions are going away, so use the new uclass support instead. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: demo: Add a simple GPIO demonstrationSimon Glass2015-01-29-0/+4
| | | | | | | | Add a new 'demo light' command which uses GPIOs to control imaginary lights. Each light is assigned a bit number in the overall value. This provides an example driver for using the new GPIO API. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: gpio: Mark the old GPIO API deprecatedSimon Glass2015-01-29-0/+21
| | | | | | | Add a deprecation notice to each function so that it is more obvious that we are moving GPIOs to driver model. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: gpio: Add better functions to request GPIOsSimon Glass2015-01-29-0/+199
| | | | | | | | | | | | | | | | | | | | | | | At present U-Boot sort-of supports the standard way of reading GPIOs from device tree nodes, but the support is incomplete, a bit clunky and only works for GPIO bindings where #gpio-cells is 2. Add new functions to request GPIOs, taking full account of the device tree binding. These permit requesting a GPIO with a simple call like: gpio_request_by_name(dev, "cd-gpios", 0, &desc, GPIOD_IS_IN); This will request the GPIO, looking at the device's node which might be this, for example: cd-gpios = <&gpio TEGRA_GPIO(B, 3) GPIO_ACTIVE_LOW>; The GPIO will be set to input mode in this case and polarity will be honoured by the GPIO calls. It is also possible to request and free a list of GPIOs. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: gpio: Add a driver GPIO translation methodSimon Glass2015-01-29-0/+29
| | | | | | | | | Only the GPIO driver knows about the full GPIO device tree binding used by a device. Add a method to allow the driver to provide this information to the uclass, including the GPIO offset within the device and flags such as the polarity. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: gpio: Add a native driver model APISimon Glass2015-01-29-0/+16
| | | | | | | | | | | | | | | | | | | | | | | So far driver model's GPIO uclass just implements the existing GPIO API. This has some limitations: - it requires manual device tree munging to support GPIOs in device tree (fdtdec_get_gpio() and friends) - it does not understand polarity - it is somewhat slower since we must scan for the GPIO device each time - Global GPIO numbering can change if other GPIO drivers are probed - it requires extra steps to set the GPIO direction and value The new functions have a dm_ prefix where necessary to avoid name conflicts but we can remove that when it is no-longer needed. The new struct gpio_desc holds all required information about the GPIO. For now this is intended to be stored by the client requesting the GPIO, but in future it might be brought into the uclass in some way. With these changes the old GPIO API still works, and uses the driver model API underneath. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: fdt: Add a function to decode phandles with argumentsSimon Glass2015-01-29-0/+53
| | | | | | | | | | | For GPIOs and other functions we want to look up a phandle and then decode a list of arguments for that phandle. Each phandle can have a different number of arguments, specified by a property in the target node. This is the "#gpio-cells" property for GPIOs. Add a function to provide this feature, taken modified from Linux 3.18. Signed-off-by: Simon Glass <sjg@chromium.org>
* generic-board: show model name in board_init_f() tooMasahiro Yamada2015-01-29-6/+7
| | | | | | | | | | | | | The common/board_r.c has show_model_r() to display the model name if the DTB has a "model" property. It sounds useful to have a similar function in common/board_f.c too because most of the boards show their board name before relocation. Instead of implementing the same function in both common/board_f.c and common/board_r.c, let's split it up into common/show_board_info.c. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
* ARM: UniPhier: enable CONFIG_I2C_EEPROMMasahiro Yamada2015-01-29-0/+3
| | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-x86Tom Rini2015-01-26-3/+89
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| * x86: config: chromebook_link: Enable environmentSimon Glass2015-01-24-0/+7
| | | | | | | | | | | | | | Enable an environment area. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: config: Enable hook for saving MRC configurationSimon Glass2015-01-24-0/+1
| | | | | | | | | | | | | | Add a hook to ensure that this information is saved. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: spi: Add device tree supportSimon Glass2015-01-24-0/+1
| | | | | | | | | | | | | | As a temporary measure before the ICH driver moves over to driver model, add device tree support to the driver. Signed-off-by: Simon Glass <sjg@chromium.org>
| * x86: rtc: mc146818: Add helpers to read/write CMOS RAMSimon Glass2015-01-24-0/+32
| | | | | | | | | | | | | | On x86 we use CMOS RAM to read and write some settings. Add basic support for this, including access to registers 128-255. Signed-off-by: Simon Glass <sjg@chromium.org>
| * net: Add a separate file for IP checksummingSimon Glass2015-01-23-0/+30
| | | | | | | | | | | | | | | | Move the checksum code out into its own file so it can be used elsewhere. Also use a new version which supports a length which is not a multiple of 2 and add a new function to add two checksums. Signed-off-by: Simon Glass <sjg@chromium.org>
| * x86: dts: Add compatible string for Intel ICH9 SPI controllerSimon Glass2015-01-23-0/+1
| | | | | | | | | | | | | | Add this to the enum so that we can use the various fdtdec functions. A later commit will move this driver to driver model. Signed-off-by: Simon Glass <sjg@chromium.org>
| * x86: config: Always scroll the display by 5 lines, for speedSimon Glass2015-01-23-0/+1
| | | | | | | | | | | | | | | | Scrolling a line at a time is very slow for reasons that I don't understand. It seems to take about 100ms to copy 4MB of RAM in the frame buffer. To cope with this, scroll 5 lines each time. Signed-off-by: Simon Glass <sjg@chromium.org>
| * x86: Access the VGA ROM when neededSimon Glass2015-01-23-0/+9
| | | | | | | | | | | | | | Add code to the generic pci_rom file to access the VGA ROM in PCI space when needed. Signed-off-by: Simon Glass <sjg@chromium.org>
| * bios_emulator: Add some VESA interface debuggingSimon Glass2015-01-23-2/+7
| | | | | | | | | | | | Allow the supported modes to be listed when in debug mode. Signed-off-by: Simon Glass <sjg@chromium.org>
| * x86: Support ROMs on other archsSimon Glass2015-01-23-1/+0
| | | | | | | | | | | | | | | | We shouldn't assume that the VGA ROM can always be loaded at c0000. This is only true on x86 machines. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-atmelTom Rini2015-01-26-4/+41
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| * | ARM: atmel: sama5d4_xplained: enable usb ethernet gadgetBo Shen2015-01-19-0/+8
| | | | | | | | | | | | Signed-off-by: Bo Shen <voice.shen@atmel.com>
| * | ARM: atmel: sama5d4ek: enable usb ethernet gadgetBo Shen2015-01-19-0/+8
| | | | | | | | | | | | Signed-off-by: Bo Shen <voice.shen@atmel.com>
| * | arm: at91: snapper9260: Drop invalid CONFIG_SKIP_RELOCATE_UBOOTSimon Glass2015-01-19-1/+0
| | | | | | | | | | | | | | | | | | This config is not valid, so drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | ARM: at91: sama5d3_xplained: spl: enable PMECC header generationWu, Josh2015-01-19-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | As sama5d3 xplained support the PMECC. So add the PMECC header for spl binary. That make ROM loader can use PMECC to avoid error flips in spl code in nandflash. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Bo Shen <voice.shen@atmel.com>
| * | arm, at91: corvus board updatesHeiko Schocher2015-01-19-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - corvus board fix problems with toshiba nand chips on the corvus board problems with toshiba chips Manufacturer ID: 0x98 Chip ID: 0xdc encounterd. Solve this in the following way: - set other nand timings - enable CONFIG_SYS_NAND_READY_PIN - correct the MACH_TYPE setting Signed-off-by: Heiko Schocher <hs@denx.de>
| * | taurus, spl: erase also spi flash if recovery button is pressedHeiko Schocher2015-01-19-1/+17
| | | | | | | | | | | | | | | | | | | | | if in SPL mode recovery button is pressed, erase also spi flash from offset 0 to CONFIG_SYS_NAND_U_BOOT_SIZE on the taurus board. Signed-off-by: Heiko Schocher <hs@denx.de>
| * | arm, at91: enable thumb mode for taurus board in SPLHeiko Schocher2015-01-19-0/+5
| | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* | | Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblazeTom Rini2015-01-26-10/+67
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| * | | ARM: zynq: Add USB lthor download protocol supportSiva Durga Prasad Paladugu2015-01-26-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | updated the zynq config to support the lthor download protocol. This lthor functionality helps us to load linux images on to DDR/MMC and can boot linux using bootm. In order to load images the user should run lthor command run "thor_ram" from u-boot prompt and then send the images from host using lthor utility. Define g_dnl_bind_fixup for zynq so that correct vendor and product ids assigned incase of DFU and lthor. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | ARM: zynq: Enable DFU functionality in zynqSiva Durga Prasad Paladugu2015-01-26-2/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable DFU functionality in zynq. This DFU functionality helps us to load linux images on to DDR and can boot linux using bootm. In order to load images the user should run dfu command "dfu 0 ram 0" from u-boot prompt and then send the images from host. The malloc size has been increased to match the DFU buffer requirements. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | ARM: zynq: provide config option to select emioSiva Durga Prasad Paladugu2015-01-26-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Dont send always emio value as zero for zynq_gem_initialize send it based on config. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | ARM: zynq: Group ethernet configuration options togetherMichal Simek2015-01-26-6/+5
| | | | | | | | | | | | | | | | | | | | | | | | No functional chagnes. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | ARM: zynq: Use CMD_FS_GENERICMichal Simek2015-01-26-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on: "am335x_evm: Enable CMD_EXT4 and CMD_FS_GENERIC, add bootpart to env" (sha1: 73a27a84e58cb99b4e64ed6a35eab5bc61f44f29) Fix filesystem specific commands for loading. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | ARM: zynq: Show board information by defaultMichal Simek2015-01-26-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Show board information in bootlog and enable it by default. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-marvellTom Rini2015-01-25-17/+79
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| * | | | marvell: kirkwood: guruplug refresh for newer kernelGerald Kerma2015-01-26-17/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Refresh for newer kernel. Prepare ENV settings for sheevaplugs to be OpenWRT ready. +----------+ | UBOOT | >> 896 Kb (7x128) = uboot +----------+ | ENV | >> 128 Kb = uboot_env +----------+ | ROOT(FS) | >> 511 Mb @ 1 Mb = root -> rootfs (ubifs) +----------+ With (CC) TRUNK OpenWRT build (QUICK HOWTO) : <INTERRUPT> Marvell>> nand erase.part root Marvell>> ubi part root Marvell>> ubi remove rootfs Marvell>> ubi create rootfs Marvell>> usb reset Marvell>> fatload usb 2:1 0x800000 guruplug/openwrt/openwrt-kirkwood-guruplug-rootfs.ubifs Marvell>> ubi write 0x800000 rootfs ${filesize} Marvell>> reset Changes in v1: - ADD generic board define - ADD FDT support - ADD HUSH interpreter - Define new NAND partition mapping Signed-off-by: Gerald Kerma <dreagle@doukki.net>
generated by cgit v1.1 at 2024-11-17 20:53:53 +0000