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* Blackfin: cm-bf548: new board portMike Frysinger2009-06-14-0/+141
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: tcm-bf537: new board portMike Frysinger2009-06-14-0/+125
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: cm-bf561: new board portMike Frysinger2009-06-14-0/+104
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: cm-bf537e: new board portMike Frysinger2009-06-14-0/+124
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: cm-bf533: new board portMike Frysinger2009-06-14-0/+104
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: new spibootldr commandMike Frysinger2009-06-14-0/+28
| | | | | | | Newer Blackfin parts can an on-chip ROM that can boot LDRs over SPI flashes, so add a new 'spibootldr' command to take advantage of it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* 85xx: Add PORBMSR and PORDEVSR shift definesPeter Tyser2009-06-12-0/+2
| | | | | | | | | Add defines similar to those already used for the the 86xx architecture. This will ease sharing of PCI code between the 85xx and 86xx architectures. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl/85xx, 86xx: Sync up DMA codePeter Tyser2009-06-12-0/+2
| | | | | | | | | | | | | | | | | | | | | The following changes were made to sync up the DMA code between the 85xx and 86xx architectures which will make it easier to break out common 8xxx DMA code: 85xx: - Don't set STRANSINT and SPCIORDER fields in SATR register. These bits only have an affect when the SBPATMU bit is set. - Write 0xffffffff instead of 0xfffffff to clear errors in the DMA status register. We may as well clear all 32 bits of the register... 86xx: - Add CONFIG_SYS_MPC86xx_DMA_ADDR define to address DMA registers - Add clearing of errors in the DMA status register when initializing the controller - Clear the channel start bit in the DMA mode register after a transfer Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl: Create common fsl_dma.h for 85xx and 86xx cpusPeter Tyser2009-06-12-146/+57
| | | | | | | | Break out DMA structures for the Freescale MPC85xx and MPC86xx cpus to reduce a large amount of code duplication Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Add UEC6 and UEC8 at SGMII mode for MPC8569MDSHaiying Wang2009-06-12-0/+25
| | | | | | | | | On MPC8569MDS board, UCC6 and UCC8 can be configured to work at SGMII mode via UEM on PB board. Since MPC8569 supports up to 4 Gigabit Ethernet ports, we disable UEC6 and UEC8 by default. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Add RMII support for MPC8569MDSHaiying Wang2009-06-12-4/+34
| | | | | | | | | This patch supports UCC working at RMII mode on PIB board, fixup fdt blob to support rmii in kernel. It also changes the name of enable_mpc8569mds_qe_mdio to enalbe_mpc8569mds_qe_uec which is more accurate. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Add UEC3 and UEC4 support for MPC8569MDSHaiying Wang2009-06-12-0/+23
| | | | | Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* drivers/qe: Add more SNUM number for QEHaiying Wang2009-06-12-1/+4
| | | | | | | | | Some QE chips like 8569 need more SNUM numbers for supporting 4 UECs in RGMII- 1000 mode. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Acked-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* drivers/qe: Change QE RISC ALLOCATION to support 4 RISCsHaiying Wang2009-06-12-0/+8
| | | | | | | | | Also define the QE_RISC_ALLOCATION_RISCs to MACROs instead of using enum, and define MAX_QE_RISC for QE based silicons. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Acked-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Add QE clk supportHaiying Wang2009-06-12-0/+3
| | | | | | Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Acked-by: Timur Tabi <Timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Added MPC8535/E identifiersKumar Gala2009-06-12-0/+2
| | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Add P2020DS supportSrikanth Srinivasan2009-06-12-0/+741
| | | | | | | | | | | | | The patch adds support for P2020DS reference platform. DDR3 interface uses hard-coded initialization rather than SPD for now and was tested at 667Mhz. Some PIXIS register definitions and associated code sections need to be fixed. TSEC1/2/3, NOR flash, MAC/SYS ID EEPROM, PCIE1/2/3 are all tested under u-boot. Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com> Signed-off-by: Travis Wheatley <Travis.Wheatley@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* mpc512x: MPC5121ADS: Add NAND supportStefan Roese2009-06-12-1/+21
| | | | | | | | | | This patch adds NAND support to the MPC5121ADS board. Please note that the image size increased since NAND support didn't fit in the current image size (256k). Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Wolfgang Denk <wd@denx.de>
* mpc512x: Add esd gmbh mecp5123 board supportStefan Roese2009-06-12-0/+458
| | | | | | | MECP5123 is a MPC5121E based module by esd gmbh. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
* mcp512x: Add macros for SCFR LPC divisor accessStefan Roese2009-06-12-0/+3
| | | | | | Thos macros will be used by the esd mecp5123 board. Signed-off-by: Stefan Roese <sr@denx.de>
* 74xx_7xx: CPCI750: Add CPCI adapter/target supportStefan Roese2009-06-12-0/+2
| | | | | | | | The CPCI750 can be built as CPCI host or adapter/target board. This patch adds support for runtime detection of those variants. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
* 74xx_7xx: CPCI750: Add commandline editing/historyStefan Roese2009-06-12-1/+2
| | | | | Signed-off-by: Stefan Roese <sr@denx.de> Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
* mpc85xx: 8536ds: Add USB related CONFIGsVivek Mahajan2009-06-12-2/+12
| | | | | | | | | This patch adds CONFIGs for enabling USB in mpc8536ds and also adds usb_phy_type in CONFIG_EXTRA_ENV_SETTINGS. Also revamps its Copyright. Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com> Signed-off-by: Remy Bohmer <linux@bohmer.net>
* mpc83xx: 8315erdb: Add USB related CONFIGsVivek Mahajan2009-06-12-1/+10
| | | | | | | | | This patch adds CONFIGs for enabling USB in mpc8315erdb and also adds usb_phy_type in CONFIG_EXTRA_ENV_SETTINGS. Also revamps its Copyright. Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com> Signed-off-by: Remy Bohmer <linux@bohmer.net>
* mpc85xx: USB: Add supportVivek Mahajan2009-06-12-1/+6
| | | | | | | | The following patch adds 85xx-specific USB support and also revamps Copyright in immap_85xx.h Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com> Signed-off-by: Remy Bohmer <linux@bohmer.net>
* mpc83xx: USB: Reorganized its supportVivek Mahajan2009-06-12-2/+66
| | | | | | | | | | | | | | | | | The following patch reorganizes/reworks the USB support for mpc83xx as under:- * Moves the 83xx USB clock init from drivers/usb/host/ehci-fsl.c to cpu/mpx83xx/cpu_init.c * Board specific usb_phy_type is read from the environment * Adds USB EHCI specific structure in include/usb/ehci-fsl.h * Copyrights revamped in most of the following files Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com> Signed-off-by: Remy Bohmer <linux@bohmer.net>
* mpc8xxx: USB: Relocates ehci-fsl.h to include/usbVivek Mahajan2009-06-12-0/+86
| | | | | | | | The following patch moves 8xxx-specifc USB #defines from drivers/usb/host/ehci-fsl.h to include/usb. Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com> Signed-off-by: Remy Bohmer <linux@bohmer.net>
* 83xx: Replace CONFIG_MPC83[0-9]X with MPC83[0-9]xPeter Tyser2009-06-12-45/+45
| | | | | | | | Use the standard lowercase "x" capitalization that other Freescale architectures use for CPU defines to prevent confusion and errors Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* 83xx: Replace CONFIG_MPC83XX with CONFIG_MPC83xxPeter Tyser2009-06-12-26/+26
| | | | | | | | Use the standard lowercase "xx" capitalization that other Freescale architectures use for CPU defines to prevent confusion and errors Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* MPC512x: add support for ARIA boardWolfgang Denk2009-06-12-0/+554
| | | | | | | ARIA is a MPC5121E based COM Express module by Dave/DENX. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: John Rigby <jcrigby@gmail.com>
* MPC512x: remove include/mpc512x.hWolfgang Denk2009-06-12-708/+327
| | | | | | | | | | | | | | | | | | | | Move needed definitions (register descriptions etc.) from include/mpc512x.h into include/asm-ppc/immap_512x.h. Instead of using a #define'd register offset, use a function that provides the PATA controller's base address. All the rest of include/mpc512x.h are register offset definitions which can be eliminated by proper use of C structures. There are only a few register offsets remaining that are needed in cpu/mpc512x/start.S; for these we provide cpu/mpc512x/asm-offsets.h which is intended as a temporary workaround only. In a later patch this file will be removed, too, and then auto-generated from the respective C structs. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: John Rigby <jcrigby@gmail.com>
* MPC512x: add more hardware description to immap_512x.hWolfgang Denk2009-06-12-5/+248
| | | | | | | | | | | | | - add GPIO module description - add Address Latch Timing Register description - add IO Control Memory Map - add FEC Memory Map Also change board/freescale/mpc5121ads/mpc5121ads.c and cpu/mpc512x/iopin.c as needed. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: John Rigby <jcrigby@gmail.com>
* Rename ads5121 board into mpc5121adsWolfgang Denk2009-06-12-12/+12
| | | | | | | | | We rename the board so we use a consistent name in U-Boot and in Linux. Also, we use this opportunity to move the board into the Freecale vendor directory. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: John Rigby <jcrigby@gmail.com>
* Make "usage" messages more helpful.Wolfgang Denk2009-06-12-1/+1
| | | | | | | | | | | | | | | | | | In case of incorrect command invocations U-Boot used to print pretty useless "usage" messages, for example: => nand markbad Usage: nand - NAND sub-system In the result, the user would have to run the "help" command to get the (available) information about correct command usage. Change this, so that this information gets always printed. Note that this changes the user interface of all commands, but hopefully to the better. Signed-off-by: Wolfgang Denk <wd@denx.de>
* Add support for Linux-like kallsysmsMike Frysinger2009-06-12-1/+4
| | | | | | | The kernel stores address<->symbol names in it so things can be decoded at runtime. Do it in U-Boot, and we get nice symbol decoding when crashing. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* mtd: MTD related config header changes (mtdparts command)Stefan Roese2009-06-12-0/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | By changing the cmd_mtdparts to only use the MTD infrastructure and not the direct interface to the CFI NOR FLASH driver we now need to add the MTD infrastructure to all boards using those mtdparts commands. This patch adds those components: CONFIG_MTD_DEVICE (for all FLASH types) plus CONFIG_FLASH_CFI_MTD (for NOR FLASH) To all board maintainers: Please test this on your platforms and report any problems/issues found. Thanks. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Ron Madrid <info@sheldoninst.com> Cc: Georg Schardt <schardt@team-ctech.de> Cc: Michal Simek <monstr@monstr.eu> Cc: Ladislav Michl <ladis@linux-mips.org> Cc: Martin Krause <martin.krause@tqs.de> Cc: Gary Jennejohn <garyj@denx.de> Cc: Ricardo Ribalda <ricardo.ribalda@uam.es>
* mtd: Update MTD infrastructure to support 64bit device sizeStefan Roese2009-06-12-8/+21
| | | | | | | | | | | This patch brings the U-Boot MTD infrastructure in sync with the current Linux MTD version (2.6.30-rc3). Biggest change is the 64bit device size support and a resync of the mtdpart.c file which has seen multiple fixes meanwhile. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Scott Wood <scottwood@freescale.com> Cc: Kyungmin Park <kmpark@infradead.org>
* mtd: Add MTD concat support to concatenate multiple MTD NOR devicesStefan Roese2009-06-12-4/+29
| | | | | | | | | This patch adds concatenation support to the U-Boot MTD infrastructure. By enabling CONFIG_MTD_CONCAT this MTD CFI wrapper will concatenate all found NOR devices into one single MTD device. This can be used by e.g by UBI to access a partition that spans over multiple NOR chips. Signed-off-by: Stefan Roese <sr@denx.de>
* ZOOM2 Define GPIO banks used.Tom Rix2009-06-12-0/+8
| | | | | | | Enable the function and interface clocks for banks 2,3,5 and 6. Signed-off-by: Tom Rix <Tom.Rix@windriver.com> Acked-by: Dirk Behme <dirk.behme@googlemail.com>
* Coldfire M5271: Activate u-boot system timer interrupt.Richard Retanubun2009-06-12-1/+1
| | | | | | | | | | This patch assigns the u-boot system timer interrupt to interrupt level 3, priority 6. Without this patch the interrupt will be a level 0, priority 0, which disables it and cause u-boot functions that relies on the timer (e.g. sleep command) to never return. Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
* arch_misc_init support for ARM architecturesPrafulla Wadaskar2009-06-12-0/+1
| | | | | | | This patch is required for Kirkwood support may be used by other ARM architectures Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
* at91: move cpu info print to cpuJean-Christophe PLAGNIOL-VILLARD2009-06-12-0/+1
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* at91: move cpu name define to arm/arch/ cpu headerJean-Christophe PLAGNIOL-VILLARD2009-06-12-8/+27
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* OMAP3: Zoom2: Enable Board and CPU infoDirk Behme2009-06-12-0/+6
| | | | | | | | | With other OMAP3 boards we recently switched to CPU and Board info API. From parallel merge, this is missing for Zoom2. Enable it for Zoom2, too. Signed-off-by: Dirk Behme <dirk.behme@googlemail.com> Acked-by: Tom Rix <Tom.Rix@windriver.com>
* ZOOM2 Add led support.Tom Rix2009-06-12-0/+16
| | | | | | This patch controls the large LED on the top left of the zoom2. Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
* ZOOM2 Add serial support.Tom Rix2009-06-12-13/+20
| | | | | | | | | | | | | | | | | | Zoom2 serial is in general supplied by one of the 4 UARTS on the debug board. The default serial is from the USB connector on left side of the debug board. The USB connector will produce 2 of the 4 UARTS. On your host pick the first enumeration. The details of the setting of the serial gpmc setup are not available. The values were provided by another party. The serial port set up is the same with Zoom1. Baud rate 115200, 8 bit data, no parity, 1 stop bit, no flow. The kernel bootargs are console=ttyS3,115200n8 Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
* lh7a40x: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-06-12-0/+2
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* pxa: move serial driver to drivers/serialJean-Christophe PLAGNIOL-VILLARD2009-06-12-0/+15
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* arm: remove cpu_initJean-Christophe PLAGNIOL-VILLARD2009-06-12-0/+1
| | | | | | move s3c44b0 to arch_cpu_init and as noone use cpu_init remove it Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* arm: unify interrupt initJean-Christophe PLAGNIOL-VILLARD2009-06-12-0/+1
| | | | | | | all arm init the IRQ stack the same way so unify it in lib_arm/interrupts.c and then call arch specific interrupt init Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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