| Commit message (Collapse) | Author | Age | Lines |
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Add aboot.o based on CONFIG_FASTBOOT
Add partition index for fastboot ptn table
Add return value for write_sparse_image to know the sparse write status
Add path to write_sparse_image based on the image received and partition to be flashed
Signed-off-by: guoyin.chen <guoyin.chen@freescale.com>
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update to provide usable implementation to U-Boot
Signed-off-by: Steve Rae <srae@broadcom.com>
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Add a BSD-3 relicensed version of the Android sparse format image
header from:
https://android.googlesource.com/platform/system/core/+/28fa5bc347390480fe190294c6c385b6a9f0d68b/libsparse/sparse_format.h
Unchanged except for the license header.
Cc: Tom Rini <trini@ti.com>
Signed-off-by: Colin Cross <ccross@android.com>
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Add pre-codes for i.MX7D 19x19 LPDDR3 validation board to
support devices:
EIMNOR, NAND, USDHC1, i2C, ENET2, PMIC, USB, QSPI, SPINOR.
build target: mx7d_19x19_lpddr3_arm2_config
mx7d_19x19_lpddr3_arm2_eimnor_config
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit f8f3a9f2323412168216e0515c5ad53cd006e076)
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* Add mx7d_12x12_ddr3_arm2 target board support
* Initial support for mx7d_12x12_ddr3_arm2 target
board add support for base hardware eMMC, SD and
ECSPI boot.
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
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* Allow to override mtest settings for target board
variants that differs on physical sdram memory size
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
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The ARM errata 751472, 794072, 761320, 845369 only applied
to the following configuration:
This erratum affects configurations with either:
- One processor if the ACP is present
- Two or more processors
i.MX6 family does not have the ACP and thus only the MPCore system
will be impacted, which are the i.MX6DQ, i.MX6DL, and i.MX6QP.
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
Signed-off-by: Jason Liu <r64343@freescale.com>
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Commit e9fd66defd7e (ARM: mx6: define CONFIG_ARM_ERRATA_742230) enables
errata 742230 for imx6, because it helps remove one reboot issue.
However, this errata does not really apply on imx6, because Cortex-A9
on imx6 is r2p10 while the errata only applies to revisions r1p0..r2p2.
At a later time, commit f71cbfe3ca5d (ARM: Add workaround for Cortex-A9
errata 794072) adds support of errata 794072, which applies to all
Cortex-A9 revisions. As the workaround for both errata are exactly
same, it makes a lot more sense to select 794072 instead of 742230 for
imx6. Since we already enable 794072 for imx6, it's time to drop
errata 742230 to avoid confusion.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Under very rare timing circumstances, transitioning into streaming
mode might create a data corruption. Present on Two or more processors
or 1 core with ACP, all revisions. This erratum can be worked round
by setting bit[22] of the undocumented Diagnostic Control Register to 1.
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
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add this parameter in u-boot as a temporary workaround.
Signed-off-by: Han Xu <b45815@freescale.com>
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The mx7dsabresd uses new LCD TFT43AB which has 480 x 272 pixels.
Update panel info for this LCD.
Signed-off-by: Ye.Li <B37916@freescale.com>
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To enable the EPDC feature:
1. Uncomments CONFIG_SPLASH_SCREEN and CONFIG_MXC_EPDC settings
in mx7dsabresd.h
2. cd <kernel_dir>/firmware/imx
3. python ihex2bin.py -i epdc_ED060XD4C1_TC.fw.ihex -o epdc_splash.bin
4. cp epdc_splash.bin to [FAT partition on SD card]
Since the EPDC has pinmux conflicts with ENET and QSPI. These two
modules can't work at same time.
Signed-off-by: Ye.Li <B37916@freescale.com>
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To enable the EPDC feature:
1. Uncomments CONFIG_SPLASH_SCREEN and CONFIG_MXC_EPDC settings
in mx7d_12x12_lpddr3_arm2.h
2. cd <kernel_dir>/firmware/imx
3. python ihex2bin.py -i epdc_ED060XD4C1_TC.fw.ihex -o epdc_splash.bin
4. cp epdc_splash.bin to [FAT partition on SD card]
Signed-off-by: Ye.Li <B37916@freescale.com>
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To support EPDC V2 on mx7d, update the mxc_epdc_fb.h for new registers
layout.
Signed-off-by: Ye.Li <B37916@freescale.com>
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Change to load EPDC waveform from FAT partition and allocate waveform
buffer, framebuffer and working buffer in dynamic manner not static.
So many EPDC configurations are removed.
To enable the EPDC feature, must define CONFIG_MXC_EPDC and CONFIG_SPLASH_SCREEN.
Signed-off-by: Ye.Li <B37916@freescale.com>
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This patch is to add atmel AT45DB021E spi flash support.
Since this flash is different from the spi flash that we previous use such
as m25p32 and spanion spi nor flashes, pieces of code are added.
1.
The default page size is 264 bytes, but the mtd/spi framework can not
handle such page. So we need to configure the page size from 264 to 256 bytes.
Page Size command seq
“Power of 2” binary page size (256 bytes)| 3Dh 2Ah 80h A6h
DataFlash page size (264 bytes) | 3Dh 2Ah 80h A7h
And when probe the flash, configure the flash to 256 bytes page size, if
the page size is already 256bytes, just return and do not configure it again.
The page size configuration times is only about 10000, so to avoid configuring
it each time.
2.
Add the flash params in sf_params.c.
3.
This flash support 2K block erase, add this flag.
4.
The status command is 0xD7, different from others. It's polling status
bit is Bit 7
-> 0 Device is busy with an internal operation.
-> 1 Device is ready.
This patch has been tested on mx7d 19x19 ddr3 arm2 board. And tested
on mx7d 12x12 lpddr3 board. All works fine.
Note:
Since this flash is only 256KB, we can not test spi boot on mx7d 19x19 arm2
board. If want to test this flash, open CONFIG_SYS_USE_SPINOR.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Since i.MX6QP changes some CCM registers, so modify the clocks settings to
follow the hardware changes.
A new CONFIG_MX6QP is introduced here and is used for the CCM difference.
At default CONFIG_MX6Q is enabled along with the CONFIG_MX6QP.
Signed-off-by: Ye.Li <B37916@freescale.com>
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Change QSPI FLASH vendor config from to MACRONIX, otherwise the flash
device can't be recognized.
Also change default sf probe parameter to 0:0 which means bus 0, cs 0.
Signed-off-by: Ye.Li <B37916@freescale.com>
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Update board codes to support GPMI NAND flash. Since the GPMI NAND needs
board rework, it is disabled at default. Two ways to enable GPMI NAND:
1. Define CONFIG_SYS_BOOT_NAND for NAND boot case
2. Modify the line 306 in mx7dsabresd.h from QSPI to NAND.
#define CONFIG_SYS_USE_QSPI /* Enable the QSPI flash at default */
to
#define CONFIG_SYS_USE_NAND /* Enable the NAND flash at default */
Signed-off-by: Ye.Li <B37916@freescale.com>
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Enable android fastboot, recovery, booti features for mx7d sabresd
board by using new build target: mx7devkandroid_config
Signed-off-by: Ye.Li <B37916@freescale.com>
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Update driver codes and registers define for MX7. Implement udc callback
function in MX7 arch.
Signed-off-by: Ye.Li <B37916@freescale.com>
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Add i.MX7D SABRESD board BSP codes, with enabled modules:
UART, PMIC, USB/OTG, SD, eMMC, ENET, I2C, 74LV IOX.
Build target: mx7dsabresd_config
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
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Add BSP codes, configuration head file and build target for
19x19 DDR3L ARM2 board with basic functions:
ENET2, I2C, SD/eMMC/MMC, USB, QSPI, ECSPI, pfuze3000 PMIC.
Build target: mx7d_19x19_ddr3_arm2_config
Signed-off-by: Ye.Li <B37916@freescale.com>
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Add BSP codes, configuration head file and build target for
12x12 LPDDR3 ARM2 board with basic functions:
ENET, I2C, SD/eMMC/MMC, USB, LCD Splash screen, QSPI, ECSPI,
pfuze3000 PMIC.
Signed-off-by: Ye.Li <B37916@freescale.com>
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Add mx7d_arm2.h for common part of all i.MX7D arm2 boards
Signed-off-by: Ye.Li <B37916@freescale.com>
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Add common head file mx7_common.h for all i.MX7 platform
Signed-off-by: Ye.Li <B37916@freescale.com>
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Update the u-boot code to support NAND chips with oob size up to 744
byte.
For the NAND flash MT29F32G08CBADA, which consists of 2 planes x 1064
blocks per plane. Obviously the block number is not power-of-2. But all
MTD driver assumes the page per block and block per plane must be a
power of 2 number. So the last 40 blocks in each plane must be
truncated.
Signed-off-by: Allen Xu <b45815@freescale.com>
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Set CONFIG_SYS_MAXARGS to be 256, which aligned with mx6sx boards config
Signed-off-by: guoyin.chen <guoyin.chen@freescale.com>
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Align the "MLK-9918: Reserve more space in uboot partition for NAND boot configurations"
to enlarge the bootloader partition to be 64M
Signed-off-by: guoyin.chen <guoyin.chen@freescale.com>
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The PCIe support in uboot would bring failures in i.MX6SX PCIe
EP/RC validations. Disable PCIe support in uboot here.
RootCause: The bit10(ltssm_en) of GPR12 would be set in uboot,
thus the i.MX6SX PCIe EP would be cheated that the other i.MX6SX
PCIe RC had been configured and trying to setup PCIe link
directly, although the i.MX6SX RC is not properly configured
at that time.
PCIe can be supported in uboot, if the i.MX6SX PCIe EP/RC
validation is not running.
Signed-off-by: Richard Zhu <Richard.Zhu@freescale.com>
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Enable GIS function on imx6sx SDB uboot.
Expand CONFIG_SYS_MALLOC_LEN to 16M.
Signed-off-by: Sandor Yu <R01008@freescale.com>
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kernel and dtb file location should be changed from 0x1000000 and
0x2000000 to 0x4000000 and 0x5000000, since the uboot partition expanded
to 64M.
Signed-off-by: Allen Xu <b45815@freescale.com>
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Expand the uboot space to 64m to reserve enough space for FCB, DBBT and
u-boot.
Signed-off-by: Allen Xu <b45815@freescale.com>
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Modified the mtd index for imx6 sabreauto board, split the parallel nor
to two partitions and the NAND index could be align with imx6sx board for
mfgtool download.
Signed-off-by: Allen Xu <b45815@freescale.com>
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On imx6sx sabreauto, both QSPI1 and NAND would be mapped as mtd devices,
since we have already set the kernel to load QSPI1 first, the mtd index
for NAND need to be changed.
Signed-off-by: Allen Xu <b45815@freescale.com>
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MX6SX sabreauto board has analog video input from VADC. Add the GIS
support for this board that video input can display on LVDS at booting.
The environment variable "gis" must be set to "vadc" to enable the function.
Signed-off-by: Ye.Li <B37916@freescale.com>
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For NAND boot, the kernel zImage and rootfs also need to load from
NAND. Add the environment variables for this.
Signed-off-by: Ye.Li <B37916@freescale.com>
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Fix the GPIO assignments as per the board schematics.
Signed-off-by: Richard Zhu <richard.zhu@freescale.com>
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The MAX7310 uses I2C3 bus. At system initialization, enable the driver to:
1. Reset CPU_PER_RST_B signal
2. Set the steering for ENET
3. Enable the LVDS display
Signed-off-by: Ye.Li <B37916@freescale.com>
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Add android fastboot, recovery and booti support for mx6sx sabreauto board.
Signed-off-by: Ye.Li <B37916@freescale.com>
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define CONFIG_SPI_FLASH_BAR in mx6sx_arm2.h mx6sxsabreauto.h to
enable access to flash array higher than 16MB.
CONFIG_SPI_FLASH_BAR is also set in mx6sxsabresd.h for RevB board.
Actually, if QSPI flash size <= 16MB, setting CONFIG_SPI_FLASH_BAR
has not effect.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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The mx6sx sabreauto boards uses 2G DDR3. Modify the configuration
PHYS_SDRAM_SIZE to this size.
Signed-off-by: Ye.Li <B37916@freescale.com>
Acked-by: Jason Liu
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Create mx6sx sabreauto BSP file and configurations. The devices below
have been supported:
1. SD/MMC/eMMC on SDA/SDB (base board) sockets
2. USB OTG port and USB HOST port (base board)
3. NAND flash
4. QuadSPI flash on QSPI1
5. I2C
6. PMIC PFUZE100
7. Onboard ethernet chip on ENET2
8. Splash screen on LVDS
Signed-off-by: Ye.Li <B37916@freescale.com>
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Set the CONFIG_MXC_GPT_HCLK configuration in mx6_common.h, so that
enable the 24Mhz OSC GPT on all MX6 platforms.
Signed-off-by: Ye.Li <B37916@freescale.com>
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Couple of issues in commit 21a2eb5f. The RAM size is wrong and
max number of DCD is 220.
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
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Enable pcie support in uboot on imx6sx sd boards
- enable_pcie_clock should be call before ssp_en is set,
since that ssp_en control the phy_ref clk gate, turn on
it after the source of the pcie clks are stable.
- add debug info
- add rx_eq of gpr12 on imx6sx
- there are random link down issue on imx6sx. It's
pcie ep reset issue.
solution:reset ep, then retry link can fix it.
Signed-off-by: Richard Zhu <r65037@freescale.com>
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set console value to show download log info for mfgtool NAND download.
Signed-off-by: Allen Xu <b45815@freescale.com>
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Since QSPI will be disabled for NAND module(pin conflict), the mtd
partition number will be count from 0, the last partition for rootfs
need to be changed from 4 to 3.
Signed-off-by: Allen Xu <b45815@freescale.com>
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imx6 q/dl/solo pcie would be failed to work properly in kernel, if
the pcie module is iniialized/enumerated both in uboot and linux
kernel.
rootcause:imx6 q/dl/solo pcie don't have the reset mechanism.
it is only be RESET by the POR. So, the pcie module only be
initialized/enumerated once in one POR.
Set to use pcie in kernel defaultly, mask the pcie config here.
Remove the mask freely, if the uboot pcie functions, rather than
the kernel's, are required.
Signed-off-by: Richard Zhu <r65037@freescale.com>
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The iMX6SX SABRESD RevB board uses Micron N25Q128 to replace Spansion S25FL128
on RevA board.
So enable the CONFIG_SPI_FLASH_STMICRO and CONFIG_SPI_FLASH_SPANSION to support
both two revisions.
Signed-off-by: Ye.Li <B37916@freescale.com>
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