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* Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini2013-06-24-1/+28
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| * net: add Faraday FTMAC110 10/100Mbps ethernet supportKuo-Jung Su2013-06-24-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Faraday FTMAC110 10/100Mbps supports half-word data transfer for Linux. However it has a weird DMA alignment issue: (1) Tx DMA Buffer Address: 1 bytes aligned: Invalid 2 bytes aligned: O.K 4 bytes aligned: O.K (2) Rx DMA Buffer Address: 1 bytes aligned: Invalid 2 bytes aligned: O.K 4 bytes aligned: Invalid!!! Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Tom Rini <trini@ti.com>
| * net: phy: supplement support for Micrel's KSZ9031SARTRE Leo2013-06-24-0/+11
| | | | | | | | | | | | Add function ksz9031_phy_extended_write and ksz9031_phy_extended_read Signed-off-by: Leo Sartre <lsartre@adeneo-embedded.com>
| * ARM: at91sam9n12: add network support with ksz8851_16mllBo Shen2013-06-24-0/+4
| | | | | | | | | | | | | | add network support with ksz8851_16mll on at91sam9n12ek board Signed-off-by: Bo Shen <voice.shen@atmel.com> Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * net: ks8851_mll: add ethernet supportRoberto Cerati2013-06-24-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | The device interface is 16 bits wide. All the available packets are read from the incoming fifo. Signed-off-by: Roberto Cerati <roberto.cerati@bticino.it> Signed-off-by: Raffaele Recalcati <raffaele.recalcati@bticino.it> [voice.shen@atmel.com: address comments from review results] [voice.shen@atmel.com: clean up for submit] Signed-off-by: Bo Shen <voice.shen@atmel.com> Tested-by: Raffaele Recalcati <raffaele.recalcati@bticino.it>
| * add support for Xilinx 1000BASE-X phy (GTX)Charles Coldwell2013-06-24-0/+6
| | | | | | | | | | | | | | | | | | | | commit 39695029bc15041c809df3db4ba19bd729c447fa Author: Charles Coldwell <coldwell@ll.mit.edu> Date: Tue Feb 19 08:27:33 2013 -0500 Changes to support the Xilinx 1000BASE-X phy (GTX/MGT) Signed-off-by: Charles Coldwell <coldwell@ll.mit.edu>
| * net: make IPaddr type big endianKim Phillips2013-06-24-1/+1
| | | | | | | | | | | | | | for use with sparse. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Cc: Joe Hershberger <joe.hershberger@gmail.com>
| * bootz: un-staticize do_bootzRob Herring2013-06-24-0/+2
| | | | | | | | | | | | Make do_bootz available for other functions like do_bootm is. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
| * phy: export genphy_parse_link()Yegor Yefremov2013-06-24-0/+1
| | | | | | | | Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
| * net: Add sunxi (Allwinner) wemac driverHenrik Nordström2013-06-24-0/+1
| | | | | | | | | | | | | | | | | | | | This patch adds support for the WEMAC, the ethernet controller included in the Allwinner A10 SoC. It will get used in the upcoming A10 board support. From: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc5xxxTom Rini2013-06-24-17/+11
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| * | ac14xx: rephrase network boot config for developmentGerhard Sittig2013-06-24-8/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - remove the builtin 'rootpath' spec (according to U-Boot project policy) and require user provided environments to contain these - rephrase the evaluation of the 'muster_nr' approach which allows to quickly switch among several network boot setups (make the setting transparent when empty, resulting in default DULG behaviour) - reduce the ARP timeout for faster network boot Signed-off-by: Gerhard Sittig <gsi@denx.de>
| * | ac14xx: use the official product name everywhereGerhard Sittig2013-06-24-5/+5
| | | | | | | | | | | | | | | | | | remove remaining "k6" code names, switch to the official 'ac14xx' name Signed-off-by: Gerhard Sittig <gsi@denx.de>
| * | ac14xx: remove obsolete board config itemsGerhard Sittig2013-06-24-6/+0
| | | | | | | | | | | | | | | | | | | | | - use the default baudrate table for serial communication - remove hostname/boofile/rootpath defines which were not referenced elsewhere Signed-off-by: Gerhard Sittig <gsi@denx.de>
| * | ac14xx: cleanup comments in the board supportGerhard Sittig2013-06-24-3/+2
| | | | | | | | | | | | | | | | | | fix typos, minor rephrasing, remove obsolete notes and TODO items Signed-off-by: Gerhard Sittig <gsi@denx.de>
* | | Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2013-06-24-0/+10
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| * | sf: Add flag status register polling supportJagannadha Sutradharudu Teki2013-06-23-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Flag status register polling is required for micron 512Mb flash devices onwards, for performing erase/program operations. Like polling for WIP(Write-In-Progress) bit in read status register, spi_flash_cmd_wait_ready will poll for PEC(Program-Erase-Control) bit in flag status register. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | sf: Add bank addr code in CONFIG_SPI_FLASH_BARJagannadha Sutradharudu Teki2013-06-23-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Defined bank addr code on CONFIG_SPI_FLASH_BAR macro, to reduce the size for existing boards which has < 16Mbytes SPI flashes. It's upto user which has provision to use the bank addr code for flashes which has > 16Mbytes. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | sf: Read flash bank addr register at probe timeJagannadha Sutradharudu Teki2013-06-23-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Read the flash bank addr register to get the state of bank in a perticular flash. and also bank write happens only when there is a change in bank selection from user. bank read only valid for flashes which has > 16Mbytes those are opearted in 3-byte addr mode, each bank occupies 16Mytes. Suppose if the flash has 64Mbytes size consists of 4 banks like bank0, bank1, bank2 and bank3. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | sf: Discover the bank addr commandsJagannadha Sutradharudu Teki2013-06-23-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Bank/Extended addr commands are specific to particular flash vendor so discover them based on the idocode0. Assign the discovered bank commands to spi_flash members so-that the bank read/write will use their specific operations. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-06-22-17/+87
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| * | | remove all references to .dynsymAlbert ARIBAUD2013-06-21-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Discard all .dynsym sections from linker scripts Remove all __dynsym_start definitions from linker scripts Remove all __dynsym_start references from the codebase Note: this touches include/asm-generic/sections.h, which is not ARM-specific, but actual uses of __dynsym_start are only in ARM, so this patch can safely go through the ARM repository. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Tested-by: Lubomir Popov <lpopov@mm-sol.com> Tested-by: Jeroen Hofstee <jeroen@myspectrum.nl> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * | | net2big_v2: initialize I2C fan at startupSimon Guinot2013-06-20-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch ensures minimal cooling for the net2big_v2 by automatically starting the I2C fan (GMT G762) at low speed (2800 RPM). Signed-off-by: Simon Guinot <simon.guinot@sequanux.org> Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
| * | | Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2013-06-19-7/+23
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| | * | | arm: omap4: panda: Add reading of the board revisionDan Murphy2013-06-18-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Detect if we are running on a panda revision A1-A6, or an ES panda board. This can be done by reading the level of GPIOs and checking the processor revisions. This should result in: Panda 4430: GPIO171, GPIO101, GPIO182: 0 1 1 => A1-A5 GPIO171, GPIO101, GPIO182: 1 0 1 => A6 Panda ES: GPIO2, GPIO3, GPIO171, GPIO48, GPIO182: 0 0 0 1 1 => B1/B2 GPIO2, GPIO3, GPIO171, GPIO48, GPIO182: 0 0 1 1 1 => B3 Set the board name appropriately for the board revision that is detected. Update the findfdt macro to load the a4 device tree binary. Signed-off-by: Dan Murphy <dmurphy@ti.com> [trini: %s/CONTROL_PADCONF_CORE/(*ctrl)->control_padconf_core_base/ and formatting for that] Signed-off-by: Tom Rini <trini@ti.com>
| | * | | arm: dra7xx: Update the EXTRA_ENV_SETTINGSDan Murphy2013-06-18-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the EXTRA_ENV_SETTING for the dra7xx. The console needs to be set to ttyO0 and the findfdt needs to be updated to load the dra7xx-evm.dtb file. Signed-off-by: Dan Murphy <dmurphy@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
| | * | | arm: omap5_uevm: Correct the console sys prompt for 5432Dan Murphy2013-06-18-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Correct the console sys prompt to display the correct processor and the corrent board Signed-off-by: Dan Murphy <dmurphy@ti.com> Reported-by: Lubomir Popov <lpopov@mm-sol.com> Reviewed-by: Tom Rini <trini@ti.com>
| | * | | arm: omap: Add check for fdtfile in the findfdt macroDan Murphy2013-06-18-5/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the omap4, omap5 and am335x common files add a check to ensure that the fdtfile is defined after the findfdt macro has run. If the file is not defined then warn the user that the dtb file is not defined. Signed-off-by: Dan Murphy <dmurphy@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
| * | | | Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'Albert ARIBAUD2013-06-19-6/+56
| |\ \ \ \ | | |/ / / | |/| | | | | | | | | | | | | Conflicts: spl/Makefile
| | * | | MMC: APIs to support resize of EMMC boot partitionAmar2013-06-13-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds APIs to access(open / close) and to resize boot partiton of EMMC. Signed-off-by: Amar <amarendra.xt@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | | SMDK5250: Initialise and Enable DWMMC, support FDT and non-FDTAmar2013-06-13-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables and initialises DWMMC for SMDK5250. Supports both FDT and non-FDT. This patch creates a new file 'exynos5-dt.c' meant for FDT support. exynos5-dt.c: This file shall contain all code which supports FDT. Any addition of FDT support for any module needs to be added in this file. smdk5250.c: This file shall contain the code which supports non-FDT. version. Any addition of non-FDT support for any module needs to be added in this file. May be, the file smdk5250.c can be removed in near future when non-FDT is not required. The Makefile is updated to compile only one of the files exynos5-dt.c / smdk5250.c based on FDT configuration. NOTE: Please note that all additions corresponding to FDT need to be added into the file exynos5-dt.c. At same time if non-FDT support is required then add the corresponding updations into smdk5250.c. Signed-off-by: Amar <amarendra.xt@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | | EXYNOS5: DWMMC: Added FDT support for DWMMCAmar2013-06-13-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds FDT support for DWMMC, by reading the DWMMC node data from the device tree and initialising DWMMC channels as per data obtained from the node. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | | FDT: Add compatible string for DWMMCAmar2013-06-13-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add required compatible information for DWMMC driver. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | | arm:trats: change auto-booting to boot kernel with separate device tree blobArkadiusz Wlodarczyk2013-06-13-4/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Arkadiusz Wlodarczyk <a.wlodarczyk@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Tested-by: Arkadiusz Wlodarczyk <a.wlodarczyk@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | | exynos: Update origen and smdkv310 to use common tzpc_initInderpal Singh2013-06-04-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org> Acked-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | | exynos: move tzpc_init to armv7/exynosInderpal Singh2013-06-04-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | tzpc_init is common for all exynos5 boards, hence move it to armv7/exynos so that all other boards can use it. Also update the smdk5250 Makefile and config file. Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org> Acked-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | | SMDK5250: Enable SPI Gigabyte device.Rajeshwari Shinde2013-05-20-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables gigabyte device for SMDK5250. Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | | | powerpc/85xx: Add P1023RDB board supportChunhe Lan2013-06-20-0/+401
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | P1023RDB Specification: ----------------------- Memory subsystem: 512MB DDR3 (Fixed DDR on board) 64MB NOR flash 128MB NAND flash Ethernet: eTSEC1: Connected to Atheros AR8035 GETH PHY eTSEC2: Connected to Atheros AR8035 GETH PHY PCIe: Three mini-PCIe slots USB: Two USB2.0 Type A ports I2C: AT24C08 8K Board EEPROM (8 bit address) Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | | | | common/Makefile: Add new symbol CONFIG_SPL_ENV_SUPPORT for environment in SPLYing Zhang2013-06-20-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There will need the environment in SPL for reasons other than network support (in particular, hwconfig contains info for how to set up DDR). Add a new symbol CONFIG_SPL_ENV_SUPPORT to replace CONFIG_SPL_NET_SUPPORT for environment in common/Makefile. Signed-off-by: Ying Zhang <b40530@freescale.com> Reviewed-by: Tom Rini <trini@ti.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | | | | board/b4860qds: Relax NOR flash teadc timing parameterPrabhakar Kushwaha2013-06-20-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Relax parameters to give address latching more time to setup. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | | | | powerpc/t4qds: Slave module for boot from SRIO and PCIELiu Gang2013-06-20-7/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When a T4 board boots from SRIO or PCIE, it needs to finish these processes: 1. Set all the cores in holdoff status. 2. Set the boot location to one PCIE or SRIO interface by RCW. 3. Set a specific TLB entry for the boot process. 4. Set a LAW entry with the TargetID of one PCIE or SRIO for the boot. 5. Set a specific TLB entry in order to fetch ucode and ENV from master. 6. Set a LAW entry with the TargetID one of the PCIE ports for ucode and ENV. 7. Slave's u-boot image should be generated specifically by make xxxx_SRIO_PCIE_BOOT_config. This will set SYS_TEXT_BASE=0xFFF80000 and other configurations. For more information about the feature of Boot from SRIO/PCIE, please refer to the document doc/README.srio-pcie-boot-corenet. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | | | | powerpc/t4qds: Enable master module for Boot from SRIO and PCIELiu Gang2013-06-20-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | T4 can support the feature of Boot from SRIO/PCIE, and the macro "CONFIG_SRIO_PCIE_BOOT_MASTER" will enable the master module of this feature when building the u-boot image. You can get some description about this macro in README file, and for more information about the feature of Boot from SRIO/PCIE, please refer to the document doc/README.srio-pcie-boot-corenet. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | | | | powerpc/b4860qds: Slave module for boot from SRIO and PCIELiu Gang2013-06-20-5/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When a b4860qds board boots from SRIO or PCIE, it needs to finish these processes: 1. Set all the cores in holdoff status. 2. Set the boot location to one PCIE or SRIO interface by RCW. 3. Set a specific TLB entry for the boot process. 4. Set a LAW entry with the TargetID of one PCIE or SRIO for the boot. 5. Set a specific TLB entry in order to fetch ucode and ENV from master. 6. Set a LAW entry with the TargetID one of the PCIE ports for ucode and ENV. 7. Slave's u-boot image should be generated specifically by make xxxx_SRIO_PCIE_BOOT_config. This will set SYS_TEXT_BASE=0xFFF80000 and other configurations. For more information about the feature of Boot from SRIO/PCIE, please refer to the document doc/README.srio-pcie-boot-corenet. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | | | | powerpc/b4860qds: Enable master module for boot from SRIO and PCIELiu Gang2013-06-20-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | B4860QDS can support the feature of Boot from SRIO/PCIE, and the macro "CONFIG_SRIO_PCIE_BOOT_MASTER" will enable the master module of this feature when building the u-boot image. You can get some description about this macro in README file, and for more information about the feature of Boot from SRIO/PCIE, please refer to the document doc/README.srio-pcie-boot-corenet. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | | | | powerpc/boot: Change the macro of Boot from SRIO and PCIE master moduleLiu Gang2013-06-20-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the macro "CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER" can enable the master module of Boot from SRIO and PCIE on a platform. But this is not a silicon feature, it's just a specific booting mode based on the SRIO and PCIE interfaces. So it's inappropriate to put the macro into the file arch/powerpc/include/asm/config_mpc85xx.h. Change the macro "CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER" to "CONFIG_SRIO_PCIE_BOOT_MASTER", remove them from arch/powerpc/include/asm/config_mpc85xx.h file, and add those macros in configuration header file of each board which can support the master module of Boot from SRIO and PCIE. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | | | | board/bsc9131rdb: Update default boot environment settingsPriyanka Jain2013-06-20-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BSC9131RDB has 1GB DDR. Out of this, only 880MB is passed on to Linux via bootm_size. Remaining -16MB is reserved for PowerPC-DSP shared control area -128MB is reserved for DSP private area. Also 256MB, out of this 880MB is required for data communication between PowerPC and DSP core. For this bootargs are modified to pass parameter to create 1 hugetlb page of 256MB via default_hugepagesz, hugepagesz and hugepages Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | | | | board/bsc9131rdb: Add DSP side tlb and lawsPriyanka Jain2013-06-20-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BSC9131RDB is a Freescale Reference Design Board for BSC9131 SoC which is a integrated device that contains one powerpc e500v2 core and one DSP starcore. To support DSP starcore -Creating LAW and TLB for DSP-CCSR space. -Creating LAW for DSP-core subsystem M2 memory Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | | | | board/bsc9131rdb: Add targets for Sysclk 100MHzPriyanka Jain2013-06-20-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BSC9131RDB supports Sysclk -66MHz if jumper J16 is close (default state) -100MHz if jumper J16 is open Add targets -BSC9131RDB_NAND_SYSCLK100 : for NAND boot at Sysclk 100MHz -BSC9131RDB_SPIFLASH_SYSCLK100: for SPI boot at Sysclk 100MHz Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | | | | board/bsc9132qds:Add NAND boot support using new SPL formatPrabhakar Kushwaha2013-06-20-6/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Add NAND boot target - defines constants - Add spl_minimal.c to initialise DDR - update TLB, LAW entries as per NAND boot Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | | | | board/bsc9131rdb:Add NAND boot support using new SPL formatPrabhakar Kushwaha2013-06-20-11/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Add NAND boot target - defines constants - Add spl_minimal.c to initialise DDR - update TLB entries as per NAND boot Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
generated by cgit v1.1 at 2024-09-19 23:22:26 +0000