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* add AcTux-2 board supportMichael Schwingen2008-01-18-0/+224
| | | | Signed-off-by: Michael Schwingen <michael@schwingen.org>
* add AcTux-1 board supportMichael Schwingen2008-01-18-0/+247
| | | | Signed-off-by: Michael Schwingen <michael@schwingen.org>
* Merge branch 'master' of git+ssh://10.10.0.7/home/wd/git/u-boot/masterWolfgang Denk2008-01-17-1/+1
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| * Set ips dividor to 1/4 of csb clock.Grzegorz Bernacki2008-01-17-1/+1
| | | | | | | | | | | | | | Previous setting cause ips clock to be out of spec. This bug was found by John Rigby from Freescale. Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-shWolfgang Denk2008-01-16-0/+474
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| * sh: Add support SH7710/SH7712Nobuhiro Iwamatsu2008-01-15-1/+67
| | | | | | | | | | | | | | | | SH7710/SH7712 of SH3 CPU are supported. SH771X is called SH-Ether, and has the Ether controller in CPU. The driver of Ether is not included in this patch. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * sh: Add support of map_physmem() and unmap_physmem() to SuperHNobuhiro Iwamatsu2008-01-15-0/+27
| | | | | | | | | | | | | | This patch add the support of map_physmem() and unmap_physmem() used with Common Flash Interface(CFI) driver. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * sh: Add support for MS7720RP02 boardYoshihiro Shimoda2008-01-15-0/+134
| | | | | | | | | | | | Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * sh: Add support SH3 and SH7720Yoshihiro Shimoda2008-01-15-0/+247
| | | | | | | | | | | | Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-mpc86xxWolfgang Denk2008-01-16-5/+8
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| * | FSL: Convert board/freescale/common/Makefile to use CONFIG_Jon Loeliger2008-01-16-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the board/freescale/common/Makefile to use CONFIG_* options to select which files to conditionally compile into the board/freescale/common library rather than conditionally compiling entire files. Now handles:: CONFIG_FSL_PIXIS CONFIG_FSL_DIU_FB CONFIG_PQ_MDS_PIB CONFIG_ID_EEPROM is introduced until CFG_ID_EEPROM is gone. Signed-off-by: Jon Loeliger <jdl@freescale.com>
| * | Use CONFIG_ULI526X as MPC8610HPCD default Ethernet driverRoy Zang2008-01-16-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | Use driver/net/uli526x.c as MPC8610HPCD default Ethernet driver. Remove unused ethernet CONFIG_ options. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Acked-by: Jon Loeliger <jdl@freescale.com>
* | | Add support for the MPC837xERDBKim Phillips2008-01-16-0/+596
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MPC837xERDB board support includes: * DDR2 330MHz hardcoded (soldered on the board) * Local Bus NOR Flash * I2C, UART and RTC * eTSEC RGMII (TSEC0 - RTL8211B with MII; * TSEC1 - VSC7385 local bus, hardcoded, requires seperate firmware * load) Signed-off-by: Kevin Lam <kevin.lam@freescale.com> Signed-off-by: Joe D'Abbraccio <joe.d'abbraccio@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | mpc83xx: add support for more system clock performance controlsKim Phillips2008-01-16-3/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | System registers that are modified are the Arbiter Configuration Register (ACR), the System Priority Control Register (SPCR), and the System Clock Configuration Register (SCCR). Signed-off by: Michael F. Reiss <Michael.F.Reiss@freescale.com> Signed-off by: Joe D'Abbraccio <ljd015@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | mpc83xx: fix QE ETHPRIMEs to correct 'FSL UEC0' valueKim Phillips2008-01-16-4/+4
| | | | | | | | | | | | | | | | | | continuation of commit b96c83d4ae475a70ef2635cd0e748174c44c8601 Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | Changes in uboot DDR configuration for MPC8313eRDBPoonam Aggrwal2008-01-16-16/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These changes were identified by HighSmith Bill ,Mazzyar and Joseph for DDR configuration in u-boot code. Some are related to performance, some affect stability and some correct few basic errors in the current configuration. The changes have been tested and found to give better memory latency figures on MPC8313eRDB.LMBench figures prove it. The changes are: - CS0_CONFIG[ AP_n_EN] is changed from 1 to 0 (this may improve performance for application with many read or write to open pages). - CS0_CONFIG[ODT_WR_CFG] is currently changed from 100 to 001 (activating all the CS when only one is used may cause unwanted noise on the system) - TIMING_CFG_1[ACTTOPRE] is changed from 9clks to 8clks (based on Tras=45ns) - TIMING_CFG_1[REFREC] changed from 21 clks to 18clks. - TIMING_CFG_2[AL] value changed from 0 setting to 1 clk to comply with the 3 ODT clk requirements) - TIMING_CFG_2[CPO] was set to a reserved value, changed to RL+3/4. - TIMING_CFG_2[FOUR_ACT] is changed from 10 clks to 6clks. - DDR_SDRAM_MODE[AL]changed from 0 to 1. - DDR_SDRAM_MODE[WRREC] changed from 1 clk to 3 clks. - DDR_SDRAM_INTERVAL[REFINT] is changed from 0x0320 to 0x0510. - DDR_SDRAM_INTERVAL[BSTOPRE] is changed from 0x64 to 0x0500. The patch is based of git://www.denx.de/git/u-boot-mpc83xx.git The last commit on this tree was 6775c68683a53c7abc778774641aac6f833a2cbf Signed-off-by: Poonam Aggrwal-b10812 <b10812@freescale.com> Cc: Bill HighSmith <Bill.Highsmith@freescale.com> Cc: Razzaz Mazyar <MRazzaz@freescale.com> Cc: Josep P J <PJ.Joseph@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | Enable the isdram command on the MPC8360EMDS boardJerry Van Baren2008-01-16-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | The isdram command prints out decoded information the "serial presence detect" (SPD) chip on the SDRAM SIMMs. This can be very helpful when debugging memory configuration problems. Signed-off-by: Gerald Van Baren <vanbaren@cideas.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | mpc83xx: Add the support for MPC8315ERDB boardDave Liu2008-01-16-0/+547
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The features list: - Boot from NOR Flash - DDR2 266MHz hardcoded configuration - Local bus NOR Flash R/W operation - I2C, UART, MII and RTC - eTSEC0/1 support - PCI host Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | mpc83xx: Remove cache config from MPC8360ERDK.hDave Liu2008-01-16-9/+0
|/ / | | | | | | | | | | | | | | | | | | | | The MPC8360ERDK board support patch is added before the commit 2c5b48fc205c3e2752910da8f39209ed075929e5 so, miss clean up it. The patch clean up the miss cache config. Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | nand: FSL UPM NAND driverAnton Vorontsov2008-01-16-0/+39
| | | | | | | | Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
* | LWMON5: enable hush shell as command line parserWolfgang Denk2008-01-16-0/+6
| | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | ADS5121: disable watchdog; enable image timestampsWolfgang Denk2008-01-15-6/+6
| | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | TK885D: fixes for bigger flash sector sizes on new modules;Wolfgang Denk2008-01-15-2/+7
|/ | | | | | | adjust default environment; disable SCC ethernet (not used on this board). Signed-off-by: Wolfgang Denk <wd@denx.de>
* ARM: update mach-types.h from 2.6.24-rc7 Linux kernel treeWolfgang Denk2008-01-13-65/+8144
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* ADS5121: Fix typo in ads5121.c, adjust default environmentWolfgang Denk2008-01-13-28/+32
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* ADS5121: MAX slew rate for PATA pinsJohn Rigby2008-01-13-0/+9
| | | | Signed-off-by: John Rigby <jrigby@freescale.com>
* MPC8360ERDK: fix incorrect initialization of CFG_I2C_NOPROBESWolfgang Denk2008-01-13-1/+1
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* MPC512X: Cleanup bus clock names.Grzegorz Bernacki2008-01-12-1/+1
| | | | Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
* MPC512X: Fixed typo in macro name.Grzegorz Bernacki2008-01-12-1/+1
| | | | Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
* ads5121: Added support for FDT.Grzegorz Bernacki2008-01-12-0/+11
| | | | Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
* Coding Style cleanup; update CHANGELOG.Wolfgang Denk2008-01-12-1/+0
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* MUNICes: Set the right CFG_DEFAULT_MBAR value.Heiko Schocher2008-01-12-0/+2
| | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* added the config File for the MUNICes board.Heiko Schocher2008-01-12-0/+214
| | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* Fix defaultconfig for the mgcoge board.Heiko Schocher2008-01-12-1/+1
| | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* Added support for the mgcoge board from keymile.Heiko Schocher2008-01-12-0/+317
| | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* Enable SMC microcode relocation patch for SMC1.Heiko Schocher2008-01-12-0/+2
| | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* Added support for the mgsuvd board from keymile.Heiko Schocher2008-01-12-0/+351
| | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* Remove superfluous preprocessor conditionals from LM73 driverLarry Johnson2008-01-12-1/+0
| | | | | | | | (1) Remove unused symbol "CFG_EEPROM_PAGE_WRITE_ENABLE". (2) Use conditional Makefile.o. Signed-off-by: Larry Johnson <lrj@acm.org>
* Add support for the TK885D baseboard from TELE-DATAGuennadi Liakhovetski2008-01-12-0/+513
| | | | | | | | | The TK885D board uses a TQM885D module from TQ, this port adds an own configuration file and adds a last_stage_init() method to configure the two PHYs, depending on the phy_auto_nego environment variable. Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
* Merge branch 'master' of git://www.denx.de/git/u-boot-videoWolfgang Denk2008-01-12-0/+44
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| * Add Fujitsu CoralP/Lime video driverAnatolij Gustschin2008-01-11-0/+44
| | | | | | | | | | Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Rodolfo Giometti <giometti@linux.it>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xxWolfgang Denk2008-01-12-13/+20
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| * | ppc4xx: Rework Lime support for lwmon5Anatolij Gustschin2008-01-11-0/+16
| | | | | | | | | | | | | | | | | | Rework Lime support for lwmon5 using new video driver Signed-off-by: Anatolij Gustschin <agust@denx.de>
| * | ppc4xx: Update PMC440 config fileMatthias Fuchs2008-01-11-13/+3
| | | | | | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
| * | ppc4xx: Make Sequoia boot vxWorksNiklaus Giger2008-01-10-0/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | vxWorks expects in TLB 0 a entry for the Machine Check interrupt TLB 1 a entry for the RAM TLB 2 a entry for the EBC TLB 3 a entry for the boot flash After changing the baudrate to 9600 I had no problems to boot the vxWorks image as distributed by WindRiver (Revision 2.0/1 from June 18, 2007) Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-mpc83xxWolfgang Denk2008-01-12-109/+592
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| * | mpc83xx: Make the code more readableDave Liu2008-01-10-6/+13
| | | | | | | | | | | | | | | | | | | | | Format the code, make it more readable Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | mpc83xx: Reduce the latency of DDRDave Liu2008-01-10-5/+5
| | | | | | | | | | | | | | | | | | | | | Reduce the AL from 2 to 1 clock to improve the performance. Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | mpc83xx: Fix the wrong definition of MPC8315EDave Liu2008-01-10-20/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | According to the latest user manual of MPC8315E, 1) The SVCOD of HRCWL is different than 837x 2) The SCCR has changes Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | mpc83xx: Fix the typo in mpc83xx.hDave Liu2008-01-10-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | The SPCR about TSEC priority is wrong. Signed-off-by: Michael Barkowski <Michael.Barkowski@freescale.com> Signed-off-by: Joe D'Abbraccio <Joe.D'abbraccio@freescale.com> Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
generated by cgit v1.1 at 2024-12-27 05:57:50 +0000