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* ENGR00218583-5 MX6DL SabreSD Android:Add splashimage uboot varLiu Ying2012-07-31-1/+4
| | | | | | | | This patch adds splashimage related variables to board configure file so that splashimage can work without touching the uboot variables. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00218583-4 MX6Q SabreSD Android:Add splashimage uboot varLiu Ying2012-07-31-2/+4
| | | | | | | | This patch adds splashimage related variables to board configure file so that splashimage can work without touching the uboot variables. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00218583-3 MX6DL SabreSD:Enable splashimage by defaultLiu Ying2012-07-31-0/+1
| | | | | | | This patch adds CONFIG_SPLASH_SCREEN definition to board config file to enable splashimage by default. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00218583-2 MX6Q SabreSD:Enable splashimage by defaultLiu Ying2012-07-31-0/+1
| | | | | | | This patch adds CONFIG_SPLASH_SCREEN definition to board config file to enable splashimage by default. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00218465 Android: mx6sl-arm2: fix fastboot crash issueLiGang2012-07-30-8/+19
| | | | | | | | Fix fastboot crash issue on fastmx6sl-arm2 board. Enlarge fastboot buffer size to 320MB for mx6 arm2 board, mx6 sabresd board, thus fastboot could flash system.img up to 320MB Signed-off-by: LiGang <b41990@freescale.com>
* ENGR00217401 common: fix build warningXinyu Chen2012-07-26-0/+2
| | | | | | | | | Fix the build warning in uboot build. Fix bug of incorrect dereference to periph2 clock pre divider. Fix incorrect type of maxpackage size assign, even it's not used at all in fastboot. Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
* ENGR00218282 MX6Q: fix linker error when more configure enabled.Zhang Jiejing2012-07-25-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit fix the linker error when enable more function(like CONFIG_NAND, CONFIG_SPASHSCREEN,etc) in uboot ARM2 board, and a possable linker error for other MX6 boards: /home/lambert/share/SATA2/R13.3/prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/ bin/arm-eabi-ld: section .bss [27831000 -> 278666e7] overlaps section .rodata [2782387c -> 278609eb] /home/lambert/share/SATA2/R13.3/prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/ bin/arm-eabi-ld: section .rodata.str1.1 [278609ec -> 27867803] overlaps section .bss [27831000 -> 278666e7] One issue here is: A recent gcc added a new unaligned rodata section called '.rodata.str1.1', which needs to be added the the linker script. Instead of just adding this one section, we use a wildcard ".rodata*" to get all rodata linker section gcc has now and might add in the future. Another issue is: The secure boot feature require __hab_data section in uboot linker script, but it's have a hard coding magic number, but if we enable more code, cause .text section bigger, it will cross the line, so it report the first linker error. This commit disable SECURE_BOOT feature by default for android, and comments if user want to use this feature, it needs change the .lds by there configure. Also, enlarge the magic number that this feature needs to cover if more code is build in. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00218067 mx6sl LDO_BYPASS: enable LDO BYPASS in mx6sl by defaultRobin Gong2012-07-24-1/+1
| | | | | | | To validate LDO bypass function fully, enable CONFIG_MX6_INTER_LDO_BYPASS on u-boot and kernel, only for mx6sl. Signed-off-by: Robin Gong <B38343@freescale.com>
* ENGR00217764 MX6 Secure Boot : Fix NAND BOOT Failure due to secure patchEric Sun2012-07-23-3/+12
| | | | | | | | | | | | | | | | | | With the secure boot patch. MX6 NAND Boot is not functional. The root cause is that, the original secure boot patch fills "0xFF' to spacing regions, due to a issue in ROM code, read pages of all "0xff" will be treated as a critical error. Thus prevent the U-Boot from booting normally. The fix adjust image copy size in IVT so that when secure boot is not enabled, no unuseful data is copied by ROM code. Also the secure boot option is default disabled. The end user won't enable it unless they know what they are doing. These prevent the ROM code from copied pages of "0xff" data, and fix the issue. Signed-off-by: Eric Sun <jian.sun@freescale.com>
* ENGR00217114-1 MX6 U-Boot, Secure Boot, one code base for MX6Q/DL/SLEric Sun2012-07-13-0/+4
| | | | | | | | Move the secure boot related implementation code from mx6q_arm2.c to mx6/generic.c. In this way the HAB feature can be shared by all MX6 platforms Signed-off-by: Eric Sun <jian.sun@freescale.com>
* ENGR00215197 pfuze MX6SL_ARM2: enable LDO bypass on u-bootimx-android-r13.5-alphaRobin Gong2012-07-04-0/+13
| | | | | | 1.enable I2C and I2C bus recovery support on mx6sl_arm2 2.enable LDO bypass on u-boot, by configuring 'CONFIG_MX6_INTER_LDO_BYPASS' Signed-off-by: Robin Gong <B38343@freescale.com>
* ENGR00215367 MX6 Platforms, remove "nosmp" in default parametersEric Sun2012-07-03-4/+2
| | | | | | | | nosmp is added in the bootargs originally because of issues in kernel smp implementation. Now these issues are fixed and we can safely remove them Signed-off-by: Eric Sun <jian.sun@freescale.com>
* ENGR00215633 MX6DL LPDDR2 : enable plugin mode of system bootEric Sun2012-07-03-7/+9
| | | | | | | | | | | | | | | | | | | | | For MX6DL LPDDR2 board, in order to use both the 2 channels of the memory, the "PL301_FAST2" must be set to 0x1. However this bit is not accessible using DCD. Plugin mode must be utilized for this purpose. The patch can be verified this way: Enter U-boot console > mw.l 0x80000000 0xC0 10 > mw.l 0x10000000 0xC1 10 > md.l 0x10000000 10 > md.l 0x80000000 10 Before the patch, 0x10000000 and 0x80000000 in fact point to the same memory location. So the last 2 dump will show memory content of both 0x000000C1 After the patch, 0x80000000 ponit to channel 0, 0x10000000 point to channel 1. the last 2 dump will show memory content of 0x000000C0 and 0x000000C1 respectively Signed-off-by: Eric Sun <jian.sun@freescale.com>
* ENGR00214947 MX6 UBOOT : default enable wait mode as default parametersEric Sun2012-06-26-8/+6
| | | | | | | | For historical reasons U-Boot set "enable_wait_mode=off" in default U-Boot parameter. Now wait mode is OK for these platforms so we remove these settings. Signed-off-by: Eric Sun <jian.sun@freescale.com>
* ENGR00213689 - U-Boot: EPDC Splash Screen failing for MX 6DL/SDanny Nold2012-06-14-4/+4
| | | | | | | | | | | Fix a hang and a garbage update to the E Ink panel with the following changes for both MX 6DL/S SabreSD and MX 6DL/S ARM2: - Update the address for the EPDC waveform file to 6MB offset in SD card. - Update the waveform file size to cover the default Pearl panel waveform file. Signed-off-by: Danny Nold <dannynold@freescale.com>
* ENGR00212229 [MX6SL_ARM2]uboot: 8bit MMC cards failed to boot on SD1.Ryan QIAN2012-06-08-4/+4
| | | | | | | | | | | | issue: SD1 connector on ARM2 is an MS-SD combo one which can not make good contact with DAT4~DAT7 of 8bit mmc cards. It is an hw limitation which will cause boot failure from 8bit mmc. solution: disable SD1 8bit mode on MX6SL arm2 board. Signed-off-by: Ryan QIAN <b32804@freescale.com>
* ENGR00212287 - U-Boot EPDC splash screen: Disable EPDC splash by defaultDanny Nold2012-06-04-4/+4
| | | | | | | | | | - EPDC splash screen changed to be disabled by default in the config file for MX6DL_SABRESD and MX6DL_ARM2. If left enabled, the U-Boot image will not boot correctly (hang), since some additional content on the boot device (waveform file) is required for EPDC splash to work correctly. - Fixes U-Boot break introduced with commit for ENGR00212287 Signed-off-by: Danny Nold <dannynold@freescale.com>
* ENGR00211117 - U-Boot: Add EPDC splash screen for MX 6DL/S platformsDanny Nold2012-05-30-10/+63
| | | | | | | | | - EPDC Splash support for MX6DL/S Sabre SD - EPDC Splash support for MX6DL/S ARM2 - Currently, splash screen consists of a simple black border around a white screen. Done this way to save in memory footprint. Signed-off-by: Danny Nold <dannynold@freescale.com>
* ENGR00211038 Fix the PAD_LVE implementationMahesh Mahadevan2012-05-30-1/+1
| | | | | | Fix the PAD_LVE implementation used on MX6SL. Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@freescale.com>
* ENGR00210918-2 cleanup android support, build pass all boardsZhang Jiejing2012-05-29-2/+44
| | | | | | | | | | - move recovery.h to common inlcude place. - move supported_reco_envs to soc related, not board related, - user can change this via configure header, don't needs this in every board file. - pass build for all mx5/mx6 android configs. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00210918-1 android: add mx6sl android supportZhang Jiejing2012-05-29-1/+77
| | | | | | | | | | - add android build config for mx6sl_arm2 board. - add gpio support for mx6sl - add boot image support - add android recovery support - add fastboot support, but fastboot cannot transfer file. Signed-off-by Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00209910 Add support for MX6SL mfgtools firmware supportFrank Li2012-05-21-0/+287
| | | | | | Add support for MX6SL mfgtools firmware support Signed-off-by: Frank Li <Frank.Li@freescale.com>
* ENGR00209899-2 MX6Q: cleanup: cleanup fastboot, udc warnning.Zhang Jiejing2012-05-21-1/+6
| | | | | | cleanup android fastboot and udc build warnnings. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00209899-1 mx6x: add generic gpio interface.Zhang Jiejing2012-05-21-1/+185
| | | | | | | | | | | | | | | | | | | | | | Add generic gpio interface in uboot. Seems more and more gpio operation invoke in uboot, without RAW register operation, we should use generic gpio interface. you should define the CONFIG_MXC_GPIO use generic gpio interface: gpio_request, gpio_direction_output, gpio_direction_input, gpio_set_value, gpio_get_value, etc. Test on MX6Q, MX6DL. Other MX6X should also define this config. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00210014 i.mx6 : i.mx6sl : add PAD_CTL_LVE support for pad configurationEric Sun2012-05-18-5/+6
| | | | | | | | | | | Original pad configuration don't provide enough bitfield width to hold all necessary information. For MX6Sololite, a "PAD_CTL_LVE" is needed to be configed for many pins. iomux_v3_cfg_t is re-orgnized to address this issue. PAD_CTRL is extended by 1 bit to hold the "PAD_CTL_LVE". Which is mapped to proper bit location when configure the PAD config register. Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
* ENGR00209059 android: refine fastboot and recovery support.imx-android-r13.3Zhang Jiejing2012-05-14-3/+8
| | | | | | | | | | 1. add check asrc register to enter recovery mode, rather then check the file. 2. fix the boot.img can not fastboot flash function. 3. consolidate and cleanup fastboot code. 4. clean up many build warnning message. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00182459 fastboot: change vid pid to align with winXP fastboot driver.Zhang Jiejing2012-05-11-20/+20
| | | | | | align vid, pid to let windows fastboot driver can be install. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00182017 mx6dl sabresd I2C: fix build error and support mx6dl_sabresdRobin Gong2012-05-07-2/+3
| | | | | | | | | | | | | | 1.fix build error : mx6q_sabresd.c: In function 'setup_i2c': mx6q_sabresd.c:382: error: expected ')' before ';' token mx6q_sabresd.c:393: error: expected ';' before '}' token mx6q_sabresd.c: In function 'setup_pmic_voltages': mx6q_sabresd.c:399: warning: unused variable 'val' make[1]: *** [mx6q_sabresd.o] Error 1 2.modify mx6dl_sabresd_config to support pfuze on mx6dl sabresd board Signed-off-by: Robin Gong <B38343@freescale.com>
* ENGR00181348 pfuze sabresd: pfuze support in u-bootRobin Gong2012-05-04-2/+3
| | | | | | add pfuze and I2C support, support cpu internal LDO bypass which can be enabled by CONFIG_MX6_INTER_LDO_BYPASS Signed-off-by: Robin Gong <B38343@freescale.com>
* ENGR00181621 : MX6Solo SABREAI - Set default boot up to SD CardPrabhu Sundararaj2012-05-03-1/+1
| | | | | | Set default boot to SD Card Signed-off-by: Prabhu Sundararaj <b36876@freescale.com>
* ENGR00181337-3 i.mx6: i.mx6sl: add initial support for i.mx6sl ARM2 boardEric Sun2012-05-03-0/+452
| | | | | | | | | | | | | | | | | This patch is to add the initial support for i.mx6sl ARM2 board, the patch does: - implemention of LPDDR2 init script - Plug-in/DCD mode support to do DDR initialization - Debug UART(UART1) support - SPI-NOR(M25P32, 4MB) flash support - FEC support, PHY(LAN8720A, RMII mode) - SD/MMC card support, SD1/SD2/SD3 Signed-off-by: Danny Nold <dannynold@freescale.com> Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Terry Lv <r65388@freescale.com> Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com> Signed-off-by: Eric Sun <jian.sun@freescale.com>
* ENGR00181337-2 i.mx6 : i.mx6sl arm2 add EPDC supportEric Sun2012-05-03-1/+15
| | | | | | Add EPDC splash screen support for U-Boot Signed-off-by: Danny Nold <dannynold@freescale.com>
* ENGR00181337-1 i.mx6 : add initial support for i.mx6slEric Sun2012-05-02-11/+3057
| | | | | | | | | | | | | | This patch is to add the initial support for Freescale i.mx6sl chip. i.mx6sl is the SoloLite verison of Freescale i.mx6 family. The patch does: - memory layout support, - iomux support, - clock support, Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Ryan QIAN <b32804@freescale.com> Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00180623 fastboot: add fastboot in MX6Q_SABERSD boardsZhang Jiejing2012-04-24-5/+23
| | | | | | | | add fastboot function back in MX6Q_SABERSD board. the MX6DL_SABERSD have usb init related issue which will keep RESET, but left as later developement. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
* MX: Added definition file for MC13892Stefano Babic2012-04-20-0/+160
| | | | | | | | The MC13892 is a Power Controller used with processors of the family MX.51. The file adds definitions to be used to setup the internal registers via SPI. Signed-off-by: Stefano Babic <sbabic@denx.de>
* Add generic gpio.h in asm-genericSimon Glass2012-04-20-0/+74
| | | | | | | Since we want want to have a standard GPIO interface, this adds a definition for this into include/asm-generic/gpio.h. Signed-off-by: Simon Glass <sjg@chromium.org>
* misc:pmic:core New generic PMIC driverŁukasz Majewski2012-04-20-0/+71
| | | | | | | | | | | | | | I2C or SPI PMIC devices can be accessed. Separate files: pmic_i2c.c and pmic_spi.c are responsible for handling transmission over I2C or SPI bus. New flags: CONFIG_PMIC - enable PMIC general device. CONFIG_PMIC_I2C/SPI - specify the interface to be used. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Stefano Babic <sbabic@denx.de>
* MX: Added Freescale Power Management DriverStefano Babic2012-04-20-0/+128
| | | | | | | | | The patch add supports for the Freescale's Power Management Controller (known as Atlas) used together with i.MX31/51 processors. It was tested with a MC13783 (MX31) and MC13892 (MX51). Signed-off-by: Stefano Babic <sbabic@denx.de>
* ENGR00179013 : MX6Solo/Quad : SABREAUTO: Add Parallel NOR SupportPrabhu Sundararaj2012-04-13-7/+52
| | | | | | | | | | | | | -Added u-boot config CONFIG_CMD_WEIMNOR for MX6Solo/Quad SABREAUTO to support WEIM NOR. - CONFIG_FLASH_HEADER_OFFSET is 0x1000 for WEIM NOR. -SPI NOR and WEIM NOR has pin conflicts, either one can be enabled. - mx6q_sabreauto_config, mx6solo_sabreauto_config configured default for SPI NOR. -In order to enable the read/write commands and to boot from WEIM NOR, need to enable the CONFIG_CMD_WEIMNOR. This will disable SPI-NOR Signed-off-by: Prabhu Sundararaj <b36876@freescale.com>
* ENGR00179437-2 u-boot: mx6q: iomux: code clean upimx-android-r13.2.1imx_v2009.08Jason Liu2012-04-13-16/+1
| | | | | | | Remove the dead definiton which never used by iomux-v3 framework And move the SION bit definiton to arch-mx6/iomux-v3.h for sharing Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00179437-1: u-boot: iomux: NO_PAD_I/NO_PAD_MUX not set corretlyJason Liu2012-04-13-4/+4
| | | | | | | | NO_PAD_I/NO_PAD_MUX not defined correctly, which will cause build error. And According to iomux-v3.h, the NO_PAD_I/NO_PAD_MUX should be 0 for the pins which does not have PAD/MUX config. Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00179150 MX6Q_ARM2 HAB Boot : avoid uImage authentication on un-fused chipEric Sun2012-04-09-2/+0
| | | | | | | | | Before running authentication on uImage in DDR, u-boot first check if SEC_CONFIG[1] (OTP_CFG5[1]) is burned. If so, it means the chip is in secure configuration, the authentication continues; if not, the chip in not in secure configuration, just bypass the authentication Signed-off-by: Eric Sun <jian.sun@freescale.com>
* ENGR00178989: Disable secrity boot configs.Terry Lv2012-04-05-1/+3
| | | | | | | Security boot need to use fuse item. Thus it should not be enabled as default. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00139223-1 [MX6Q] Secure Boot, enable HAB on ARM2 platform (Stage 1)Eric Sun2012-04-01-0/+82
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The first stage of High Assurance Boot (HAB) is the authentication of U-boot. A CST tool is used to generate the CSF data, which include public key, certificate and instruction of authentication process. Then it is attached to the original u-boot.bin The IVT should be modified to contain a pointer to the CSF data. The original u-boot.bin is with size between 0x27000 to 0x28000. For convinence, we first extend the u-boot.bin to 0x2F000 (with fill 0xFF). Then concatenate it with the CSF data. The combined image is again extend to a fixed length (0x31000), which is used as the IVT size parameter. The new memory layout is as the following. U-Boot Image +-------------+ | Blank | |-------------| 0x400 | IVT |-----------------------+ |-------------| | | | | | | | | | | |Remaining UB | | CSF pointer | | | | | | | | | |-------------| | | | | | Fill Data | | | | | |-------------| 0x2F000 <-------------+ | | | CSF Data | | | |-------------| | | | Fill Data | | | +-------------+ 0x31000 HAB APIs are ROM implemented, the entry table is located in a fixed location in the ROM. We export them so that during the HAB we can have some information about the secure boot process. For convinience some wrapper API is implemented based on the HAB APIs. - get_hab_status : used to dump information of authentication result - authenticate_image : used by u-boot to authenticate uImage For security hardware to function, CAAM related clock (CG0[4~6]) must be open. They are default closed in the original U-boot. "hab_caam_clock_enable" and "hab_caam_clock_disable" are created to open and close these clock gates. The generation of CSF data is not in the scope of this patch. CST tool will be used for this purpose. The procedure will be introduced in another document. Signed-off-by: Eric Sun <jian.sun@freescale.com>
* ENGR00178024 mx6solo sabreauto: add nosmp arm_freq=800 by defaultLily Zhang2012-03-30-2/+3
| | | | | | | Add "nosmp arm_freq=800" options for mx6solo sabreauto board by default Signed-off-by: Lily Zhang <r58066@freescale.com>
* ENGR00178547 i.mx6dl sabresd: add android config fileLin Fuzhen2012-03-30-0/+57
| | | | | | | add android config file; support booti fastboot command and etc. Signed-off-by: Lin Fuzhen <fuzhen.lin@freescale.com>
* ENGR00177909: mx6q/mx6dl SabreSD: SPI-NOR flash not probed as expectedJason Liu2012-03-26-12/+12
| | | | | | | | | | | | SPI NOR flash(m25p32-vmw6tg) not probed and function as expected, this due to the lack of iomux pad config and incorrect CS line. This patch fix the above issue and also fix the mfg config file (For the code readable, I intent to omit the following checkpatch warning: in the iomux/mx6_pins.h WARNING: line over 80 characters) Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00177905 : i.mx6q sabresd: add fec auto discover phy configuration.Fugang Duan2012-03-26-1/+2
| | | | | | | | - i.mx6q sabresd revA ethernet phy addr is 0 (PHYADDRESS1-PHYADDRESS0:00) , but revB ethernet phy address is 0x1 (PHYADDRESS1-PHYADDRESS0:01). To avoid to change hardware, add auto discover phy address configuration. Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00177657: Add mfg configs for mx6dl sabresd and mx6solo sabreautoTerry Lv2012-03-23-0/+587
| | | | | | Add mfg configs for mx6dl sabresd and mx6solo sabreauto. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00176837-4 - imx6solo sabreauto : remove Ethernet phy MICREL macro.Fugang Duan2012-03-22-1/+0
| | | | | | | - FEC detect phy OUID to check phy type, so remove MICREL macro in board config file. Signed-off-by: Fugang Duan <B38611@freescale.com>
generated by cgit v1.1 at 2024-11-24 22:47:31 +0000