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* Merge with git+ssh://sr@pollux.denx.org/home/sr/git/u-boot/denx-merge-srStefan Roese2007-01-13-27/+109
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| * Adjusted default environment for cam5200 board.Reinhard Thies2007-01-10-2/+12
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| * Merge with /home/m8/git/u-boot/Detlev Zundel2007-01-10-10/+10
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| | * CAM5200 flash driver modifications:Marian Balakowicz2007-01-10-10/+10
| | | | | | | | | | | | | | | - use CFI driver (replaces custom flash driver) for main 'cam5200' target - add second build target 'cam5200_niosflash' which still uses custom driver
| * | SPC1920: cleanup memory contoller setupMarkus Klotzbuecher2007-01-09-5/+5
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| * | Fix the cpu speed setup to work with all boards.Markus Klotzbuecher2007-01-09-1/+1
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| * | SPC1920: add support for the FM18L08 Ramtron FRAMMarkus Klotzbuecher2007-01-09-1/+14
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| * | SPC1920: update the HPI register addresses to work with the secondMarkus Klotzbuecher2007-01-09-6/+6
| | | | | | | | | | | | generation of hardware
| * | Miscellanious spc1920 related cleanupsMarkus Klotzbuecher2007-01-09-6/+5
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| * | Add support for the DS3231 RTCMarkus Klotzbuecher2007-01-09-0/+6
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| * | SMC1 uses external CLK4 instead of BRG on spc1920Markus Klotzbuecher2007-01-09-1/+1
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| * | Update the SPC1920 CMB PLD driverMarkus Klotzbuecher2007-01-09-9/+7
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| * | Add / enable I2C support on the spc1920 boardMarkus Klotzbuecher2007-01-09-3/+25
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| * | Add support for the tms320671x host port interface (HPI)Markus Klotzbuecher2007-01-09-0/+34
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* | [PATCH] Update 440SP(e) cpu revisionsStefan Roese2007-01-13-5/+8
| | | | | | | | | | | | Also display enabled/disabled RAID 6 support for 440SP/440SPe PPC's. Signed-off-by: Stefan Roese <sr@denx.de>
* | [PATCH] Update Yellowstone (440GR) to display board rev and PCI bus speedStefan Roese2007-01-13-0/+14
| | | | | | | | | | | | | | | | | | | | Now the board revision and the current PCI bus speed are printed after the board message. Also the EBC initialising is now done via defines in the board config file. Signed-off-by: Stefan Roese <sr@denx.de>
* | [PATCH] Update Yosemite (440EP) to display board rev and PCI bus speedStefan Roese2007-01-13-0/+14
|/ | | | | | | | | | Now the board revision and the current PCI bus speed are printed after the board message. Also the EBC initialising is now done via defines in the board config file. Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] Update ALPR board filesStefan Roese2007-01-06-1/+18
| | | | | | | This update brings the ALPR board support to the newest version. It also fixes a problem with the NAND driver. Signed-off-by: Stefan Roese <sr@denx.de>
* Merge with /home/stefan/git/u-boot/denx-merge-srStefan Roese2007-01-05-3/+4
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| * Merge with /home/tur/proj/v38b/u-bootWolfgang Denk2007-01-04-3/+4
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| | * Few V38B changes:Bartlomiej Sieka2006-12-28-3/+4
| | | | | | | | | | | | | | | | | | - fix a typo in V38B config file - move watchdog initialisation earlier in the boot process - add "wdt=off" to default kernel command line (disables kernel watchdog)
* | | [PATCH] Clear PLB4A0_ACR[WRP] on Sequoia (440EPx)Stefan Roese2007-01-05-9/+11
| | | | | | | | | | | | | | | | | | | | | This fix will make the MAL burst disabling patch for the Linux EMAC driver obsolete. Signed-off-by: Stefan Roese <sr@denx.de>
* | | [PATCH] Add DDR2 optimization code for Sequoia (440EPx) boardStefan Roese2007-01-05-1/+4
|/ / | | | | | | | | | | | | | | | | | | This code will optimize the DDR2 controller setup on a board specific basis. Note: This code doesn't work right now on the NAND booting image for the Sequoia board, since it doesn't fit into the 4kBytes for the SPL image. Signed-off-by: Stefan Roese <sr@denx.de>
* | Minor code cleanup.Wolfgang Denk2006-12-24-12/+8
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* | Merge with /home/wd/git/u-boot/masterWolfgang Denk2006-12-24-0/+1
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| * | Fix cfi failure with Spansion Flash (Spansion Flash Devices have a different ↵Stefano Babic2006-12-24-0/+1
| | | | | | | | | | | | offset to go into CFI mode)
* | | Merge with /home/hs/TQ/u-boot-devWolfgang Denk2006-12-24-0/+768
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| * | Added support for the TQM8272 board from TQHeiko Schocher2006-12-21-0/+768
| | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* | | Preliminary support for the iDMR board (ColdFire).Bartlomiej Sieka2006-12-20-0/+197
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* | | automatic update mechanismAndrei Safronov2006-12-08-1/+3
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* | | Code cleanup.Wolfgang Denk2006-11-30-429/+428
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* | | Merge with http://opensource.freescale.com/pub/scm/u-boot-83xx.gitWolfgang Denk2006-11-30-758/+3783
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| * | | Make fsl-i2c not conflict with SOFT I2CJoakim Tjernlund2006-11-29-4/+0
| | | | | | | | | | | | | | | | Signed-off-by: Timur Tabi <timur@freescale.com>
| * | | Merge http://www.denx.de/git/u-bootKim Phillips2006-11-28-48/+401
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| * | | | mpc83xx: Update 83xx to use fsl_i2c.cTimur Tabi2006-11-03-119/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the 83xx tree to use I2C support in drivers/fsl_i2c.c. Delete cpu/mpc83xx/i2c.c, include/asm-ppc/i2c.h, and all references to those files. Added multiple I2C bus support to fsl_i2c.c. Signed-off-by: Timur Tabi <timur@freescale.com>
| * | | | mpc83xx: Replace CFG_IMMRBAR with CFG_IMMRTimur Tabi2006-11-03-28/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace all instances of CFG_IMMRBAR with CFG_IMMR, so that the 83xx tree matches the other 8xxx trees. Signed-off-by: Timur Tabi <timur@freescale.com>
| * | | | mpc83xx: Fix the incorrect dcbz operationDave Liu2006-11-03-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 834x rev1.x silicon has one CPU5 errata. The issue is when the data cache locked with HID0[DLOCK], the dcbz instruction looks like no-op inst. The right behavior of the data cache is when the data cache Locked with HID0[DLOCK], the dcbz instruction allocates new tags in cache. The 834x rev3.0 and later and 8360 have not this bug inside. So, when 834x rev3.0/8360 are working with ECC, the dcbz instruction will corrupt the stack in cache, the processor will checkstop reset. However, the 834x rev1.x can work with ECC with these code, because the sillicon has this cache bug. The dcbz will not corrupt the stack in cache. Really, it is the fault code running on fault sillicon. This patch fix the incorrect dcbz operation. Instead of CPU FP writing to initialise the ECC. CHANGELOG: * Fix the incorrect dcbz operation instead of CPU FP writing to initialise the ECC memory. Otherwise, it will corrupt the stack in cache, The processor will checkstop reset. Signed-off-by: Dave Liu <daveliu@freescale.com>
| * | | | mpc83xx: add OF_FLAT_TREE bits to 83xx boardsKim Phillips2006-11-03-20/+112
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | add ft_pci_setup, OF_CPU, OF_SOC, OF_TBCLK, and STDOUT_PATH configuration bits to mpc8349emds, mpc8349itx, and mpc8360emds board code. redo environment to use bootm with the fdtaddr for booting ARCH=powerpc kernels by default, and provide default fdtaddr values.
| * | | | mpc83xx: Fix dual I2C support for the MPC8349ITX, MPC8349EMDS, TQM834x, and ↵Timur Tabi2006-11-03-14/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MPC8360EMDS This patch also adds an improved I2C set_speed(), which handles all clock frequencies. Signed-off-by: Timur Tabi <timur@freescale.com>
| * | | | mpc83xx: add QE ethernet supportDave Liu2006-11-03-0/+42
| | | | | | | | | | | | | | | | | | | | this patch adds support for the QUICC Engine based UCC gigabit ethernet device.
| * | | | mpc83xx: Add MPC8360EMDS basic board supportDave Liu2006-11-03-14/+689
| | | | | | | | | | | | | | | | | | | | | | | | | Add support for the Freescale MPC8360EMDS board. Includes DDR, DUART, Local Bus, PCI.
| * | | | mpc83xx: add the QUICC Engine (QE) immap fileDave Liu2006-11-03-0/+550
| | | | | | | | | | | | | | | | | | | | common QE immap file. Also required for 8360.
| * | | | mpc83xx: Add 8360 specifics to 83xx immapDave Liu2006-11-03-571/+1404
| | | | | | | | | | | | | | | | | | | | | | | | | Mainly add QE device dependencies, with appropriate 8360 protection. Lindent also run.
| * | | | mpc83xx: Fix PCI, USB, bootargs for MPC8349E-mITXTimur Tabi2006-11-03-8/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PREREQUISITE PATCHES: * This patch can only be applied after the following patches have been applied: 1) DNX#2006092142000015 "Add support for the MPC8349E-mITX 1/2" 2) DNX#2006092142000024 "Add support for the MPC8349E-mITX 2/2" CHANGELOG: * For the 8349E-mITX, fix some size values in pci_init_board(), enable the clock for the 2nd USB board (Linux kernel will hang otherwise), and fix the CONFIG_BOOTARGS macro. Signed-off-by: Timur Tabi <timur@freescale.com>
| * | | | mpc83xx: Add support for the MPC8349E-mITXTimur Tabi2006-11-03-0/+769
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PREREQUISITE PATCHES: * This patch can only be applied after the following patches have been applied: 1) DNX#2006090742000024 "Add support for multiple I2C buses" 2) DNX#2006090742000033 "Multi-bus I2C implementation of MPC834x" 3) DNX#2006091242000041 "Additional MPC8349 support for multibus i2c" 4) DNX#2006091242000078 "Add support for variable flash memory sizes on 83xx systems" 5) DNX#2006091242000069 "Add support for Errata DDR6 on MPC 834x systems" CHANGELOG: * Add support for the Freescale MPC8349E-mITX reference design platform. The second TSEC (Vitesse 7385 switch) is not supported at this time. Signed-off-by: Timur Tabi <timur@freescale.com>
| * | | | Multi-bus I2C implementation of MPC834xBen Warren2006-11-03-11/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hello, Attached is a patch implementing multiple I2C buses on the MPC834x CPU family and the MPC8349EMDS board in particular. This patch requires Patch 1 (Add support for multiple I2C buses). Testing was performed on a 533MHz board. /*** Note: This patch replaces ticket DNX#2006083042000027 ***/ Signed-off-by: Ben Warren <bwarren@qstreams.com> CHANGELOG: Implemented driver-level code to support two I2C buses on the MPC834x CPU family and the MPC8349EMDS board. Available I2C bus speeds are 50kHz, 100kHz and 400kHz on each bus. regards, Ben
| * | | | Add support for multiple I2C busesBen Warren2006-11-03-0/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hello, Attached is a patch providing support for multiple I2C buses at the command level. The second part of the patch includes an implementation for the MPC834x CPU and MPC8349EMDS board. /*** Note: This patch replaces ticket DNX#2006083042000018 ***/ Signed-off-by: Ben Warren <bwarren@qstreams.com> Overview: 1. Include new 'i2c' command (based on USB implementation) using CONFIG_I2C_CMD_TREE. 2. Allow multiple buses by defining CONFIG_I2C_MULTI_BUS. Note that the commands to change bus number and speed are only available under the new 'i2c' command mentioned in the first bullet. 3. The option CFG_I2C_NOPROBES has been expanded to work in multi-bus systems. When CONFIG_I2C_MULTI_BUS is used, this option takes the form of an array of bus-device pairs. Otherwise, it is an array of uchar. CHANGELOG: Added new 'i2c' master command for all I2C interaction. This is conditionally compiled with CONFIG_I2C_CMD_TREE. New commands added for setting I2C bus speed as well as changing the active bus if the board has more than one (conditionally compiled with CONFIG_I2C_MULTI_BUS). Updated NOPROBE logic to handle multiple buses. Updated README. regards, Ben
| * | | | mpc83xx: fix TQM build by defining a CFG_FLASH_SIZE for itTimur Tabi2006-11-03-0/+1
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| * | | | mpc83xx: Unified TQM834x variable names with 83xx and consolidated macrosTanya Jiang2006-11-03-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unified TQM834x variable names with 83xx and consolidated macro in preparation for the 8360 and other upcoming 83xx devices. Signed-off-by: Tanya Jiang <tanya.jiang@freescale.com>
| * | | | mpc83xx: Changed to unified mpx83xx names and added common 83xx changesDave Liu2006-11-03-94/+177
| | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | Incorporated the common unified variable names and the changes in preparation for releasing mpc8360 patches. Signed-off-by: Dave Liu <daveliu@freescale.com>
generated by cgit v1.1 at 2024-12-26 10:39:01 +0000