| Commit message (Collapse) | Author | Age | Lines |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Minor cleanup for DaVinci NAND code:
- Use I/O addresses from nand_chip; CONFIG_SYS_NAND_BASE won't
be defined when there are multiple chipselect lines in use
(as with common 2 GByte chips).
- Cleanup handling of EMIF control registers
* Only need one pointer pointing to them
* Remove incorrect and unused struct supersetting them
- Use the standard waitfunc; we don't need a custom version
- Partial legacy cleanup:
* Don't initialize every board like it's a DM6446 EVM
* #ifdef a bit more code for BROKEN_ECC
Sanity checked with small page NAND on dm355 and dm6446 EVMs;
and large page on dm355 EVM (packaged as two devices, not one).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
|
|
|
|
| |
Signed-off-by: Wolfgang Denk <wd@denx.de>
|
|\
| |
| |
| |
| |
| |
| | |
Conflicts:
drivers/spi/Makefile
Signed-off-by: Wolfgang Denk <wd@denx.de>
|
| |
| |
| |
| | |
Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
|
| |
| |
| |
| |
| |
| | |
This patch abstracts Kirkwood arch specific changes to support ehci-kirkwood driver
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
This sets CONFIG_SYS_HZ to 1000 as required, and completely rewrites
timer code, which is now both correct and much smaller. Unused
functions like udelay_masked() have been removed as no driver uses
them, even the ones that are not currently active for this board.
mtu.h is copied literally from the kernel sources.
Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
| |
| |
| |
| |
| |
| |
| |
| |
| | |
The evaluation kit has both Nand and OneNand, both drivers are there
and the two configurations only select a different default for the
jffs partition. This adds the OneNand driver and cleans up storage.
Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
|
| |
| |
| |
| |
| |
| |
| |
| | |
There is only one public release of the Nomadik chip, so the ifdef
in reset code as well as a define in the config file are not needed
Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
|
| |
| |
| |
| |
| |
| |
| |
| | |
This is an error in my side in the initial submission: nobody
calls it ""nmdk8815", it's "nomadik hardware kit", nhk8815, instead.
Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
|
| |
| |
| |
| |
| |
| |
| | |
The Polaris board is based on the TrizepsIV module of
Keith & Koep (http://www.keith-koep.com).
Signed-off-by: Stefano Babic <sbabic@denx.de>
|
| |
| |
| |
| |
| |
| |
| | |
This patch adds support for esd gmbh MEESC board.
The MEESC is based on an Atmel AT91SAM9263 SoC.
Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
|
| |
| |
| |
| |
| |
| | |
update against linux v2.6.30
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
| |
| |
| |
| |
| |
| |
| |
| |
| | |
To enable CAN init, CONFIG_CAN has to be defined in the board config file
and at91_can_hw_init() has to be called in the board specific code.
CAN is available on AT91SAM9263 and AT91CAP9 SoC.
Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
|
| |
| |
| |
| |
| |
| | |
Correct define typo (. -> ,)
Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Add support for Freescale's i.MX31 PDK board (a.k.a. 3 stack board).
This patch assumes that some other program performs the actual
NAND boot.
Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
Acked-by: Fabio Estevam <fabioestevam@yahoo.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
| |
| |
| |
| | |
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
| |
| |
| |
| | |
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
| |
| |
| |
| |
| |
| | |
Signed-off-by: HeungJun, Kim <riverful.kim@samsung.com>
CC: Dirk Behme <dirk.behme@googlemail.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
| |
| |
| |
| |
| | |
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Peter Pearse <peter.pearse@arm.com>
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Kirkwood family controllers are highly integrated SOCs
based on Feroceon-88FR131/Sheeva-88SV131/arm926ejs cpu core.
SOC versions supported:-
1) 88F6281-A0 define CONFIG_KW88F6281_A0
2) 88F6192-A0 define CONFIG_KW88F6192_A0
Other supported features:-
1) get_random_hex() fucntion
2) PCI Express port initialization
3) NS16550 driver support
Contributors:
Yotam Admon <yotam@marvell.com>
Michael Blostein <michaelbl@marvell.com
Reviewed-by: Ronen Shitrit <rshitrit@marvell.com>
Acked-by: Stefan Rose <sr@denx.de>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
|
| |
| |
| |
| |
| |
| |
| | |
This patch is required for Kirkwood SoC support
may be used by other ARM architectures
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
|
| |
| |
| |
| | |
Signed-off-by: Matthias Ludwig <mludwig@ultratronik.de>
|
| |
| |
| |
| |
| |
| | |
This patch adds a SPI driver for the Marvell Kirkwood SoC's.
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
|
| |
| |
| |
| |
| | |
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Peter Pearse <peter.pearse@arm.com>
|
| |
| |
| |
| |
| |
| |
| | |
UART hardware on i.MX27 is the same as on the i.MX31 so we just
need to provide the driver with correct address of the registers.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
|
| |
| |
| |
| |
| |
| | |
This patch adds generic code to support Freescale's i.MX27 SoCs.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
|
| |
| |
| |
| | |
Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
|
| |
| |
| |
| | |
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
This patch adds the NAND SPL framework needed to boot i.MX31 boards
from NAND.
It has been tested on a i.MX31 PDK board with large page NAND. Small
page NANDs should work as well, but this has not been tested.
Note: The i.MX31 NFC uses a non-standard layout for large page NANDs,
whether this is compatible with a particular setup depends on how
the NAND device is programmed by the flash programmer (e.g. JTAG
debugger).
The patch is based on the work by Maxim Artamonov.
Signed-off-by: Maxim Artamonov <scn1874@yandex.ru>
Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
|
| |
| |
| |
| |
| |
| | |
the lowlevel init sequence is the same so unify it
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
| |
| |
| |
| |
| |
| | |
this will allow you to store use it for the env and to boot directly U-Boot from
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
The PM9261 board is based on the AT91SAM9261-EK board.
Here is the page on Ronetix website:
http://www.ronetix.at/starter_kit_9261.html
Signed-off-by: Ilko Iliev <iliev@ronetix.at>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
| |
| |
| |
| |
| |
| |
| | |
optimize a few the RAM init
Signed-off-by: Ilko Iliev <iliev@ronetix.at>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
| |
| |
| |
| |
| |
| |
| | |
move PSRAM init to pm9263.c
this will allow us after to make the nor lowlevel_init generic
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
|\ \ |
|
| | |
| | |
| | |
| | | |
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
|
| | |
| | |
| | |
| | | |
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
|
| | |
| | |
| | |
| | | |
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Reviewed-by: Ira W. Snyder <iws@ovro.caltech.edu>
Tested-by: Ira W. Snyder <iws@ovro.caltech.edu>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Defining the next two configs allows to switch the serial port from the
console using the setenv stdin and stdout
1. #define CONFIG_SERIAL_MULTI 1 /* Enable both serial ports */
2. #define CONFIG_SYS_CONSOLE_IS_IN_ENV /* determine from environment */
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
| | |
| | |
| | |
| | |
| | | |
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Initial support for Extreme Engineering Solutions XPedite5170 -
a MPC8640-based 3U VPX single board computer with a PMC/XMC
site.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
| | |
| | |
| | |
| | |
| | | |
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
| | |
| | |
| | |
| | |
| | | |
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
| | |
| | |
| | |
| | |
| | | |
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
DMA support is now enabled via the CONFIG_FSL_DMA define instead of the
previous CONFIG_DDR_ECC
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
| | |
| | |
| | |
| | |
| | | |
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
We want the outbound PCI memory map to end at the 4G boundary so we
can maximize the amount of space available for inbound mappings if
we have large amounts of memory.
This matches the device tree setup in the kernel for the 36-bit physical
configs for the platforms that have one (MPC8641 HPCN & MPC8572 DS).
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
| |/
|/|
| |
| |
| |
| |
| |
| | |
Unify with 83xx and 85xx and use CPU_TYPE_ENTRY. We are going to use
this to convey the # of cores and DDR width in the near future so its
good to keep in sync.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
| |
| |
| |
| |
| |
| |
| | |
The SPI flash define is named CONFIG_SF_DEFAULT_SPEED, not
CONFIG_SF_DEFAULT_HZ, so fix the typos in the Blackfin boards.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|