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* edid: Add an edid_check_checksum() helper functionHans de Goede2015-01-14-0/+9
| | | | | | | Add a helper function to check the checksum of an EDID data block. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Anatolij Gustschin <agust@denx.de>
* videomodes: Add video_edid_dtd_to_ctfb_res_modes helper functionHans de Goede2015-01-14-0/+4
| | | | | | | | Add a video_edid_dtd_to_ctfb_res_modes helper function to convert an EDID detailed timing to a struct ctfb_res_modes. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Anatolij Gustschin <agust@denx.de>
* sunxi: Fix CONFIG_UART0_PORT_F build and add it to menuconfigSiarhei Siamashka2015-01-14-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | The CONFIG_UART0_PORT_F option has been supported since http://git.denx.de/?p=u-boot.git;a=commit;h=ff2b47f6a9cc1025 This option is primarily useful only for low level u-boot debugging on tablets, where normal UART0 is difficult to access and requires device disassembly and/or soldering. This patch now allows it to be selected from menuconfig. A dependency on SPL_FEL is added because u-boot does not support booting from NAND yet and also booting from SD card is impossible when a MicroSD breakout board is plugged into the SD slot. Additionally a compilation problem is fixed: common/spl/built-in.o: In function `spl_mmc_load_image': /tmp/u-boot-sunxi/common/spl/spl_mmc.c:94: undefined reference to `mmc_initialize' /tmp/u-boot-sunxi/common/spl/spl_mmc.c:96: undefined reference to `find_mmc_device' /tmp/u-boot-sunxi/common/spl/spl_mmc.c:104: undefined reference to `mmc_init' scripts/Makefile.spl:206: recipe for target 'spl/u-boot-spl' failed Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* sun8i: Add dram initialization supportHans de Goede2015-01-14-0/+2
| | | | | | | | Based on the register / dram_para headers from the Allwinner u-boot / linux sources + the init sequences from boot0. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: axp221: Explicitly turn off unused voltagesHans de Goede2015-01-14-1/+7
| | | | | | | | | Explicitly turn off unused voltages, rather then leaving them as is. Likewise explictly enabled the dcdc convertors, rather then assuming they are already enabled at boot. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: axp221: Add axp223 supportHans de Goede2015-01-14-0/+4
| | | | | | | | | The axp223 appears to be the same as the axp221, except that it uses the rsb to communicate rather then the p2wi. At least all the registers we use are 100% the same. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sun6i: axp221: Add axp221_get_sid functionHans de Goede2015-01-14-0/+6
| | | | | | | | For sun6i the SID is stored in the pmic, rather then in the SoC itself, add a function to retreive the sid. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* Merge git://git.denx.de/u-boot-x86Tom Rini2015-01-13-94/+106
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| * x86: Remove CONFIG_DISPLAY_CPUINFO in chromebook_link.hBin Meng2015-01-13-1/+0
| | | | | | | | | | | | | | | | CONFIG_DISPLAY_CPUINFO is already defined in x86-common.h, so remove it to avoid duplication. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * x86: Make chromebook_link the default board for corebootBin Meng2015-01-13-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change SYS_CONFIG_NAME and DEFAULT_DEVICE_TREE to chromebook_link which is currently the only real board officially supported to run U-Boot loaded by coreboot. Note the symbolic link file chromebook_link.dts is deleted and link.dts is renamed to chromebook_link.dts. To avoid multiple definition of video_hw_init, the CONFIG_VIDEO_X86 define needs to be moved to arch/x86/cpu/ivybridge/Kconfig. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * x86: Remove include/configs/coreboot.hBin Meng2015-01-13-70/+0
| | | | | | | | | | | | | | | | Since we already swtiched to use the new mechanism for building U-Boot for coreboot, coreboot.h is no longer needed so remove it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * x86: Move CONFIG_SYS_CAR_xxx to KconfigBin Meng2015-01-13-2/+2
| | | | | | | | | | | | | | | | | | | | Move CONFIG_SYS_CAR_ADDR and CONFIG_SYS_CAR_SIZE to Kconfig so that we don't need them in the board configuration file thus the same board configuratoin file can be used to build both coreboot version and bare version. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * x86: coreboot: Move coreboot-specific defines from coreboot.h to KconfigBin Meng2015-01-13-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | There are many places in the U-Boot source tree which refer to CONFIG_SYS_COREBOOT, CONFIG_CBMEM_CONSOLE and CONFIG_VIDEO_COREBOOT that is currently defined in coreboot.h. Move them to arch/x86/cpu/coreboot/Kconfig so that we can switch to board configuration file to build U-Boot later. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * x86: Move CONFIG_X86_RESET_VECTOR and CONFIG_SYS_X86_START16 to KconfigBin Meng2015-01-13-4/+0
| | | | | | | | | | | | | | | | Convert CONFIG_X86_RESET_VECTOR and CONFIG_SYS_X86_START16 to Kconfig options so that we can remove them from board configuration file. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * fdt: Add several apis to decode pci device nodeBin Meng2015-01-13-11/+98
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds several APIs to decode PCI device node according to the Open Firmware PCI bus bindings, including: - fdtdec_get_pci_addr() for encoded pci address - fdtdec_get_pci_vendev() for vendor id and device id - fdtdec_get_pci_bdf() for pci device bdf triplet - fdtdec_get_pci_bar32() for pci device register bar Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> (Include <pci.h> in fdtdec.h and adjust tegra to fix build error)
| * pci: Make pci apis usable before relocationBin Meng2015-01-12-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce a gd->hose to save the pci hose in the early phase so that apis in drivers/pci/pci.c can be used before relocation. Architecture codes need assign a valid gd->hose in the early phase. Some variables are declared as static so change them to be either stack variable or global data member so that they can be used before relocation, except the 'indent' used by CONFIG_PCI_SCAN_SHOW which just affects some print format. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | PM9G45 adding generic board supportGeorgi Botev2015-01-13-0/+2
| | | | | | | | Signed-off-by: Georgi Botev <botev@ronetix.at>
* | PM9261 adding generic board supportGeorgi Botev2015-01-13-0/+2
| | | | | | | | Signed-off-by: Georgi Botev <botev@ronetix.at>
* | PM9263 adding generic board supportGeorgi Botev2015-01-13-0/+2
| | | | | | | | Signed-off-by: Georgi Botev <botev@ronetix.at>
* | ppc4xx: switch VOM405 to generic boardMatthias Fuchs2015-01-13-0/+2
| | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | ppc4xx: switch PMC405DE to generic boardMatthias Fuchs2015-01-13-0/+2
| | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | ppc4xx: switch PLU405 to generic boardMatthias Fuchs2015-01-13-0/+2
| | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | ppc4xx: switch CPCI2DP to generic boardMatthias Fuchs2015-01-13-0/+2
| | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | ppc4xx: cleanup CPCI4052 boardMatthias Fuchs2015-01-13-0/+2
| | | | | | | | | | | | | | - remove some obsolete code - switch to generic board Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | ppc4xx: remove some CPCI405 variantsMatthias Fuchs2015-01-13-1069/+0
| | | | | | | | | | | | only keep CPCI4052 Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | ppc4xx: remove G2000 boardMatthias Fuchs2015-01-13-383/+0
| | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | ppc4xx: remove WUH405 boardMatthias Fuchs2015-01-13-346/+0
| | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | ppc4xx: remove VOH405 boardMatthias Fuchs2015-01-13-407/+0
| | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | ppc4xx: remove PMC405 boardMatthias Fuchs2015-01-13-318/+0
| | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | ppc4xx: remove PCI405 boardMatthias Fuchs2015-01-13-294/+0
| | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | ppc4xx: remove OCRTC boardMatthias Fuchs2015-01-13-285/+0
| | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | ppc4xx: remove HUB405 boardMatthias Fuchs2015-01-13-351/+0
| | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | ppc4xx: remove HH405 boardMatthias Fuchs2015-01-13-479/+0
| | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | ppc4xx: remove DU440 boardMatthias Fuchs2015-01-13-415/+0
| | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | ppc4xx: remove DU405 boardMatthias Fuchs2015-01-13-273/+0
| | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | ppc4xx: remove DP405 boardMatthias Fuchs2015-01-13-246/+0
| | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | ppc4xx: remove CPCIISER4 boardMatthias Fuchs2015-01-13-237/+0
| | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | ppc4xx: remove CMS700 boardMatthias Fuchs2015-01-13-308/+0
| | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | ppc4xx: remove ASH405 boardMatthias Fuchs2015-01-13-351/+0
| | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | ppc4xx: remove AR405 boardMatthias Fuchs2015-01-13-253/+0
| | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | ppx4xx: remove APC405 boardMatthias Fuchs2015-01-13-424/+0
| | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | m68k: remove TASREG boardMatthias Fuchs2015-01-13-287/+0
|/ | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Acked-by: Stefan Roese <sr@denx.de>
* powerpc: xes: Convert to generic boardJohn Schmoller2015-01-12-0/+10
| | | | | | | | Convert Extreme Engineering Solutions products to use generic board support. Signed-off-by: John Schmoller <jschmoller@xes-inc.com> Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* ARM: kirkwood: dns325: Add generic board supportStefan Herbrechtsmeier2015-01-12-0/+1
| | | | Signed-off-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
* Change e-mail address of Stefan HerbrechtsmeierStefan Herbrechtsmeier2015-01-12-1/+1
| | | | Signed-off-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
* common/board_f.c: fix compile error when tracing disabledKevin Hilman2015-01-12-7/+0
| | | | | | | | | | | | | | | | When CONFIG_TRACE is disabled, linking fails with: common/built-in.o:(.data.init_sequence_f+0x8): undefined reference to `trace_early_init' To fix, wrap trace init calls with #ifdef CONFIG_TRACE. While at it, remove the static inline version of the init call from trace.h as suggested by Simon Glass, since it doesnt work. Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@ti.com> Signed-off-by: Kevin Hilman <khilman@linaro.org> Acked-by: Simon Glass <sjg@chromium.org>
* arm: vf610: fix boot from SD-cardStefan Agner2015-01-09-1/+4
| | | | | | | | | | | | | | | | Boot from SD-card (and probably also from NAND) was broken since commit d6d07a9bec ("arm: vf610: add NAND support for vf610twr"). It looks like the increased size of U-Boot lead to a situation where the boot ROM overwrote its own stack/heap while loading U-Boot from the SD-card to the SRAM. However, U-Boot worked fine when loaded through USB serial loader directly into SRAM. It looks like loading from SD-card uses other stack/heap location then the serial loader (or maybe no stack or heap at all). This fix moves U-Boot to gfxRAM, which is 512kB in size and is not used by the boot ROM nor the SD-card loader of it. Signed-off-by: Stefan Agner <stefan@agner.ch> Acked-by: Bill Pringlemeir <bpringlemeir@nbsps.com>
* Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2015-01-08-0/+8
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| * imx:mx6sxsabresd support qspi AHB readPeng Fan2015-01-09-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add CONFIG_SYS_FSL_QSPI_AHB in header file to enable AHB in driver. In order to count the time, add CONFIG_CMD_TIME. Using AHB read can improve the the read speed about 30%. AHB read: => time sf read 0x8f800000 0 100000 SF: 1048576 bytes @ 0x0 Read: OK time: 0.174 seconds => time sf read 0x8f800000 1000000 100000 SF: 1048576 bytes @ 0x1000000 Read: OK time: 0.174 seconds IP read: => time sf read 0x8f800000 0 100000 SF: 1048576 bytes @ 0x0 Read: OK time: 0.227 seconds => time sf read 0x8f800000 1000000 100000 SF: 1048576 bytes @ 0x1000000 Read: OK time: 0.227 seconds Note: Quad read is not supported in driver, now. In my side, using AHB and Quad read can achieve about 16MB/s. Anyway, I have plan to reimplement the driver using DTB and DM, then make the code cleaner and more feature can be added. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * mx6sxsabresd: support qspi flash bigger than 16MBPeng Fan2015-01-07-0/+5
| | | | | | | | | | | | | | | | | | | | | | mx6sxsabresd revb board uses 32MB qspi flash, reva board uses 16MB qspi flash. Currently, the default supported platform is revb board. If want to configure for reva board, just define CONFIG_MX6SX_SABRESD_REVA in mx6sxsabresd.h to support reva qspi flashes whose size is 16MB. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>