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* Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xxWolfgang Denk2008-01-23-103/+594
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| * Merge branch 'master' of /home/stefan/git/u-boot/u-bootStefan Roese2008-01-17-37/+1221
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| * | ppc4xx: Netstal HCU5 board. Added POST. Various fixesNiklaus Giger2008-01-17-51/+85
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Various fixes - Reduced rom_size from 384 to 320 kB - Environment is now in flash - Added POST - Support for OF Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
| * | ppc4xx: Netstal HCU4 board. Added POST. Various fixesNiklaus Giger2008-01-17-48/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Various fixes - Reduced rom_size from 384 to 320 kB - Environment is now in flash - Added POST - Support for OF Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
| * | ppc4xx: Complete DU440 board supportMatthias Fuchs2008-01-17-0/+438
| | | | | | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
| * | ppc4xx: Fix remaining CONFIG_COMMANDS in 4xx filesStefan Roese2008-01-17-4/+4
| | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
* | | Merge branch 'master' of git://www.denx.de/git/u-boot-mpc86xxWolfgang Denk2008-01-23-0/+2
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| * | | 86xx: enable command-line editingTimur Tabi2008-01-17-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Enable command-line editing for all MPC86xx boards. Signed-off-by: Timur Tabi <timur@freescale.com>
* | | | Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xxWolfgang Denk2008-01-23-0/+132
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| * \ \ \ Merge branch 'kumar'Andy Fleming2008-01-17-0/+132
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| | * | | 85xx: Get ride of old TLB setup codeKumar Gala2008-01-17-17/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that all boards have been converted, remove old config code and the config option for the new style. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | | 85xx: Convert TQM85xx to new TLB setupKumar Gala2008-01-17-0/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | | 85xx: Convert STXGP3 & STXSSA to new TLB setupKumar Gala2008-01-17-0/+2
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | | 85xx: Convert SBC8540/SBC8560/SBC8548 to new TLB setupKumar Gala2008-01-17-0/+3
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | | 85xx: Convert PM854/PM856 to new TLB setupKumar Gala2008-01-17-0/+2
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | | 85xx: Convert MPC8540EVAL to new TLB setupKumar Gala2008-01-17-0/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | | 85xx: Convert MPC8568 MDS to new TLB setupKumar Gala2008-01-17-0/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | | 85xx: Convert MPC8541/MPC8555/MPC8548 CDS to new TLB setupKumar Gala2008-01-17-0/+3
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | | 85xx: Convert MPC8540/MPC8560 ADS to new TLB setupKumar Gala2008-01-17-0/+2
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | | 85xx: Convert ATUM8548 to new TLB setupKumar Gala2008-01-17-0/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | | 85xx: Convert MPC8544 DS to new TLB setupKumar Gala2008-01-17-0/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | | 85xx: Introduce new tlb APIKumar Gala2008-01-17-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a set of functions to manipulate TLB entries: * set_tlb() - write a tlb entry * invalidate_tlb() - invalidate a tlb array * disable_tlb() - disable a variable size tlb entry * init_tlbs() - setup initial tlbs based on static table Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | | 85xx: convert remaining 85xx boards over to use new LAW init codeKumar Gala2008-01-16-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Converted ATUM8548, MPC8568 MDS, MPC8540 EVAL, and TQM85xx boards over to use new LAW init code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | | 85xx: convert STXGP3/STXSSA over to use new LAW init codeKumar Gala2008-01-16-0/+2
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | | 85xx: convert PM854/PM856 over to use new LAW init codeKumar Gala2008-01-16-0/+2
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | | 85xx: convert SBC8540/SBC8560/SBC8548 over to use new LAW init codeKumar Gala2008-01-16-0/+3
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | | 85xx: convert MPC8541/MPC8555/MPC8548 CDS over to use new LAW init codeKumar Gala2008-01-16-0/+3
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | | 85xx: convert MPC8540/MPC8560 ADS over to use new LAW init codeKumar Gala2008-01-16-0/+2
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | | 85xx: convert MPC8544 DS over to use new LAW init codeKumar Gala2008-01-16-0/+2
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | | 85xx: Move LAW init code into CKumar Gala2008-01-16-0/+80
| | | |/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the initialization of the LAWs into C code and provide an API to allow modification of LAWs after init. Board code is responsible to provide a law_table and num_law_entries. We should be able to use the same code on 86xx as well. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | | mpc83xx: Correct the struct spi8xxx in mpc8xxx_spi.hDave Liu2008-01-18-15/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The commit 04a9e1180ac76a7bacc15a6fcd95ad839d65bddb cause the 83xx immap broken, so the DMA and PCI will be failed. The patch fix the struct spi8xxx and rm struct spi83xx. Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | | codingstyle cleanup for spi driverKim Phillips2008-01-17-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | ..and rm unused CONFIG_FSL_SPI define Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | | Implement hard SPI driver on MPC8349EMDSBen Warren2008-01-17-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch implements the fsl_spi driver on the MPC8349EMDS evaluation board. This board has an ST M25P40 4Mbit EEPROM on its SPI bus Signed-off-by: Ben Warren <biggerbadderben@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | | Add support for a Freescale non-CPM SPI controllerBen Warren2008-01-17-4/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the SPI controller found on Freescale PowerPC processors such as the MCP834x family. Additionally, a new config option, CONFIG_HARD_SPI, is added for general purpose SPI controller use. Signed-off-by: Ben Warren <biggerbadderben@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | | mpc83xx: Fix the fatal conflict of mergeDave Liu2008-01-17-7/+3
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The commit 9e89647889cd4b5ada5b5e7cad6cbe55737a08d7 will cause the mpc8315erdb board can't boot up. The patch fix that bug, and remove the duplicated #ifdef CFG_SPCR_TSECEP code and clean the SCCR_TSEC2 for MPC8313E processor. Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | Merge branch 'master' of git+ssh://10.10.0.7/home/wd/git/u-boot/masterWolfgang Denk2008-01-17-1/+1
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| * | | Set ips dividor to 1/4 of csb clock.Grzegorz Bernacki2008-01-17-1/+1
| |/ / | | | | | | | | | | | | | | | | | | Previous setting cause ips clock to be out of spec. This bug was found by John Rigby from Freescale. Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
* | | Merge branch 'master' of git://www.denx.de/git/u-boot-shWolfgang Denk2008-01-16-0/+474
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| * | sh: Add support SH7710/SH7712Nobuhiro Iwamatsu2008-01-15-1/+67
| | | | | | | | | | | | | | | | | | | | | | | | SH7710/SH7712 of SH3 CPU are supported. SH771X is called SH-Ether, and has the Ether controller in CPU. The driver of Ether is not included in this patch. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: Add support of map_physmem() and unmap_physmem() to SuperHNobuhiro Iwamatsu2008-01-15-0/+27
| | | | | | | | | | | | | | | | | | | | | This patch add the support of map_physmem() and unmap_physmem() used with Common Flash Interface(CFI) driver. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: Add support for MS7720RP02 boardYoshihiro Shimoda2008-01-15-0/+134
| | | | | | | | | | | | | | | | | | Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: Add support SH3 and SH7720Yoshihiro Shimoda2008-01-15-0/+247
| | | | | | | | | | | | | | | | | | Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | | Merge branch 'master' of git://www.denx.de/git/u-boot-mpc86xxWolfgang Denk2008-01-16-5/+8
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| * | | FSL: Convert board/freescale/common/Makefile to use CONFIG_Jon Loeliger2008-01-16-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the board/freescale/common/Makefile to use CONFIG_* options to select which files to conditionally compile into the board/freescale/common library rather than conditionally compiling entire files. Now handles:: CONFIG_FSL_PIXIS CONFIG_FSL_DIU_FB CONFIG_PQ_MDS_PIB CONFIG_ID_EEPROM is introduced until CFG_ID_EEPROM is gone. Signed-off-by: Jon Loeliger <jdl@freescale.com>
| * | | Use CONFIG_ULI526X as MPC8610HPCD default Ethernet driverRoy Zang2008-01-16-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use driver/net/uli526x.c as MPC8610HPCD default Ethernet driver. Remove unused ethernet CONFIG_ options. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Acked-by: Jon Loeliger <jdl@freescale.com>
* | | | Add support for the MPC837xERDBKim Phillips2008-01-16-0/+596
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MPC837xERDB board support includes: * DDR2 330MHz hardcoded (soldered on the board) * Local Bus NOR Flash * I2C, UART and RTC * eTSEC RGMII (TSEC0 - RTL8211B with MII; * TSEC1 - VSC7385 local bus, hardcoded, requires seperate firmware * load) Signed-off-by: Kevin Lam <kevin.lam@freescale.com> Signed-off-by: Joe D'Abbraccio <joe.d'abbraccio@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | | mpc83xx: add support for more system clock performance controlsKim Phillips2008-01-16-3/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | System registers that are modified are the Arbiter Configuration Register (ACR), the System Priority Control Register (SPCR), and the System Clock Configuration Register (SCCR). Signed-off by: Michael F. Reiss <Michael.F.Reiss@freescale.com> Signed-off by: Joe D'Abbraccio <ljd015@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | | mpc83xx: fix QE ETHPRIMEs to correct 'FSL UEC0' valueKim Phillips2008-01-16-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | continuation of commit b96c83d4ae475a70ef2635cd0e748174c44c8601 Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | | Changes in uboot DDR configuration for MPC8313eRDBPoonam Aggrwal2008-01-16-16/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These changes were identified by HighSmith Bill ,Mazzyar and Joseph for DDR configuration in u-boot code. Some are related to performance, some affect stability and some correct few basic errors in the current configuration. The changes have been tested and found to give better memory latency figures on MPC8313eRDB.LMBench figures prove it. The changes are: - CS0_CONFIG[ AP_n_EN] is changed from 1 to 0 (this may improve performance for application with many read or write to open pages). - CS0_CONFIG[ODT_WR_CFG] is currently changed from 100 to 001 (activating all the CS when only one is used may cause unwanted noise on the system) - TIMING_CFG_1[ACTTOPRE] is changed from 9clks to 8clks (based on Tras=45ns) - TIMING_CFG_1[REFREC] changed from 21 clks to 18clks. - TIMING_CFG_2[AL] value changed from 0 setting to 1 clk to comply with the 3 ODT clk requirements) - TIMING_CFG_2[CPO] was set to a reserved value, changed to RL+3/4. - TIMING_CFG_2[FOUR_ACT] is changed from 10 clks to 6clks. - DDR_SDRAM_MODE[AL]changed from 0 to 1. - DDR_SDRAM_MODE[WRREC] changed from 1 clk to 3 clks. - DDR_SDRAM_INTERVAL[REFINT] is changed from 0x0320 to 0x0510. - DDR_SDRAM_INTERVAL[BSTOPRE] is changed from 0x64 to 0x0500. The patch is based of git://www.denx.de/git/u-boot-mpc83xx.git The last commit on this tree was 6775c68683a53c7abc778774641aac6f833a2cbf Signed-off-by: Poonam Aggrwal-b10812 <b10812@freescale.com> Cc: Bill HighSmith <Bill.Highsmith@freescale.com> Cc: Razzaz Mazyar <MRazzaz@freescale.com> Cc: Josep P J <PJ.Joseph@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | | Enable the isdram command on the MPC8360EMDS boardJerry Van Baren2008-01-16-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The isdram command prints out decoded information the "serial presence detect" (SPD) chip on the SDRAM SIMMs. This can be very helpful when debugging memory configuration problems. Signed-off-by: Gerald Van Baren <vanbaren@cideas.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
generated by cgit v1.1 at 2024-12-25 13:43:28 +0000