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* net: phy: Add PHY driver for mv88e61xx switchesKevin Smith2016-05-24-0/+1
| | | | | | | | | | | | | | | The previous mv88e61xx driver was a driver for configuring the switch, but did not integrate with the PHY/networking system, so it could not be used as a PHY by U-boot. This is a complete rework to support this device as a PHY. Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com> Acked-by: Prafulla Wadaskar <prafulla@marvell.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marex@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* phy: Add phy driver support for xilinx PCS/PMA coreSiva Durga Prasad Paladugu2016-04-04-0/+1
| | | | | | | | Add phy driver support for xilinx PCS/PMA core Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* net: phy: introduce a quirk PHY_FLAG_BROKEN_RESETShaohui Xie2016-01-28-0/+2
| | | | | | | | | | | Current driver always performs a phy soft reset when connecting the phy device, but soft reset is not always supported by a phy device, so introduce a quirk PHY_FLAG_BROKEN_RESET to let such a phy device to skip soft reset. This commit uses 'flags' of phy device structure to store the quirk. Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* drivers/net/phy: introduce phy_set_supported()Alexey Brodkin2016-01-28-0/+1
| | | | | | | | | | | | | This new function will allow MAC drivers to override supported capabilities of the phy. It is required when MAC cannot handle all speeds supported by phy. For example phy supports up-to 1Gb connections while MAC may only work in modes up to 100 or even 10 Mbit/sec. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* net: phy: breakdown PHY_*_FEATURES definesFlorian Fainelli2016-01-28-7/+15
| | | | | | | | | | Breakdown the PHY_*_FEATURES into per speed defines such that we can easily re-use them individually. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* net: phy: Add support for Texas Instruments DP83867Edgar E. Iglesias2015-11-19-0/+1
| | | | | | | | | Code is taken from Linux kernel driver (v4.2). Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* net/phy: fixup for get_phy_idShengzhou Liu2015-04-20-0/+1
| | | | | | | | commit 3c6928fd7b0f84 "net: phy: fix warnings with W=1" caused some PHYs(e.g. CS4315/CS4340) not working. This patch fixes the warning and make those special PHYs working as well. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
* dm: net: Adjust PHY interface to work with CONFIG_DM_ETHSimon Glass2015-04-18-1/+22
| | | | | | | | | | | | When driver model is used for Ethernet a few functions are passed a udevice instead of an eth_device. Also add a function to find a PHY type given its name. This will be used to decode the device tree node. Finally, put a phy_interface field in struct eth_pdata since this is an important part of the platform data for Ethernet. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* phylib: add support for aquantia PHYsShaohui Xie2015-01-16-0/+1
| | | | | | | | This patch supports AQ1202, AQ2104, AQR105 PHY. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
* net/phy: Add support for CS4315/CS4340 PHYShengzhou Liu2014-12-05-0/+2
| | | | | | | | | | | | Add support for Cortina CS4315/CS4340 10G PHY. - This driver loads CS43xx firmware from NOR/NAND/SPI/SD device to initialize Cortina PHY. - Cortina PHY has non-standard offset of PHY ID registers, thus we define own get_phy_id() to override default get_phy_id(). - To define macro CONFIG_PHY_CORTINA will enable this driver. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* net/fm: add 2.5G SGMII supportShengzhou Liu2014-11-19-0/+2
| | | | | | | | | | As auto-negotiation is not supported for 2.5G SGMII, we need to add a new type PHY_INTERFACE_MODE_SGMII_2500 to differentiate SGMII-1G and SGMII-2.5G with different setting for auto-negotiation. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* net: phy.h: Make PHY autonegotiation timeout configurableStefan Roese2014-10-23-0/+2
| | | | | | | | | | The Marvell MV78460 eval board DB-78460-BP seems to need a longer PHY autonegotiation timeout than the "standard" 4 seconds. So lets make this timeout configurable. If not defined in the board config header the original 4000ms is used. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Joe Hershberger <joe.hershberger@gmail.com>
* Change Andy Fleming's email addressAndy Fleming2014-08-06-1/+1
| | | | | | | Messages to afleming@freescale.com now bounce, and should be directed to my personal address at afleming@gmail.com Signed-off-by: Andy Fleming <afleming@gmail.com>
* wandboard: Fix sparse warningFabio Estevam2014-03-05-0/+2
| | | | | | | | | Add a prototype for board_phy_config() to fix the following sparse warning: wandboard.c:200:5: warning: symbol 'board_phy_config' was not declared. Should it be static? Cc: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2013-12-02-0/+8
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| * phy: introduce structure fixed-linkShaohui Xie2013-11-22-0/+8
| | | | | | | | | | | | | | fixed-link is used in kernel for PHY-less MAC, so introduce this structure that U-boot can use it to fixup dtb dynamically. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
* | net: add extended function to phy APIStefano Babic2013-11-22-0/+3
|/ | | | | | | | Some phys (Micrel) has extended registers that must be accessed in a special way. Add pointers to the phy driver structure to allow to use these functions with mdio command. Signed-off-by: Stefano Babic <sbabic@denx.de>
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-14/+1
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* phy: export genphy_parse_link()Yegor Yefremov2013-06-24-0/+1
| | | | Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
* Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2013-05-30-0/+2
|\ | | | | | | | | | | Conflicts: common/cmd_fpga.c drivers/usb/host/ohci-at91.c
| * net/phy: add VSC8574 supportShaohui Xie2013-05-14-0/+2
| | | | | | | | | | | | | | | | | | | | The VSC8574 is a quad-port Gigabit Ethernet transceiver with four SerDes interfaces for quad-port dual media capability. This driver supports SGMII and QSGMII MAC mode. For now SGMII mode is tested. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | phy: add support for ET1011C physMatt Porter2013-05-10-0/+1
|/ | | | | | | | | | | | Adds an ET1011C PHY driver which is derived from the Linux kernel PHY driver (drivers/net/phy/et1011c.c) from the v3.9-rc2 tag. Note that an errata workaround config option is implemented to allow for TX_CLK to be enabled even when gigabit mode is negotiated. This workaround is used on the PG1.0 TI814X EVM. Signed-off-by: Matt Porter <mporter@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
* phy: add phy_find_by_mask/phy_connect_devTroy Kisky2013-01-28-0/+3
| | | | | | | | | | | | It is useful to be able to try a range of possible phy addresses to connect. Also, an ethernet device is not required to use phy_find_by_mask leading to better separation of mii vs ethernet, as suggested by Andy Fleming. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* net: phy: add support for Micrel's KSZ9021Troy Kisky2012-02-27-0/+1
| | | | | | | | | | | Add the gigabit phy KSZ9021. Also, add function ksz9021_phy_extended_write /_read for access to the phys extended registers. The environment variable "disable_giga" can be used to disable 1000baseTx. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
* phy: add phy_smsc_init() declarationVladimir Zapolskiy2012-01-05-0/+1
| | | | | | | | | | | | This trivial change removes a compilation warning: ----8<---- phy.c: In function 'phy_init': phy.c:448:2: warning: implicit declaration of function 'phy_smsc_init' ----8<---- Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Acked-by: Marek Vasut <marek.vasut@gmail.com>
* powerpc/85xx: wait for alignment before resetting SERDES RX lanes (SERDES9)Timur Tabi2011-10-20-0/+4
| | | | | | | | The work-around for P4080 erratum SERDES9 says that the SERDES receiver lanes should be reset after the XAUI starts tranmitting alignment signals. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* phylib: Add a bunch of PHY drivers from tsecAndy Fleming2011-04-20-0/+10
| | | | | | | | | | | | | | | | The tsec driver had a bunch of PHY drivers already written. This converts them all into PHY Lib drivers, and serves as the first set of PHY drivers for PHY Lib. While doing that, cleaned up a number of magic numbers (though not all of them, as PHY vendors like to keep their numbers as magical as possible). Also, noticed that almost all of the vitesse/cicada PHYs had the same config/parse/startup functions, so those have been collapsed into one. Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Detlev Zundel <dzu@denx.de>
* Create PHY Lib for U-BootAndy Fleming2011-04-20-0/+219
Extends the mii_dev structure to participate in a full-blown MDIO and PHY driver scheme. The mii_dev structure and miiphy calls are modified in such a way to allow the original mii command and miiphy infrastructure to work as before, but also to support a new set of APIs which allow (among other things) sharing of PHY driver code and 10G support The mii command will continue to support normal PHY management functions (Clause 22 of 802.3), but will not be changed to support 10G (Clause 45). The basic design is similar to PHY Lib from Linux, but simplified for U-Boot's network and driver infrastructure. We now have MDIO drivers and PHY drivers An MDIO driver provides: read write reset A PHY driver provides: (optionally): probe config - initial setup, starting of auto-negotiation startup - waiting for AN, and reading link state shutdown - any cleanup needed The ethernet drivers interact with the PHY Lib using these functions: phy_connect() phy_config() phy_startup() phy_shutdown() Each PHY driver can be configured separately, or all at once using config_phylib_all_drivers.h (added in the patch which adds the drivers) We also provide generic drivers for Clause 22 (10/100/1000), and Clause 45 (10G) PHYs. We also implement phy_reset(), and call it in phy_connect(). Because phy_reset() is essentially the same as miiphy_reset, but: a) must support 10G PHYs, and b) should use the phylib primitives, we implement miiphy_reset, using phy_reset(), but only when CONFIG_PHYLIB is set. Otherwise, we just use the old version. In this way, we save on compile size, even if we don't manage to save code size. Pulled ethtool.h and mdio.h from: git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next-2.6 782d640afd15af7a1faf01cfe566ca4ac511319d With many, many deletions so as to enable compilation under u-boot Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Detlev Zundel <dzu@denx.de>
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