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* Set ips dividor to 1/4 of csb clock.Grzegorz Bernacki2008-01-17-1/+1
| | | | | | | Previous setting cause ips clock to be out of spec. This bug was found by John Rigby from Freescale. Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
* ADS5121: MAX slew rate for PATA pinsJohn Rigby2008-01-13-0/+9
| | | | Signed-off-by: John Rigby <jrigby@freescale.com>
* Coding style cleanup, update CHANGELOGWolfgang Denk2007-08-02-1/+1
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* [ADS5121] Support for the ADS5121 boardRafal Jaworowski2007-07-27-0/+398
The following MPC5121e subsystems are supported: - low-level CPU init - NOR Boot Flash (common CFI driver) - DDR SDRAM - FEC - I2C - Watchdog Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com> Signed-off-by: Rafal Jaworowski <raj@semihalf.com> Signed-off-by: Jan Wrobel <wrr@semihalf.com>