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* usb: xhci: Remove assumption of DWC instance based on DRA7 SoC typeNishanth Menon2016-12-03-2/+2
| | | | | | | | | | | | | | Both AM57xx and DRA7xx share the same set of base addresses for DWC controllers. The usage however differ with DWC2 instance used typically in AM57xx evms while DWC1 instances used in DRA7x platforms. Use TARGET_SOC config to differentiate so that CONFIG_AM57XX can be dropped. Eventually, this needs to be dt-fied. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* linux/compat.h: Properly implement ndelay fallbackmario.six@gdsys.cc2016-11-28-1/+1
| | | | | | | | | | | | | | | | | | | | | | | Commit c68c62 ("i2c: mvtwsi: Make delay times frequency-dependent") extensively used the ndelay function with a calculated parameter which is dependant on the configured frequency of the I2C bus. If standard speed is employed, the parameter is usually 10000 (10000ns period length for 100kHz frequency). But, since the arm architecture does not implement a proper version of ndelay, the fallback default from include/linux/compat.h is used, which defines every ndelay as udelay(1). This causes problems for slower speeds on arm, since the delay time is now 9us too short for the desired frequency, which leads to random failures of the I2C interface. To remedy this, we implement a proper, parameter-aware ndelay fallback for architectures that don't implement a real ndelay function. Reported-By: Jason Brown <Jason.brown@apcon.com> To: Tom Rini <trini@konsulko.com> To: Heiko Schocher <hs@denx.de> Signed-off-by: Mario Six <mario.six@gdsys.cc>
* sf: Adopt flash table INFO macro from LinuxJagan Teki2016-11-18-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | INFO macro make flash table entries more adjustable like adding new flash_info attributes, update ID length bytes and so on and more over it will sync to Linux way of defining flash_info attributes. - Add JEDEC_ID - Add JEDEC_EXT macro - Add JEDEC_MFR - spi_flash_params => spi_flash_info - params => info Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Jagan Teki <jagan@openedev.com>
* list: Add list_last_entry() to find the last entrySimon Glass2016-10-11-0/+11
| | | | | | | | We have list_first_entry() but in some cases it is useful to find the last item added to the list. Add a macro for this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* drivers: usb: xhci-fsl: Implement Erratum A-010151 for FSL USB3 controllerSriram Dash2016-09-27-0/+1
| | | | | | | | | | | Currently the controller by default enables the Receive Detect feature in P3 mode in USB 3.0 PHY. However, USB 3.0 PHY does not reliably support receive detection in P3 mode. Enabling the USB3 controller to configure USB in P2 mode whenever the Receive Detect feature is required. Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
* drivers: usb: xhci-fsl: Change burst beat and outstanding pipelined ↵Sriram Dash2016-09-27-0/+3
| | | | | | | | | | | transfers requests This is required for better performance, and performs below tuning: 1. Enable burst length set, and define it as 4/8/16. 2. Set burst request limit to 16 requests. Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
* Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-09-26-1/+1
|\ | | | | | | | | | | | | trini: Drop local memset() from examples/standalone/mem_to_mem_idma2intr.c Signed-off-by: Tom Rini <trini@konsulko.com>
| * armv8: ls1012a: Convert CONFIG_LS1012A to Kconfig option ARCH_LS1021AYork Sun2016-09-26-1/+1
| | | | | | | | | | | | | | | | | | Move this config to Kconfig option and clean up existing uses. Signed-off-by: York Sun <york.sun@nxp.com> CC: Calvin Johnson <calvin.johnson@nxp.com> CC: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | errno.h: sync error macros with linux 4.8-rc7Masahiro Yamada2016-09-23-11/+46
| | | | | | | | | | | | | | | | | | | | | | For synchronization, import macros from - include/uapi/asm-generic/errno-base.h - include/uapi/asm-generic/errno.h - include/linux/errno.h of Linux 4.8-rc7. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | Move ENOTSUPP defines to include/linux/errno.hMasahiro Yamada2016-09-23-2/+2
| | | | | | | | | | | | Collect a couple of duplicated defines into a single place. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | Move error macros from <asm-generic/errno.h> to <linux/errno.h>Masahiro Yamada2016-09-23-1/+126
| | | | | | | | | | | | | | | | | | | | | | There are no files that include <asm-generic/errno.h> any more. Move error macro defines to include/linux/errno.h and remove include/asm-generic/errno.h. Going forward, please include <linux/errno.h> when you need error macros. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | treewide: replace #include <asm/errno.h> with <linux/errno.h>Masahiro Yamada2016-09-23-2/+2
| | | | | | | | | | | | | | | | | | | | | | Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com>
* | Add <linux/errno.h> as a wrapper of <asm-generic/errno.h>Masahiro Yamada2016-09-23-0/+6
| | | | | | | | | | | | | | This will be used to consolidate errno.h variants. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | treewide: use #include <...> to include public headersMasahiro Yamada2016-09-23-5/+5
| | | | | | | | | | | | | | | | | | We are supposed to use #include <...> to include headers in the public include paths. We should use #include "..." only for headers in local directories. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | usb: xhci-rockchip: add rockchip dwc3 controller driverMengDongyang2016-09-22-0/+14
|/ | | | | | | | | | | | This patch add support for rockchip dwc3 controller, which corresponding to the two type-C port on rk3399 evb. Only support usb2.0 currently for we have not enable the usb3.0 phy driver and PD(fusb302) driver. Signed-off-by: MengDongyang <daniel.meng@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* xtensa: add support for the xtensa processor architecture [1/2]Chris Zankel2016-08-15-2/+2
| | | | | | | | | | | | | | The Xtensa processor architecture is a configurable, extensible, and synthesizable 32-bit RISC processor core provided by Cadence. This is the first part of the basic architecture port with changes to common files. The 'arch/xtensa' directory, and boards and additional drivers will be in separate commits. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-07-26-12/+8
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| * include: usb: Rename USB controller base address mappingRajesh Bhagat2016-07-26-12/+8
| | | | | | | | | | | | | | | | Remove Soc specific defines and use generic chasis specific defines for USB controller base address mapping. Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | mtd: fix compiler warningsSteve Rae2016-07-24-0/+5
| | | | | | | | | | | | | | - add missing declaration - update debug output format specifiers Signed-off-by: Steve Rae <steve.rae@raedomain.com>
* | mtd: nand: Increase the max OOB sizeBoris Brezillon2016-07-24-1/+1
| | | | | | | | | | | | | | Some NANDs are now exposing 1664 OOB bytes per page. Adjust the NAND_MAX_OOBSIZE value accordingly. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* | mtd: nand: add common DT init codeBrian Norris2016-07-24-0/+3
|/ | | | | | | | | | | | | | | | | These are already-documented common bindings for NAND chips. Let's handle them in nand_base. If NAND controller drivers need to act on this data before bringing up the NAND chip (e.g., fill out ECC callback functions, change HW modes, etc.), then they can do so between calling nand_scan_ident() and nand_scan_tail(). The original commit has been slightly reworked to use the fdtdec_xxx() helpers (instead of the of_xxxx() ones). Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
* armv7: armv7: introduce set_gpmc_cs0Ladislav Michl2016-07-22-0/+1
| | | | | | Allow boards to runtime detect flash type. Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
* armv7: make gpmc_cfg constLadislav Michl2016-07-22-1/+1
| | | | | | | | Signed-off-by: Ladislav Michl <ladis@linux-mips.org> [trini: Adapt am33xx, duovero, omap_zoom1] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* linux/io.h: add generic ioremap()/iounmap() definesMasahiro Yamada2016-07-14-0/+16
| | | | | | | | | | | | | | | | | For most of architectures in U-Boot, virtual address is straight mapped to physical address. So, it makes sense to have generic defines of ioremap and friends in <linux/io.h>. All of them are just empty and will disappear at compile time, but they will be helpful to implement drivers which are counterparts of Linux ones. I notice MIPS already has its own implementation, so I added a Kconfig symbol CONFIG_HAVE_ARCH_IOREMAP which MIPS (and maybe Sandbox as well) can select. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* types.h: move and redefine resource_size_tMasahiro Yamada2016-07-14-0/+4
| | | | | | | | | | | | | | Currently, this is only defined in arch/arm/include/asm/types.h, so move it to include/linux/types.h to make it available for all architectures. I defined it with phys_addr_t as Linux does. I needed to surround the define with #ifdef __KERNEL__ ... #endif to avoid build errors in tools building. (Host tools should not include <linux/types.h> in the first place, but this is already messy in U-Boot...) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* linux/compat.h: add dev_warn()Andreas Bießmann2016-06-12-0/+2
| | | | | | | | | In order to prevent build errors for copied code from linux introduce dev_warn(). Suggested-by: Scott Wood <oss@buserror.net> Signed-off-by: Andreas Bießmann <andreas@biessmann.org> Acked-by: Simon Glass <sjg@chromium.org>
* Remove unneeded remnants of bcopy().Robert P. J. Day2016-06-06-4/+0
| | | | | | | Since bcopy() is no longer used, delete all remaining references to it. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
* Merge git://git.denx.de/u-boot-nand-flashTom Rini2016-06-04-166/+73
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| * mtd: nand: Sync with Linux v4.6Scott Wood2016-06-03-31/+49
| | | | | | | | | | | | | | | | | | | | | | | | Updates the NAND code to match Linux v4.6. The previous sync was from Linux v4.1 in commit d3963721d93fafa. Note that none of the individual NAND drivers tracked Linux closely enough to be synced themselves, other than manually applying a few cross-tree changes. Signed-off-by: Scott Wood <oss@buserror.net> Tested-by: Heiko Schocher <hs@denx.de>
| * mtd: nand: Add page argument to write_page() etc.Scott Wood2016-06-03-3/+3
| | | | | | | | | | | | | | | | | | This change is part of the Linux 4.6 sync. It is being done before the main sync patch in order to make it easier to address the issue across all NAND drivers (many/most of which do not closely track their Linux counterparts) separately from other merge issues. Signed-off-by: Scott Wood <oss@buserror.net>
| * mtd: nand: Add+use mtd_to/from_nand and nand_get/set_controller_dataScott Wood2016-06-03-0/+20
| | | | | | | | | | | | | | | | | | These functions are part of the Linux 4.6 sync. They are being added before the main sync patch in order to make it easier to address the issue across all NAND drivers (many/most of which do not closely track their Linux counterparts) separately from other merge issues. Signed-off-by: Scott Wood <oss@buserror.net>
| * nand: Embed mtd_info in struct nand_chipScott Wood2016-06-03-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | nand_info[] is now an array of pointers, with the actual mtd_info instance embedded in struct nand_chip. This is in preparation for syncing the NAND code with Linux 4.6, which makes the same change to struct nand_chip. It's in a separate commit due to the large amount of changes required to accommodate the change to nand_info[]. Signed-off-by: Scott Wood <oss@buserror.net>
| * mtd: nand: Remove docg4 driver and palmtreo680 flashing toolScott Wood2016-06-03-132/+0
| | | | | | | | | | | | | | | | | | | | Commit ad4f54ea86b ("arm: Remove palmtreo680 board") removed the only user of the docg4 driver and the palmtreo680 image flashing tool. This patch removes them. Signed-off-by: Scott Wood <oss@buserror.net> Cc: Mike Dunn <mikedunn@newsguy.com> Cc: Simon Glass <sjg@chromium.org>
* | armv8: fsl-layerscape: Add support of QorIQ LS1012A SoCPrabhakar Kushwaha2016-06-03-1/+5
|/ | | | | | | | | | | | | | | | | | | | | The QorIQ LS1012A processor, optimized for battery-backed or USB-powered, integrates a single ARM Cortex-A53 core with a hardware packet forwarding engine and high-speed interfaces to deliver line-rate networking performance. This patch add support of LS1012A SoC along with - Update platform & DDR clock read logic as per SVR - Define MMDC controller register set. - Update LUT base address for PCIe - Avoid L3 platform cache compilation - Update USB address, errata - SerDes table - Added CSU IDs for SDHC2, SAI-1 to SAI-4 Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Makarand Pawagi <makarand.pawagi@mindspeed.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* drivers: usb: common: add common code for usb drivers to useMugunthan V N2016-05-17-0/+9
| | | | | | | Add common usb code which usb drivers makes use of it. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* Fix spelling of "occurred".Vagrant Cascadian2016-05-02-2/+2
| | | | | Signed-off-by: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* Change my mailaddressAndreas Bießmann2016-05-02-1/+1
| | | | | | I'll switch my mails to my own server, so drop all gmail references. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* lib/crc8: Add crc start valueStefan Roese2016-04-11-1/+2
| | | | | | | | | | | | | | | | | | To make the usage of this function more flexible, lets add the CRC start value as parameter to this function. This way it can be used by other functions requiring different start values than 0 as well. For non-zero CRC start values to work, I've reworked the function a bit. The new implementation is copied from the Linux version in drivers/i2c/i2c-core.c / i2c_smbus_pec(). Which supports non-zero CRC stating values. I've double-checked that the results for zero starting values are identical to the results from the original version of this function. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* armv8: LS2080A: Consolidate LS2080A and LS2085AYork Sun2016-04-06-1/+1
| | | | | | | | | | | | LS2080A is the primary SoC, and LS2085A is a personality with AIOP and DPAA DDR. The RDB and QDS boards support both personality. By detecting the SVR at runtime, a single image per board can support both SoCs. It gives users flexibility to swtich SoC without the need to reprogram the board. Signed-off-by: York Sun <york.sun@nxp.com> CC: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
* compiler*.h: sync include/linux/compiler*.h with Linux 4.5-rc6Tom Rini2016-02-29-235/+383
| | | | | | | | | | Copy these from Linux v4.5-rc6 tag. This is needed so that we can keep up with newer gcc versions. Note that we don't have the uapi/ hierarchy from the kernel so continue to use <linux/types.h> Signed-off-by: Tom Rini <trini@konsulko.com>
* Use correct spelling of "U-Boot"Bin Meng2016-02-06-3/+3
| | | | | | | | | | Correct spelling of "U-Boot" shall be used in all written text (documentation, comments in source files etc.). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
* bug.h: move BUILD_BUG_* defines to include/linux/bug.hMasahiro Yamada2016-01-25-0/+55
| | | | | | | | | | | | | | | | BUILD_BUG_* macros have been defined in several headers. It would be nice to collect them in include/linux/bug.h like Linux. This commit is cherry-picking useful macros from include/linux/bug.h of Linux 4.4. I did not import BUILD_BUG_ON_MSG() because it would not work if it is used with include/common.h in U-Boot. I'd like to postpone it until the root cause (the "error()" macro in include/common.h causes the name conflict with "__attribute__((error()))") is fixed. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* armv8: Add psci.h from the Linux kernelSergey Temerkhanov2016-01-19-0/+90
| | | | | | | | | This commit adds the psci.h header file from Linux kernel which contains definitions related to the PSCI interface provided by firmware Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com> Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com>
* Add more SPDX-License-Identifier tagsTom Rini2016-01-19-24/+3
| | | | | | | | | In a number of places we had wordings of the GPL (or LGPL in a few cases) license text that were split in such a way that it wasn't caught previously. Convert all of these to the correct SPDX-License-Identifier tag. Signed-off-by: Tom Rini <trini@konsulko.com>
* Revert "include/linux: move typdef for uintptr_t"York Sun2015-12-16-1/+0
| | | | | | | | This reverts commit e8f954a756a825130d11b9c8fca70101dd8b3ac5, which causes compiling errors on 32-bit hosts. Acked-by: Aneesh Bansal <aneesh.bansal@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
* include/linux: move typdef for uintptr_tAneesh Bansal2015-12-15-0/+1
| | | | | | | | | | | | | uintptr_t which is a typdef for unsigned long is needed for creating pointers (32 or 64 bit depending on Core) from 32 bit variables storing the address. If a 32 bit variable (u32) is typecasted to a pointer (void *), compiler gives a warning in case size of pointer on the core is 64 bit. The typdef has been moved from include/compiler.h to include/linux/types.h Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* usb: xhci: zynqmp: Removing unused function usb_phy_resetMarek Vasut2015-12-07-1/+0
| | | | | | | This patch removes unsued function usb_phy_reset, rather common function dwc3_phy_reset is used. Signed-off-by: Marek Vasut <marex@denx.de>
* armv8/ls1043ardb: add USB supportGong Qianyu2015-11-30-1/+8
| | | | | | | Add support for the third USB controller for LS1043A. Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* armv8: ls2085a: Add support of LS2085A SoCPrabhakar Kushwaha2015-11-30-1/+1
| | | | | | | | | | | | | Freescale's LS2085A is a another personality of LS2080A SoC with support of AIOP and DP-DDR. This Patch adds support of LS2085A Personality. Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> [York Sun: Updated MAINTAINERS files Dropped #ifdef in cpu.h Add CONFIG_SYS_NS16550=y in defconfig] Reviewed-by: York Sun <yorksun@freescale.com>
* armv8: LS2080A: Rename LS2085A to reflect LS2080APrabhakar Kushwaha2015-11-30-3/+3
| | | | | | | | | | | LS2080A is a prime personality of Freescale’s LS2085A. It is a non-AIOP personality without support of DP-DDR, L2 switch, 1588, PCIe endpoint etc. So renaming existing LS2085A code base to reflect LS2080A (Prime personality) Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> [York Sun: Dropped #ifdef in cpu.c for cpu_type_list] Reviewed-by: York Sun <yorksun@freescale.com>
generated by cgit v1.1 at 2024-11-06 05:19:33 +0000