summaryrefslogtreecommitdiff
path: root/include/fsl_ddr.h
Commit message (Collapse)AuthorAgeLines
* arm/ls1021a: Add workaround for DDR erratum A008378York Sun2015-01-23-0/+6
| | | | | | | Internal memory controller counters can reach a bad state after training in DDR4 mode if accumulated ECC or DBI mode is eanbled. Signed-off-by: York Sun <yorksun@freescale.com>
* driver/ddr: Restruct driver to allow standalone memory spaceYork Sun2014-09-25-2/+13
| | | | | | | | | | U-boot has been initializing DDR for the main memory. The presumption is the memory stays as a big continuous block, either linear or interleaved. This change is to support putting some DDR controllers to separated space without counting into main memory. The standalone memory controller could use different number of DIMM slots. Signed-off-by: York Sun <yorksun@freescale.com>
* driver/ddr/fsl: Add DDR4 support to Freescale DDR driverYork Sun2014-04-22-1/+6
| | | | | | | Mostly reusing DDR3 driver, this patch adds DDR4 SPD handling, register calculation and programming. Signed-off-by: York Sun <yorksun@freescale.com>
* driver/ddr: Change Freescale ARM DDR driver to support both big and little ↵York Sun2014-02-21-0/+9
| | | | | | | | | endian Initially it was believed the DDR controller on Freescale ARM would have big endian. But some platform will have little endian. Signed-off-by: York Sun <yorksun@freescale.com>
* Driver/DDR: Moving Freescale DDR driver to a common driverYork Sun2013-11-25-0/+105
Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs. The similar DDR controllers will be used for ARM-based SoCs. Signed-off-by: York Sun <yorksun@freescale.com>