summaryrefslogtreecommitdiff
path: root/include/fpga.h
Commit message (Collapse)AuthorAgeLines
* fpga: Export fpga_get_desc for SPLMichal Simek2015-01-21-0/+1
| | | | | | | SPL needs to detect FPGA device which will be used for loading bitstream. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* fpga: Remove extern prototypes from .hMichal Simek2015-01-21-13/+13
| | | | | | | | This problem is reported by checkpatch.pl Warnings: CHECK: extern prototypes should be avoided in .h files Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* fpga: Added support to load bit stream from SD/MMCSiva Durga Prasad Paladugu2014-05-20-0/+9
| | | | | | | | | | | | Added support to load a bitstream image in chunks by reading it in chunks from SD/MMC. Command format: loadfs [dev] [address] [image size] [blocksize] <interface> [<dev[:part]>] <filename> Example: fpga loadfs 0 1000000 3dbafc 4000 mmc 0 fpga.bin Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* fpga: Add support to load partial bitstreamsMichal Simek2014-05-20-0/+1
| | | | | | | | | | | | | Added support to load partial bitstreams. The partial bitstreams can be loaded using the below commands Commands: fpga loadp <dev> <addr> <size> fpga loadbp <dev> <addr> <size> The full bit streams can be loaded using the old commands(fpga load and fpga loadb). Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* fpga: Define bitstream type based on command selectionMichal Simek2014-05-20-2/+8
| | | | | | | | | | Clean up partial, full and compressed bitstream handling. U-Boot supports full bitstream loading and partial based on detection which is not 100% correct. Extending fpga_load/fpga_loadbitstream() with one more argument which stores bitstream type. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-18/+1
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* fpga: Remove all CONFIG_SYS_* fpga related optionsMichal Simek2013-05-06-10/+0
| | | | | | | | All these macros are completely unused by any code. CONFIG_FPGA is not a bitfield anymore. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
* fpga: Check device name against bitstream nameMichal Simek2013-05-06-0/+2
| | | | | | | | Ensure that wrong bitstream won't be loaded to current device. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
* fpga: Change the first parameter in fpga_loadbitstreamMichal Simek2013-05-06-1/+1
| | | | | | | | | All fpga functions use devnum as int. Only fpga_loadbitstream is using it as unsinged long dev. This patch synchronize it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
* cmd: fpga: Move fpga_loadbitstream to fpga.cMichal Simek2013-05-06-0/+1
| | | | | | | | | In bitstream decoding you can directly check device which you want to load and in fpga.c are fpga_validate and fpga_dev_info functions which should be used for it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
* Consolidate bool typeYork Sun2013-04-01-8/+0
| | | | | | | | | | | | | 'bool' is defined in random places. This patch consolidates them into a single header file include/linux/types.h, using stdbool.h introduced in C99. All other #define, typedef and enum are removed. They are all consistent with true = 1, false = 0. Replace FALSE, False with false. Replace TRUE, True with true. Skip *.py, *.php, lib/* files. Signed-off-by: York Sun <yorksun@freescale.com>
* fpga: constify to fix build warningWolfgang Denk2011-08-01-6/+6
| | | | | | | | | | | | | | | Fix compiler warning: cmd_fpga.c:318: warning: passing argument 3 of 'fit_image_get_data' from incompatible pointer type Adding the needed 'const' here entails a whole bunch of additonal changes all over the FPGA code. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Andre Schwarz <andre.schwarz@matrix-vision.de> Cc: Murray Jensen <Murray.Jensen@csiro.au> Acked-by: Andre Schwarz<andre.schwarz@matrix-vision.de>
* FPGA: add support for downloading Lattice bitstreamStefano Babic2010-10-13-0/+1
| | | | | | | | | | | | | | The patch adds support to load a Lattice's bitstream image (called VME file) into a Lattice FPGA. The code containing the state machine delivered as part of Lattice's ispVMtools is integrated. The FPGA is programmed using the JTAG interface. The board maintainer must provide accessors to drive the JTAG signals TCK, TMS, TDI and to get the value of the input signal TDO. Signed-off-by: Stefano Babic <sbabic@denx.de>
* fpga: Remove relocation fixupsPeter Tyser2009-10-03-1/+1
| | | | | | | | PPC boards are the only users of the current FPGA code which is littered with manual relocation fixups. Now that proper relocation is supported for PPC boards, remove FPGA manual relocation. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-18-5/+5
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* Big white-space cleanup.Wolfgang Denk2008-05-21-21/+21
| | | | | | | | | | | This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de>
* Cleanup for GCC-4.xWolfgang Denk2005-10-13-1/+1
|
* Initial revisionwdenk2002-08-21-0/+81
generated by cgit v1.1 at 2024-11-05 11:24:46 +0000