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* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-07-12-0/+3
|\ | | | | | | | | | | | | | | | | | | Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
| * ARM: Tegra: USB: EHCI: Add support for Tegra30/Tegra114Jim Lin2013-07-11-0/+2
| | | | | | | | | | | | | | | | | | | | Tegra30 and Tegra114 are compatible except PLL parameters. Tested on Tegra30 Cardhu, and Tegra114 Dalmore platforms. All works well. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * EXYNOS5: FDT: Add compatible strings for SerialRajeshwari Shinde2013-06-24-0/+1
| | | | | | | | | | | | | | | | Add required compatible information for s5p serial driver Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | cros: adds cros_ec keyboard driverHung-ying Tyan2013-06-26-0/+1
| | | | | | | | | | | | | | | | | | | | This patch adds the driver for keyboard that's controlled by ChromeOS EC. Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
* | cros: add cros_ec driverHung-ying Tyan2013-06-26-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the cros_ec driver that implements the protocol for communicating with Google's ChromeOS embedded controller. Signed-off-by: Bernie Thompson <bhthompson@chromium.org> Signed-off-by: Bill Richardson <wfrichar@chromium.org> Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-06-22-0/+1
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| * FDT: Add compatible string for DWMMCAmar2013-06-13-0/+1
| | | | | | | | | | | | | | | | | | Add required compatible information for DWMMC driver. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | tpm: Add support for new Infineon I2C TPM (SLB 9645 TT 1.2 I2C)Vincent Palatin2013-06-03-0/+1
|/ | | | | | | | | | | | | | | | | | Add support for Infineon's new SLB 9645 TT 1.2 I2C TPMs, which supports clockstretching, combined reads and a bus speed of up to 400khz. The device also has a new device id. This is based on the kernel patch provided by Infineon : https://gerrit.chromium.org/gerrit/42332 Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Luigi Semenzato <semenzato@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Tom Wai-Hong Tam <waihong@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-04-15-0/+2
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| * Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'Albert ARIBAUD2013-04-04-0/+2
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| | * EXYNOS5: FDT: Add compatible strings for FIMDAjay Kumar2013-03-27-0/+1
| | | | | | | | | | | | | | | | | | | | | Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * EXYNOS: FDT: Add compatible strings for FIMDAjay Kumar2013-03-27-0/+1
| | | | | | | | | | | | | | | | | | | | | Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | tpm: Add Infineon slb9635_i2c TPM driverRong Chang2013-04-12-0/+1
|/ / | | | | | | | | | | | | | | | | Add a driver for the I2C TPM from Infineon. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* | Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2013-03-28-0/+3
|\ \ | |/ | | | | | | | | | | Conflicts: drivers/spi/tegra20_sflash.c include/fdtdec.h lib/fdtdec.c
| * Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'Albert ARIBAUD2013-03-26-0/+1
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| | * tegra114: fdt: add compatible string for tegra114 SPI ctrlAllen Martin2013-03-25-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Add "nvidia,tegra114-spi" to represent t114 SPI controller hardware. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| * | Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'Albert ARIBAUD2013-03-26-0/+2
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| | * Exynos5: FDT: Add TMU device node valuesAkshay Saraswat2013-03-12-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Fdt entry for Exynos TMU driver specific pre-defined values used for calibration of current temperature and defining threshold values. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * EXYNOS5: FDT: Add compatible strings for MAX98095Rajeshwari Shinde2013-03-08-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Add required compatible information for MAX98095 codec Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | sf: Enable FDT-based configuration and memory mappingSimon Glass2013-03-19-0/+1
| | | | | | | | | | | | | | | | | | | | | Enable device tree control of SPI flash, and use this to implement memory-mapped SPI flash, which is supported on Intel chips. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | fdt: Add fdtdec_get_addr_size() to read reg propertiesSimon Glass2013-03-19-0/+15
|/ / | | | | | | | | | | | | | | It is common to have a "reg = <address size>" property in the FDT. Add a function to handle this, similar to the existing fdtdec_get_addr(); Signed-off-by: Simon Glass <sjg@chromium.org>
* | Tegra30: mmc: Add Tegra30 SDMMC compatible entry to fdtdec & driverTom Warren2013-03-14-1/+2
| | | | | | | | | | | | | | | | | | Tegra30 SD/MMC controller differs enough from Tegra20 that it needs its own entry in the compat_names/compat_id tables and in the Tegra MMC driver. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* | Tegra: MMC: Add DT support to MMC driver for all T20 boardsTom Warren2013-03-14-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc. Tested on Seaboard, fully functional. Tamonten boards (medcom-wide, plutux, and tec) use a different/new dtsi file w/common settings. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* | Tegra: I2C: Add T114 clock support to tegra_i2c driverTom Warren2013-03-14-0/+1
|/ | | | | | | | | | | | | T114 has a slightly different I2C clock, with a new (extra) divisor in standard/fast mode and HS mode. Tested on my Dalmore, and the I2C clock is 100KHz +/- 3Hz on my Saleae Logic analyzer. Added a new entry in compat_names for T114 I2C since it differs from the previous Tegra SoCs. A flag is set when T114 I2C HW is found so new features like the extra clock divisor can be used. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
* tegra: add SPI SLINK driverAllen Martin2013-02-11-0/+1
| | | | | | | | | | | | | | | | | | | | | | Add driver for tegra SPI "SLINK" style driver. This controller is similar to the tegra20 SPI "SFLASH" controller. The difference is that the SLINK controller is a genernal purpose SPI controller and the SFLASH controller is special purpose and can only talk to FLASH devices. In addition there are potentially many instances of an SLINK controller on tegra and only a single instance of SFLASH. Tegra20 is currently ths only version of tegra that instantiates an SFLASH controller. This driver supports basic PIO mode of operation and is configurable (CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4 devices per controller may be attached, although typically only a single chip select line is exposed from tegra per controller so in reality this is usually limited to 1. To enable this driver, use CONFIG_TEGRA_SLINK Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: spi: add fdt support to tegra SPI SFLASH driverAllen Martin2013-02-11-0/+1
| | | | | | | | | Add support for configuring tegra SPI driver from devicetree. Support is keyed off CONFIG_OF_CONTROL. Add entry in seaboard dts file for spi controller to describe seaboard spi. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* EXYNOS5: FDT: Add compatible strings for PMICRajeshwari Shinde2013-01-10-0/+1
| | | | | | | | Add required compatible information for PMIC Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* EXYNOS5: FDT: Add compatible strings for USBRajeshwari Shinde2013-01-08-0/+2
| | | | | | | | Add required compatible information for USB Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* EXYNOS5: FDT: Add compatible strings for SPIRajeshwari Shinde2013-01-08-0/+1
| | | | | | | | Add required compatible information for SPI driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* EXYNOS5: FDT: Add compatible strings for soundRajeshwari Shinde2013-01-08-0/+2
| | | | | | | | Add required compatible information for sound driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* FDT: Add compatible string for I2CRajeshwari Shinde2013-01-08-0/+1
| | | | | | | | | Add required compatible information for I2C driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* fdt: exynos5: Add DT node definition for SROM and SMSC9215Hatim RV2012-12-26-0/+2
| | | | | | | | | Add the compatibility string and constant for the ethernet driver so the device tree parsing code can recognize it. Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* Merge branch 'master' of git://git.denx.de/u-boot into resolveMinkyu Kang2012-12-10-0/+112
|\ | | | | | | | | | | | | | | | | | | | | Conflicts: README board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
| * fdt: Add polarity-aware gpio functions to fdtdecSean Paul2012-11-12-0/+16
| | | | | | | | | | | | | | | | Add get and set gpio functions to fdtdec that take into account the polarity field in fdtdec_gpio_state.flags. Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * fdt: Add fdtdec_get_uint64 to decode a 64-bit value from a propertyChe-Liang Chiou2012-11-12-0/+15
| | | | | | | | | | | | | | | | It decodes a 64-bit value from a property that is at least 8 bytes long. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * fdt: Add function to read boolean propertyGabe Black2012-11-12-0/+10
| | | | | | | | | | | | | | | | Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * fdt: Export fdtdec_lookup() and fix the nameGerald Van Baren2012-11-12-0/+13
| | | | | | | | | | | | | | The name of this function is not consistent, so fix it, and export the function for external use. Signed-off-by: Simon Glass <sjg@chromium.org>
| * fdt: Add function for decoding multiple gpios globally availableAbhilash Kesavan2012-11-12-0/+16
| | | | | | | | | | | | | | | | | | | | Samsung's SDHCI bindings require multiple gpios to be parsed and configured at a time. Export the already available fdtdec_decode_gpios for this purpose. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Commit-Ready: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * fdt: Add fdtdec_decode_region() to decode memory regionSimon Glass2012-11-12-0/+19
| | | | | | | | | | | | | | | | A memory region has a start and a size and is often specified in a node by a 'reg' property. Add a function to decode this information from the fdt. Signed-off-by: Simon Glass <sjg@chromium.org>
| * fdt: Add function to get a config string from device treeSimon Glass2012-11-12-0/+10
| | | | | | | | | | | | | | Add a function to look up a configuration string such as board name and returns its value. We look in the "/config" node for this. Signed-off-by: Simon Glass <sjg@chromium.org>
| * fdt: Add function to get config int from device treeAbhilash Kesavan2012-11-12-0/+13
| | | | | | | | | | | | | | | | | | | | | | Add a function to look up a configuration item such as machine id and return its value. Note: The code has been taken as is from the Chromium u-boot development tree and needs Simon Glass' sign-off. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Simon Glass <sjg@chromium.org>
* | tegra: Add SOC support for display/lcdWei Ni2012-11-19-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the LCD peripheral at the Tegra2 SOC level. A separate LCD driver will use this functionality to configure the display. Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Mayuresh Kulkarni: - changes to remove bitfields and clean up for submission Signed-off-by: Simon Glass <sjg@chromium.org> Simon Glass: - simplify code, move clock control into here, clean-up Signed-off-by: Tom Warren <twarren@nvidia.com>
* | tegra: Add support for PWMSimon Glass2012-11-19-0/+1
|/ | | | | | | | The pulse width/frequency modulation peripheral supports generating a repeating pulse. It is useful for controlling LCD brightness. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-stagingTom Rini2012-09-21-0/+3
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| * fdt: Add header guard to fdtdec.hSimon Glass2012-09-21-0/+3
| | | | | | | | | | | | | | This makes it easier to include this header from other headers. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org>
* | tegra: nand: Add Tegra NAND driverJim Lin2012-09-07-0/+1
|/ | | | | | | | | | | | A device tree is used to configure the NAND, including memory timings and block/pages sizes. If this node is not present or is disabled, then NAND will not be initialized. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra20: rename tegra2 -> tegra20Allen Martin2012-09-01-6/+6
| | | | | | | | | | This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Add tegra keyboard driverRakesh Iyer2012-05-15-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | Add support for internal matrix keyboard controller for Nvidia Tegra platforms. This driver uses the fdt decode function to obtain its key codes. Support for the Ctrl modifier is provided. The left and right ctrl keys are dealt with in the same way. This uses the new keyboard input library (drivers/input/input.c) to decode keys and handle most of the common input logic. The new key matrix library is also used to decode (row, column) key positions into key codes. The intent is to make this driver purely about dealing with the hardware. Key detection before the driver is loaded is supported. This key will be picked up when the keyboard driver is initialized. Modified by Bernie Thompson <bhthompson@chromium.org> and Simon Glass <sjg@chromium.org> for device tree, input layer, key matrix and various other things. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* fdt: Add fdtdec functions to read byte arrayAnton Staff2012-05-15-0/+32
| | | | | | | | | Sometimes we don't need a full cell for each value. This provides a simple function to read a byte array, both with and without copying it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Add EMC support for optimal memory timingsJimmy Zhang2012-05-15-0/+2
| | | | | | | | Add support for setting up the memory controller parameters. Boards can set up an appropriate table in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
generated by cgit v1.1 at 2024-11-06 00:40:38 +0000