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* mmc: Support bypass mode with the get_mmc_clk() methodSimon Glass2015-09-02-1/+15
| | | | | | | | | Some SoCs want to adjust the input clock to the DWMMC block as a way of controlling the MMC bus clock. Update the get_mmc_clk() method to support this. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
* mmc: Add structure comments for dwmmcSimon Glass2015-07-21-1/+17
| | | | | | | It took a little while to figure this out, so this patch adds documentation to help the next person who needs to do this. Signed-off-by: Simon Glass <sjg@chromium.org>
* mmc: exynos_dw_mmc: use the exynos specific data structureJaehoon Chung2015-02-23-1/+1
| | | | | | | | Clksel value is exynos specific value. It removed "clksel_val" into dwmci_host and created the "dwmci_exynos_priv_data" structure for exynos specific data. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
* mmc: dw_mmc: Fix cache alignment issueMarek Vasut2014-10-06-1/+1
| | | | | | | | | | | | | | | | | | | | | | | The DMA descriptors used by the DW MMC block must be aligned to cacheline size, otherwise we are unable to properly flush/inval cache over them and we get data corruption. The reason I chose this approach of expanding the structure is because the driver allocates the descriptors in bulk. This approach does waste space by inserting slop inbetween the descriptors, but it makes access to the descriptors easy as the compiler does know the real size of the structure. It also makes cache operations easy, since the size of the structure is cache aligned and the structure start address is as well. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Acked-by: Pavel Machek <pavel@denx.de>
* mmc: dw_mmc: support the DDR modeJaehoon Chung2014-05-16-0/+3
| | | | | | | | | Support the DDR mode at dw-mmc controller Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* mmc: exynos_dw_mmc: restore the property into hostJaehoon Chung2014-05-16-0/+2
| | | | | | | | | | Restore the platdata(property of dt) into host struct. Then data's information is maintained and reused anywhere. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* mmc: Split mmc struct, rework mmc initialization (v2)Pantelis Antoniou2014-03-24-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The way that struct mmc was implemented was a bit of a mess; configuration and internal state all jumbled up in a single structure. On top of that the way initialization is done with mmc_register leads to a lot of duplicated code in drivers. Typically the initialization got something like this in every driver. struct mmc *mmc = malloc(sizeof(struct mmc)); memset(mmc, 0, sizeof(struct mmc); /* fill in fields of mmc struct */ /* store private data pointer */ mmc_register(mmc); By using the new mmc_create call one just passes an mmc config struct and an optional private data pointer like this: struct mmc = mmc_create(&cfg, priv); All in tree drivers have been updated to the new form, and expect mmc_register to go away before long. Changes since v1: * Use calloc instead of manually calling memset. * Mark mmc_register as deprecated. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
* MMC: DWMMC: Correct the CLKDIV register valueRajeshwari S Shinde2014-02-07-1/+1
| | | | | | | | | | | | | | | | | | This patch corrects the divider value written to CLKDIV register. Since SDCLKIN is divided inside controller by the DIVRATIO value set in the CLKSEL register, we need to use the same output clock value to calculate the CLKDIV value. as per user manual: cclk_in = SDCLKIN / (DIVRATIO + 1) Input parameter to mmc_clk is changed to dwmci_host, since we need the same to read DWMCI_CLKSEL register. This improves the read timing values for channel 0 on SMDK5250 from 0.288sec to 0.144sec Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
* mmc: dw_mmc: remove the exynos specific code in dw-mmc.cJaehoon Chung2013-12-08-0/+1
| | | | | | | | | | | dw-mmc.c is the general driver file. So, remove the exynos specific code at dw-mmc.c. Instead, exynos specific cod can be move into exynos-dw_mmc.c. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Acked-by: Minkyu Kang <mk7.kang@samsung.com>
* DWMMC: SMDK5420: Disable SMU for eMMCRajeshwari Shinde2013-10-31-0/+3
| | | | | | | | | | | | SMDK5420 has a new Security Management Unit added for dwmmc driver, hence, configuring the control registers to support booting via eMMC. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
* mmc: dw_mmc: change the callback function name.Jaehoon Chung2013-10-31-1/+1
| | | | | | | | To prevent the confusion, use the get_mmc_clk() instead of mmc_clk(). get_mmc_clk() is more exactly name. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-14/+1
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* EXYNOS5: DWMMC: Added FDT support for DWMMCAmar2013-06-13-0/+3
| | | | | | | | | | | This patch adds FDT support for DWMMC, by reading the DWMMC node data from the device tree and initialising DWMMC channels as per data obtained from the node. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* mmc: dw-mmc: support DesignWare MMC ControllerJaehoon Chung2012-10-22-0/+191
Support the DesginWare MMC Controller. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Rajeshawari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Andy Fleming <afleming@freescale.com>