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* aspeed: Add basic ast2500-specific drivers and configurationmaxims@google.com2017-01-28-0/+29
| | | | | | | | | | | | | | | | | | | | | Clock Driver This driver is ast2500-specific and is not compatible with earlier versions of this chip. The differences are not that big, but they are in somewhat random places, so making it compatible with ast2400 is not worth the effort at the moment. SDRAM MC driver The driver is very ast2500-specific and is completely incompatible with previous versions of the chip. The memory controller is very poorly documented by Aspeed in the datasheet, with any mention of the whole range of registers missing. The initialization procedure has been basically taken from Aspeed SDK, where it is implemented in assembly. Here it is rewritten in C, with very limited understanding of what exactly it is doing. Reviewed-by: Simon Glass <sjg@chromium.org>
* arm: dts: Add devicetree for i.MX6ULJagan Teki2016-12-16-0/+1
| | | | | | | | | | | | | Add i.MX6UL dtsi support from Linux. Here is the last commit: "ARM: dts: add gpio-ranges property to iMX GPIO controllers" (sha1: bb728d662bed0fe91b152550e640cb3f6caa972c) Cc: Stefano Babic <sbabic@denx.de> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
* arm: imx: add i.MX53 Beckhoff CX9020 Embedded PCPatrick Bruenn2016-12-16-0/+219
| | | | | | | | | | | | | | | | Add CX9020 board based on mx53loco. Add simplified imx53 base device tree from kernel v4.8-rc8, to reuse serial_mxc with DTE and prepare for device tree migration of other functions and imx53 devices. The CX9020 differs from i.MX53 Quick Start Board by: - use uart2 instead of uart1 - DVI-D connector instead of VGA - no audio - CCAT FPGA connected to emi - enable rtc Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
* arm: dts: add i.MX6SLL device treePeng Fan2016-12-16-0/+204
| | | | | | | Add i.MX6SLL device tree. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* fdt: add dt-bindings for bcm2835Fabian Vogt2016-11-28-0/+83
| | | | | | | | | This patch adds dt-bindings as used by the linux kernel device trees for the bcm283x family. Albert Aribaud <albert.u.boot@aribaud.net> Signed-off-by: Fabian Vogt <fvogt@suse.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* dt-bindings: clock: imx6qdl: Add clock definesJagan Teki2016-10-26-0/+274
| | | | | | | | | | | | | | Add imx6qdl clock header defines support from Linux. "clk: imx: Add clock support for imx6qp" (sha1: ee36027427c769b0b9e5e205fe43aced93d6aa66) Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
* dt-bindings: add i.mx6ul clock headerPeng Fan2016-10-04-0/+253
| | | | | | | | | Add i.mx6ul clock header, copied from kernel commit (29b4817d401). i.MX6ULL reuse the file in Linux Kernel, so let's keep the same. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefano Babic <sbabic@denx.de>
* ARM: tegra: pull Tegra210 SoC DT from Linux v4.7Stephen Warren2016-09-27-172/+231
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The primary benefit of this change is that it adds all missing clocks and resets properties to peripherals. This will allow peripheral drivers to migrate to the standard clock and reset APIs in the future. Main changes: * Brought in the correct Tegra210 CAR binding; the old file in U-Boot appears to be a renamed version of the Tegra124 bindings rather than the real Tegra210 version. * Conversion of SPI and UART nodes to standard DMA bindings. U-Boot doesn't use DMA so isn't affected. * Split of EHCI and USB PHY nodes. The EHCI nodes continue to contain all information required by U-Boot, so U-Boot is not affected. * Conversion of many magic numbers to named defines. * Addition of many nodes not used by U-Boot, including separation of the Tegra LIC (Legacy IRQ controller) and GIC. * Node sort order fixes. Remaining deltas relative to the Linux DT: * U-Boot has enabled PCIe for Tegra210, but the kernel hasn't yet. * The GPIO node compatible value in the kernel explicitly includes Tegra124 values whereas U-Boot does not. I'll send a kernel patch to correct this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: pull Tegra114 SoC DT from Linux v4.7Stephen Warren2016-09-27-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | The primary benefit of this change is that it adds all missing clocks and resets properties to peripherals. This will allow peripheral drivers to migrate to the standard clock and reset APIs in the future. Main changes: * Conversion of SPI nodes to standard DMA bindings. U-Boot doesn't use DMA so isn't affected. * Split of EHCI and USB PHY nodes. The EHCI nodes continue to contain all information required by U-Boot, so U-Boot is not affected. * Boards need to define the clk32k_in clock that feeds the Tegra PMC. * Addition of tegra114-mc.h since tegra114.dtsi now includes it. * Conversion of many magic numbers to named defines. * Addition of many nodes not used by U-Boot. * Node sort order fixes. Remaining deltas relative to the Linux DT: * USB node compatible values in U-Boot explicitly list Tegra114 values whereas the kernel does not. I'll send a kernel patch to correct this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: pull Tegra30 SoC DT from Linux v4.7Stephen Warren2016-09-27-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The primary benefit of this change is that it adds all missing clocks and resets properties to peripherals. This will allow peripheral drivers to migrate to the standard clock and reset APIs in the future. Main changes: * Modification of PCIe memory region addresses. The HW memory layout is programmable, so this should work fine, and Beaver PCIe was tested without issue. * Removal of pcie_xclk from the PCIe node and clock binding header. This clock doesn't exist and isn't used; only a reset with this ID exists. * Conversion of SPI nodes to standard DMA bindings. U-Boot doesn't use DMA so isn't affected. * Split of EHCI and USB PHY nodes. The EHCI nodes continue to contain all information required by U-Boot, so U-Boot is not affected. * Changed the phy_type value for the second USB port. This required board DTs to be updated to keep the same configuration. * Boards need to define the clk32k_in clock that feeds the Tegra PMC. * Addition of tegra30-mc.h since tegra30.dtsi now includes it. * Conversion of many magic numbers to named defines. * Addition of many nodes not used by U-Boot. * Node sort order fixes. Remaining deltas relative to the Linux DT: * None. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: pull Tegra20 SoC DT from Linux v4.7Stephen Warren2016-09-27-2/+2
| | | | | | | | | | | | | This brings in a few minor fixes since the last sync. The largest change is the removal of the definition for TEGRA20_CLK_PCIE_XCLK. This clock doesn't actually exist. Remaining deltas: * Addition of u-boot,dm-pre-reloc property to a couple of nodes. * Addition of the NAND controller, which Linux doesn't yet support. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* clk: boston: Providea simple driver for Boston board clocksPaul Burton2016-09-21-0/+13
| | | | | | | | | | Add a simple driver for the clocks provided by the MIPS Boston development board. The system provides information about 2 clocks whose rates are fixed by the bitfile flashed in the boards FPGA, and this driver simply reads the rates of these 2 clocks. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* sunxi: Sync dts files with upstream kernelHans de Goede2016-08-26-0/+145
| | | | | | | | | | | | | Sync dts files with the current (Aug 18th 2016) state of Maxime's linux/sunxi/for-next repo. Note this commit also updates configs/MSI_Primo81_defconfig, adding: "# CONFIG_REQUIRE_SERIAL_CONSOLE is not set", this is necessary because the tablet does not have a reachable uart so the dts sync drops its serial0 alias. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* ARM: tegra: add BPMP DT bindingsStephen Warren2016-08-04-0/+940
| | | | | | | | | | | The Tegra BPMP (Boot and Power Management Processor) is a separate auxiliary CPU embedded into Tegra to perform power management work, and controls related features such as clocks, resets, power domains, PMIC I2C bus, etc. These bindings dictate how to represent the BPMP in device tree. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* dts: add support for Rockchip rk3399 socKever Yang2016-07-25-0/+746
| | | | | | | | | | | These files are from kernel upstream: "649a371 Add linux-next specific files for 20160616" with some modification need by U-Boot: - chosen with stdout-path to uart2. - add clock-frequency for uart2 Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* arm: at91: dts: Bring in device tree file for AT91SAM9G45Simon Glass2016-06-12-0/+23
| | | | | | | | | | Add this file from Linux v4.5. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Tested-on: smartweb, corvus, taurus, axm Tested-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
* dts: Add clock and regulator binding files for max77802Simon Glass2016-05-25-0/+22
| | | | | | | | These are used by peach_pit and peach_pi. Add them so they can be referenced in the device tree files. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* clk: exynos: add clock driver for Exynos7420 SocThomas Abraham2016-05-25-0/+207
| | | | | | | | | | | | Add a clock driver for Exynos7420 SoC. There are about 25 clock controller blocks in Exynos7420 out of which support for topc, top0 and peric1 blocks are added in this initial version of the driver. Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* ARM: hisilicon: hikey: Add hikey & hi6220 dts from v4.6-rc3.Peter Griffin2016-04-25-0/+173
| | | | | | | | | Import the upstream kernel dts into U-Boot. Currently only serial is supported, but a lot more DT changes are queued for v4.7. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* include/dt-bindings: Sync some files with the kernelHans de Goede2016-03-23-0/+53
| | | | | | | | | | This commit syncs the dt-bindings/input/* headers with the kernel (v4.5) and adds dt-bindings/clock/sun4i-a10-pll2.h, both are necessary for newer sunxi dts files to build. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* tegra: dts: Sync up the tegra124 device tree files with LinuxSimon Glass2016-02-16-332/+354
| | | | | | | Sync up these files with Linux v4.4. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* drivers: clk: Add clock driver for Microchip PIC32 Microcontroller.Purna Chandra Mandal2016-02-01-0/+29
| | | | | | | | | | PIC32 clock module consists of multiple oscillators, PLLs, mutiplexers and dividers capable of supplying clock to various controllers on or off-chip. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* rockchip: Bring in RK3036 device tree file includes and bindingshuang lin2015-12-01-0/+186
| | | | | | | | | Since rk3036 device tree file still in reviewing, bring it from https://patchwork.kernel.org/patch/7203371/ and add some aliases we need in uboot Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* rockchip: Bring in RK3288 device tree file includes and bindingsSimon Glass2015-09-02-0/+381
| | | | | | | | Bring in required device tree files from Linux. Since mainline Linux is somewhat behind, use the files from the Chromium tree. We can re-sync once further code is acccepted upstream. Signed-off-by: Simon Glass <sjg@chromium.org>
* ARM: Tegra210: Add SoC code/include files for T210Tom Warren2015-07-28-0/+342
| | | | | | | | | | | All based off of Tegra124. As a Tegra210 board is brought up, these may change a bit to match the HW more closely, but probably 90% of this is identical to T124. Note that since T210 is a 64-bit build, it has no SPL component, and hence no cpu.c for Tegra210. Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: Add Tegra30 PCIe device tree nodeThierry Reding2014-12-18-1/+1
| | | | | | | | Add the device tree node for the PCIe controller found on Tegra30 SoCs. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: Add Tegra20 PCIe device tree nodeThierry Reding2014-12-18-1/+1
| | | | | | | | | Add the device tree node for the PCIe controller found on Tegra20 SoCs. Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: dts: Add serial port detailsSimon Glass2014-09-10-0/+1115
Some Tegra device tree files do not include information about the serial ports. Add this and also add information about the input clock speed. The console alias needs to be set up to indicate which port is used for the console. Also add a binding file since this is missing. Series-changes; 5 - Add full serial port nodes from Linux tree (commit fc9d4dbe) - Use /chosen/stdout-path instead of /aliases/console to specify the console Signed-off-by: Simon Glass <sjg@chromium.org>
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