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* | Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2010-07-24-14/+23
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| * | ppc4xx: Enable "ecctest" command on t3corpStefan Roese2010-07-23-0/+1
| | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| * | ppc4xx: Enable "ecctest" command on katmaiStefan Roese2010-07-23-0/+1
| | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| * | ppc4xx: T3CORP fixes and updatesStefan Roese2010-07-23-14/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes some problems for the T3CORP board. Here the list of the changes: - Add 600-67 and 677 CPU frequency setting to chip_config command - Define CONFIG_DDR_RFDC_FIXED on t3corp: While using the "normal" auto calibration code, sometimes values for RFDC were picked (>= T3) that resulted in a non-working U-Boot (hang upon relocation, while running from SDRAM). With this optimized RFDC value we can force this register and use the auto-calibration code to setup the remaining calibration registers. - Increase sizes of FPGA chips selects - EBC timing updated OEN=3 for 66 MHz EBC speed - Change ext. IRQ2 setup to level-low active - Enable CONFIG_SYS_CFI_FLASH_STATUS_POLL By defining CONFIG_SYS_CFI_FLASH_STATUS_POLL, DQ7 is polled to detect the chip busy status. This is now used instead of the data toggle method which is used historically by default in the common CFI driver. With this change a problem with not written data is solved on this board, where a 32 byte block of data is still erased instead of filled with the correct content after these commands: => erase 0xfc100000 +0x1000000 .................................................................... done Erased 128 sectors => cp.b 0x100000 0xfc100000 0x1000000 Copy to Flash... done => cmp.b 0x100000 0xfc100000 0x1000000 byte at 0x00d0d6c0 (0x00) != byte at 0xfcd0d6c0 (0xff) Total of 12637888 bytes were the same Signed-off-by: Stefan Roese <sr@denx.de>
| * | ppc4xx/Canyonlands added USB board callbacksRupjyoti Sarmah2010-07-23-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Functions added to support board callbacks for USB init. This isolates USB manipulations such that it is only touched if USB is used by U-Boot. Signed-off-by: Dave Mitchell <dmitchell@appliedmicro.com> Signed-off-by: Rupjyoti Sarmah <rsarmah@appliedmicro.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | | powerpc/85xx: Rework P1022 SERDES is_serdes_configured supportKumar Gala2010-07-21-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move serdes init until after we are in ram so we can keep track of a global static protocal map for the particular serdes config we are in. This makes is_serdes_configured() much simplier and not constantly reading registers to determine if a given device is enabled based on the protocol. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | powerpc/85xx: Rework MPC8536 SERDES is_serdes_configured supportKumar Gala2010-07-21-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move serdes init until after we are in ram so we can keep track of a global static protocal map for the particular serdes config we are in. This makes is_serdes_configured() much simplier and not constantly reading registers to determine if a given device is enabled based on the protocol. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | powerpc/86xx: Rename PCI1/2 to PCIE1/2 on MPC8641HPCN & SBC8641Kumar Gala2010-07-20-66/+64
| | | | | | | | | | | | | | | | | | | | | | | | The MPC8641 boards actually only have PCIE not PCI. Rename so we are uniform with regards to names so we can replace this code with templated code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | powerpc/86xx: Move PCI/PCIe address defines into common immap_86xx.hKumar Gala2010-07-20-12/+0
| | | | | | | | | | | | | | | | | | | | | | | | Remove dupliacted setting of PCI/PCIe address and offsets in board config.h. Renamed CONFIG_SYS_PCI1/2_ADDR to CONFIG_SYS_PCI1/2ADDR on MPC8641 boards since its really PCIE controllers and not PCI. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | powerpc/85xx: Move PCI/PCIe address defines into common immap_85xx.hKumar Gala2010-07-20-49/+0
|/ / | | | | | | | | | | | | Remove dupliacted setting of PCI/PCIe address and offsets in board config.h. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | Drop support for GTH boardWolfgang Denk2010-07-17-389/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The board maintainer states: The GTH board is obsolete and has not been manufactured for several years. To my knowledge, no recent U-Boot build has been tested on that card. So drop support for this board. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Thomas Lange <thomas@corelatus.se> Acked-by: Thomas Lange<thomas@corelatus.se>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2010-07-16-29/+517
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| * | ppc/85xx: Convert MPC8536DS to using board common ICS307 codeKumar Gala2010-07-16-9/+5
| | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | ppc/85xx: Convert MPC8572DS to using board common ICS307 codeKumar Gala2010-07-16-9/+5
| | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/85xx: Add command to report errata workaroundsKumar Gala2010-07-16-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add 'errata' command to report what errata we workaround. Report workaround for erratum SATA-A001 on P1022/P1013. Also sorted the CONFIG_CMD_* list. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc: add support for the Freescale P1022DS reference boardTimur Tabi2010-07-16-0/+470
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Specifics: 1) 36-bit only 2) Booting from NOR flash only 3) Environment stored in NOR flash only 4) No SPI support 5) No DIU support Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | 85xx/p1_p2_rdb: PCIe E1000 card support added.Poonam Aggrwal2010-07-16-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Enables the Intel Pro/1000 PT Gb Ethernet PCI-E Network Adapter configuration support for P1/P2 RDB. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | mpc85xx: Add reginfo commandBecky Bruce2010-07-16-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | The new command dumps the TLBCAM, the LAWs, and the BR/OR regs. Add CONFIG_CMD_REGINFO to the config for all MPC85xx parts. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc: Update configs to properly set FSL_ELBCBecky Bruce2010-07-16-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some parts that have an Enhanced Local Bus Controller weren't setting CONFIG_FSL_ELBC. Fix this so we can use this define properly going forward (currently it's only used if PHYS_64BIT is set, which meant not all platforms needed to have it set correctly). Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | 85xx/p1_p2_rdb: enable hwconfigPoonam Aggrwal2010-07-16-0/+2
| | | | | | | | | | | | | | | Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | Move ICS CLK chip frequency calculation code into a common board libraryKumar Gala2010-07-16-11/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We have several boards that use the same ICS307 CLK chip to drive the System clock and DDR clock. Move the code into a common location so we share it. Convert the P2020DS board as the first to use the new common ICS307 code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Timur Tabi <timur@freescale.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-pxaWolfgang Denk2010-07-15-0/+860
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| * | | PXA: ZipitZ2 supportMarek Vasut2010-07-14-0/+259
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for Aeronix Zipit Z2 handheld. Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
| * | | PXA: Toradex Colibri PXA270 supportMarek Vasut2010-07-14-0/+278
| | | | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
| * | | PXA: Voipac PXA270 SupportMarek Vasut2010-07-14-0/+323
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the Voipac PXA270 board. The support includes: - Ethernet - USB - MMC - NOR Booting - OneNAND Booting - LCD - HDD Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Acked-by: Scott Wood <scottwood@freescale.com>
* | | Merge branch 'master' of ../masterWolfgang Denk2010-07-15-737/+1310
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| * | Merge branch 'next' of git://git.denx.de/u-boot-niosWolfgang Denk2010-07-14-628/+0
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| | * | nios2: remove EP1C20, EP1S10, EP1S40 boardsThomas Chou2010-07-12-628/+0
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The example configuration files of nios2-generic board can generated binary to run on the EP1C20, EP1S10, and EP1S40 boards. So the three boards can be removed. With nios2-generic approach, the fpga parameter header file can be generated from hardware designs using tools. Porting u-boot for nios2 boards is simplified. Vendors can supply their fpga parameter file or patches to add a new nios2-generic board instance. There is no need to include other boards support for nios2 in the u-boot mainline. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Scott McNutt <smcnutt@psyent.com>
| * | Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxWolfgang Denk2010-07-14-0/+1071
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| | * | 83xx: add support for ve8313 boardHeiko Schocher2010-07-09-0/+511
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add support for the ve8313 board based on Freescale MPC8313 CPU. - serial console on UART 1 - 128 MB DDR RAM - 32 MB NOR Flash - 16 MB NAND Flash - Ethernet MII Mode over on TSEC0 - micrel ksz804 phy - Hardware WDT MAX824 changes since v1 - Environment size = sector size - use red. environment - add comments from Kim Phillips - add MAKEALL, MAINTAINERS entry - Codingstyle issues fixed - inserted original Copyrights - PCI subsys vendor ID changed from 0x1057 (Motorola) to 0x1957 (Freescale) changes since v2 - add comments from Wolfgang Denk - fix Codingstyle and some comments - reworked WDT reset (just toggling the WD_TRIG pin) - Environment size now 16KiB - fixed RAMBOOT version - fixed CONFIG_SYS_LOAD_ADDR - renamed CONFIG_TSEC1_NAME to TSEC1 Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| | * | MPC8308RDB: minimal support for devboard from FreescaleIlya Yanok2010-07-09-0/+560
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch provides support for MPC8308RDB development board from Freescale with a minimal set of features: Dual UART is supported NOR flash is supported Both TSEC Ethernet controllers are supported PCI Express initialization is supported The following features are enabled in configuration but not fully tested: I2C (used to get the board revision) I2C-connected RTC VSC7385 switch There is one (hopefully) minor issue: on soft reset the board sometimes resets twice. I've not managed to find the fix for this problem yet. As a workaround instruction cache can be disabled. Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | Merge branch 'master' of git://git.denx.de/u-boot-netWolfgang Denk2010-07-14-22/+30
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| | * | edminiv2: add ethernet supportAlbert Aribaud2010-07-12-4/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add edminiv2 board support for mv_egiga. Add edminiv2 config to enable mv_egiga. Signed-off-by: Albert Aribaud <albert.aribaud@free.fr> Acked-by: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| | * | mvgbe: support SoCs other than kirkwoodAlbert Aribaud2010-07-12-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename all references to kirkwood in mvgbe symbols throughout the whole codebase. Signed-off-by: Albert Aribaud <albert.aribaud@free.fr> Acked-by: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| | * | cpuat91: unbreak ethernetEric Bénard2010-07-12-6/+3
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * the following problems are met : config was set to use the new driver as a default but - RMII was not enabled for the new driver - the new driver didn't compile with RMII enabled - the new driver initialize a PHY at address O when the PHY of this board is at 1 thus we get "AT91 EMAC RMII: No PHY present" * to fix these problems, this patch : - enable RMII for the new driver - fix the wrong define used in the at91_emac.c - allow the config file to set a default phy address (and use 0 as a default as in the actual at91_emac.c driver) Signed-off-by: Eric Bénard <eric@eukrea.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | Merge branch 'master' of git://git.denx.de/u-boot-blackfinWolfgang Denk2010-07-14-55/+205
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| | * | Blackfin: bf561-acvilon: drop unused env redund defineMike Frysinger2010-07-13-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SPI env code didn't support redundant environments until recently, but this code was written before that. Since it has never been tested (and currently causes a build failure), simply punt it. If the functionality is actually desired, it can be re-added once it has been tested. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| | * | Blackfin: bf527-ad7160-eval: new board supportMichael Hennerich2010-07-13-0/+148
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Support the new AD7160 eval board. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| | * | Blackfin: enable IP defrag for ADI boardsMike Frysinger2010-07-13-0/+1
| | | | | | | | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| | * | Blackfin: unify default I2C settings for ADI boardsMike Frysinger2010-07-13-34/+12
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org> Acked-by: Heiko Schocher <hs@denx.de>
| | * | Blackfin: bf518f-ezbrd: handle different PHYs dynamicallyMike Frysinger2010-07-13-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The original BF518F-EZBRD's have a Micrel KSZ8893 DSA on them, but newer ones only have a National PHY (which lack a RX Error interrupt line). So in the board eth init code, dynamically detect what is hooked up to the MAC and handle each accordingly. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| | * | Blackfin: bfin_spi: support gpios as chip selectsMike Frysinger2010-07-13-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than only support the pins dedicated as chip selects, utilize the gpio framework to support any gpio pin. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| | * | Blackfin: switch to common GPIO LED driverMike Frysinger2010-07-05-6/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that we have a unified gpio layer, the different status led implementations can be switched to the common gpio led driver. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| | * | Blackfin: back out status_led.h stubsMike Frysinger2010-07-05-12/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When boards define CONFIG_BOARD_SPECIFIC_LED, the common led definitions are OK for Blackfin boards. So switch the few boards using these over to the common code. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| | * | Blackfin: unify custom gpio commandsMike Frysinger2010-07-05-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that we have a unified gpio layer, the misc partial gpio commands can be unified and made complete (support all possible gpios). Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| | * | Blackfin: ibf-dsp561: enable AX88180 net driverHoan Hoang2010-07-05-0/+12
| | |/ | | | | | | | | | | | | Signed-off-by: Hoan Hoang <hnhoan@i-syst.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: convert plat-nand code to GPIO frameworkMike Frysinger2010-07-08-32/+4
| |/ | | | | | | | | | | | | Use the new GPIO framework code in both the Blackfin arch and the nand_plat driver to simplify things greatly. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | ARMV7: Add support for TI OMAP4 PandaSteve Sakoman2010-07-05-0/+220
| | | | | | | | | | | | | | | | | | | | | | | | OMAP4 Panda is a reference board based on OMAP4430, an ARMV7 Cortex A9 CPU This patch adds basic support for booting the board. It includes i2c and mmc support. It assumes U-boot is loaded to SDRAM with the help of another small bootloader (x-load) running from SRAM. U-boot currently relies on x-load for clock, mux, and SDRAM initialization Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | ARMV7: Add support for TI OMAP4430 SDPSteve Sakoman2010-07-05-0/+221
| | | | | | | | | | | | | | | | | | | | | | | | | | OMAP4430 SDP is a reference board based on OMAP4430, an ARMV7 Cortex A9 CPU This patch adds basic support for booting the board. It includes i2c and mmc support. It assumes U-boot is loaded to SDRAM with the help of another small bootloader (x-load) running from SRAM. U-boot currently relies on x-load for clock, mux, and SDRAM initialization Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | ARM: Rename arch/arm/cpu/arm_cortexa8 to armv7Steve Sakoman2010-07-05-11/+11
|/ | | | | | | | | | | | The purpose of this patch is to prepare for adding the OMAP4 architecture, which is Cortex A9 Cortex A8 and A9 both belong to the armv7 architecture, hence the name change. The two architectures are similar enough that substantial code can be shared. Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
generated by cgit v1.1 at 2024-11-01 16:54:02 +0000