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* driver/i2c/mxc: Enable I2C bus 3 and 4York Sun2015-04-23-0/+29
| | | | | | | | | Some SoCs have more than two I2C busses. Instead of adding ifdef to the driver, macros are put into board header file where CONFIG_SYS_I2C_MXC is defined. Signed-off-by: York Sun <yorksun@freescale.com> CC: Heiko Schocher <hs@denx.de>
* board/ls2085_common: Increase malloc lengthPrabhakar Kushwaha2015-04-23-1/+1
| | | | | | | Increase malloc length for more than 2M. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* armv8/fsl-lsch3: Add Freescale Debug Server driverBhupesh Sharma2015-04-21-5/+15
| | | | | | | | | | | | | The Debug Server driver is responsible for loading the Debug server FW on the Service Processor (Cortex-A5 core) on LS2085A like SoCs and then polling for the successful initialization of the same. TOP MEM HIDE is adjusted to ensure the space required by Debug Server FW is accounted for. MC uses the DDR area which is calculated as: MC DDR region start = Top of DDR - area reserved by Debug Server FW Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* Add bootscript support to esbc_validate.gaurav rana2015-04-21-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | 1. Default environment will be used for secure boot flow which can't be edited or saved. 2. Command for secure boot is predefined in the default environment which will run on autoboot (and autoboot is the only option allowed in case of secure boot) and it looks like this: #define CONFIG_SECBOOT \ "setenv bs_hdraddr 0xe8e00000;" \ "esbc_validate $bs_hdraddr;" \ "source $img_addr;" \ "esbc_halt;" #endif 3. Boot Script can contain esbc_validate commands and bootm command. Uboot source command used in default secure boot command will run the bootscript. 4. Command esbc_halt added to ensure either bootm executes after validation of images or core should just spin. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2015-04-20-4/+28
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| * powerpc/mpc8641hpcn: Move environment to avoid conflictScott Wood2015-04-20-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot on this board grew a long time ago past the 384 KiB that it reserves for the U-Boot image, before the environment. Thus, saveenv overwrites the U-Boot image and bricks the board. I tried to find out when U-Boot grew beyond this point, but there is a long stretch in the history where this board did not build -- and AFAICT when it did fit in 384 KiB, it was missing vital features such as fdt support. Turning off CONFIG_VIDEO was not enough to make it fit. Thus, I don't think we have any choice other than to move the environment. Signed-off-by: Scott Wood <scottwood@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * board/t2080rdb: enable CONFIG_PHY_AQUANTIAShengzhou Liu2015-04-20-1/+1
| | | | | | | | | | | | | | CONFIG_PHY_AQ1202 is no longer needed, use CONFIG_PHY_AQUANTIA. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * powerpc/t2080rdb: update ddr to support 1866MT/sShengzhou Liu2015-04-20-0/+5
| | | | | | | | | | | | | | | | Support SODIMM D3XP12081XL10AA 1866MT/s on T2080RDB. Enable CONFIG_CMD_MEMTEST as well. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * T4240RDB: Enable CONFIG_SYS_CORTINA_FW_IN_NOR configChunhe Lan2015-04-20-0/+1
| | | | | | | | | | | | | | | | | | Now cortina driver uses macro CONFIG_SYS_CORTINA_FW_IN_NOR to define that firmware of cortina driver is stored in the nor flash. Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * board/t208xrdb: VID supportYing Zhang2015-04-20-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | The fuse status register provides the values from on-chip voltage ID efuses programmed at the factory. These values define the voltage requirements for the chip. u-boot reads FUSESR and translates the values into the appropriate commands to set the voltage output value of an external voltage regulator. Signed-off-by: Ying Zhang <b40530@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * qemu-ppce500: Add support for 64bit CCSR mapAlexander Graf2015-04-20-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | QEMU 2.3 changes the address layout of the CCSR map in the PV ppce500 machine to reside in higher address space. Unfortunately, this exposed a glitch in u-boot for ppce500: While providing a function to dynamically evaluate the CCSR region's position in physical address space, we never used it. Plus we forgot to support 64bit physical addresses. This patch fixes that mishap, making u-boot work fine with latest QEMU again. Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Scott Wood <scottwood@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | sandbox: add config_distro_defaults and config_distro_bootcmdSjoerd Simons2015-04-19-8/+23
|/ | | | | | | | | | | | | | | | | | Make the sandbox setup more generic/examplary by including config_distro_defaults.h and config_distro_bootcmd.h. Among other things this makes it easy to test whether images will boot though with the standard distro bootcmds by running e.g: u-boot -c 'host bind 0 myimage.img ; boot' By default there are 2 target host devices to emulate device with multiple storage devices (e.g. internal ("host 0") and external ("host 1") and verify that the prioritization and fallbacks do work correctly. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
* sandbox: exynos: Move CONFIG_SOUND_SANDBOX to KconfigSimon Glass2015-04-18-2/+0
| | | | | | Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: exynos: Move CONFIG_SOUND_WM8994 to KconfigSimon Glass2015-04-18-5/+0
| | | | | | Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: exynos: Move CONFIG_SOUND_MAX98095 to KconfigSimon Glass2015-04-18-1/+0
| | | | | | Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: exynos: Move CONFIG_I2S_SAMSUNG to KconfigSimon Glass2015-04-18-1/+0
| | | | | | Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: exynos: Move CONFIG_I2S to KconfigSimon Glass2015-04-18-1/+0
| | | | | | Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: exynos: Move CONFIG_CMD_SOUND to KconfigSimon Glass2015-04-18-2/+0
| | | | | | Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: exynos: Move CONFIG_SOUND to KconfigSimon Glass2015-04-18-2/+0
| | | | | | Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: Move CONFIG_TPM_TIS_SANDBOX to KconfigSimon Glass2015-04-18-4/+0
| | | | | | Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: Move CONFIG_SPI_FLASH_SANDBOX to KconfigSimon Glass2015-04-18-1/+0
| | | | | | Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: Move CONFIG_SANDBOX_SPI to KconfigSimon Glass2015-04-18-1/+0
| | | | | | Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: Move CONFIG_SYS_I2C_SANDBOX to KconfigSimon Glass2015-04-18-1/+0
| | | | | | | Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher<hs@denx.de>
* sandbox: Move CONFIG_SYS_VSNPRINTF to KconfigSimon Glass2015-04-18-3/+0
| | | | | | Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: Move GPIO CONFIGs to KconfigSimon Glass2015-04-18-2/+0
| | | | | | Move these over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
* Kconfig: Move CONFIG_BOOTSTAGE to KconfigSimon Glass2015-04-18-6/+0
| | | | | | | Move CONFIG_BOOT_STAGE and its associated options to Kconfig. Adjust existing users and code. Signed-off-by: Simon Glass <sjg@chromium.org>
* Kconfig: Move CONFIG_DESIGNWARE_ETH to KconfigSimon Glass2015-04-18-8/+0
| | | | | | | | | | Move this to Kconfig and clean up board config files that use it. Also rename it to CONFIG_ETH_DESIGNWARE to fit with the naming that exists in drivers/net/Kconfig. Signed-off-by: Simon Glass <sjg@chromium.org> Version 1: Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* sandbox: Enable more network features for sandboxJoe Hershberger2015-04-18-0/+9
| | | | | | | More net features enabled and supported on sandbox to allow more testing Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Simon Glass <sjg@chromium.org>
* dm: usb: sandbox: Enable USBSimon Glass2015-04-18-0/+2
| | | | | | | | Enable USB emulation and associated features so that USB can be used in sandbox. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de>
* dm: usb: exynos: Enable both USB ports on snowSimon Glass2015-04-18-0/+2
| | | | | | | Switch snow over to use both EHCI and XHCI at the same time. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de>
* exynos: cros_ec: Drop unnecessary initSimon Glass2015-04-18-4/+0
| | | | | | | Since driver model will probe the EC when it is first used, we do not need to init it explicitly. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: cros_ec: Drop unnecessary initSimon Glass2015-04-18-1/+0
| | | | | | | Since driver model will probe the EC when it is first used, we do not need to init it explicitly. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: x86: spi: Convert ICH SPI driver to driver modelSimon Glass2015-04-18-1/+0
| | | | | | | | | | | | Convert this driver over to use driver model. Since all x86 platforms use it, move x86 to use driver model for SPI and SPI flash. Adjust all dependent code and remove the old x86 spi_init() function. Note that this does not make full use of the new PCI uclass as yet. We still scan the bus looking for the device. It should move to finding its details in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: Enable DHCP and IP defragJoe Hershberger2015-04-18-0/+8
| | | | | | | This is now testable via the eth-raw interface Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* dm: eth: Add support for aliasesJoe Hershberger2015-04-18-1/+1
| | | | | | | | | | Allow network devices to be referred to as "eth0" instead of "eth@12345678" when specified in ethact. Add tests to verify this behavior. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* sandbox: eth: Add ARP and PING response to sandbox driverJoe Hershberger2015-04-18-0/+1
| | | | | | | | | The sandbox driver will now generate response traffic to exercise the ping command even when no network exists. This allows the basic data pathways of the DM to be tested. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* sandbox: eth: Add network support to sandboxJoe Hershberger2015-04-18-6/+10
| | | | | | | Add basic network support to sandbox which includes a network driver. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* dm: sandbox: pci: Enable PCI for sandboxSimon Glass2015-04-18-0/+4
| | | | | | | Enable PCI options so that sandbox can be used for testing this bus with driver model. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Add support for panther (Asus Chromebox)Simon Glass2015-04-16-0/+17
| | | | | | | | | | | | | | | | | | | | Support running U-Boot as a coreboot payload. Tested peripherals include: - Video (HDMI and DisplayPort) - SATA disk - Gigabit Ethernet - SPI flash USB3 does not work. This may be a problem with the USB3 PCI driver or something in the USB3 stack and has not been investigated So far this is disabled. The SD card slot also does not work. For video, coreboot will need to run the OPROM to set this up. With this board, bare support (running without coreboot) is not available as yet. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Move common Chromebook config into a separate fileSimon Glass2015-04-16-60/+69
| | | | | | | | Since Chromebooks mostly have similar configuration, put it in a common file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2015-04-16-3/+7
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| * sunxi: Complete i2c support for each supported platformPaul Kocialkowski2015-04-15-0/+4
| | | | | | | | | | | | | | | | | | | | | | Sunxi platforms come with at least 3 TWI (I2C) controllers and some platforms even have up to 5. This adds support for every controller on each supported platform, which is especially useful when using expansion ports on single-board- computers. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * i2c: mvtwsi: Support for up to 4 different controllersPaul Kocialkowski2015-04-15-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | Orion5x, Kirkwood and Armada XP platforms come with a single TWSI (I2C) MVTWSI controller. However, other platforms using MVTWSI may come with more: this is the case on Allwinner (sunxi) platforms, where up to 4 controllers can be found on the same chip. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | include: configs: Enable DWC3 and DFU in AM43xxKishon Vijay Abraham I2015-04-14-1/+57
| | | | | | | | | | | | | | | | Enabled dwc3, dwc3-omap and PHY for dwc3 are enabled. Also enabled support for DFU. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* | include: configs: Enable DWC3 and DFU in DRA7xxKishon Vijay Abraham I2015-04-14-0/+68
|/ | | | | | | | Enabled dwc3, dwc3-omap and PHY for dwc3 are enabled. Also enabled support for DFU. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2015-04-13-2/+126
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| * ARM: mx5: add support for USB armory boardAndrej Rosano2015-04-09-0/+126
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Inverse Path USB armory board, an open source flash-drive sized computer based on Freescale i.MX53 SoC. http://inversepath.com/usbarmory Signed-off-by: Andrej Rosano <andrej@inversepath.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Chris Kuethe <chris.kuethe@gmail.com> Cc: Fabio Estevam <festevam@gmail.com> Cc: Vagrant Cascadian <vagrant@debian.org> Tested-By: Vagrant Cascadian <vagrant@debian.org> Tested-by: Chris Kuethe <chris.kuethe@gmail.com>
| * mx53loco: Disable printing cpuinfoFabio Estevam2015-04-08-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 32df39c741788e ("mx5: fix get_reset_cause") we have the following boot messages on a mx53qsb: U-Boot 2015.04-rc5-00029-gd68df02 (Apr 06 2015 - 11:15:39) CPU: Freescale i.MX53 rev2.1 at 800 MHz Reset cause: POR Board: MX53 LOCO I2C: ready DRAM: 1 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 In: serial Out: serial Err: serial CPU: Freescale i.MX53 rev2.1 at 1000 MHz Reset cause: unknown reset Net: FEC [PRIME] The CPU and Reset cause lines appear twice. Initially mx53 boots at 800MHz, then at a later point the PMIC is configured via I2C to raise the CPU voltage so that it can run at 1GHz. To avoid such misleading double printings, disable printing cpu info for now. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Jason Liu <r64343@freescale.com>
* | Merge git://git.denx.de/u-boot-arcTom Rini2015-04-10-0/+6
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| * | board: axs10x - support v3 mother-boardAlexey Brodkin2015-04-09-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There're 2 versions of motherboards that could be used in ARC SDP. The only important difference for U-Boot is different NAND IC in use: [1] v2 board (we used to support up until now) sports MT29F4G08ABADAWP while [2] v3 board sports MT29F4G16ABADAWP They are almost the same except data bus width 8-bit in [1] and 16-bit in [2]. And for proper support of 16-bit data bus we have to pass NAND_BUSWIDTH_16 option to NAND driver core - which we do now knowing board type we're running on. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
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