| Commit message (Collapse) | Author | Age | Lines |
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in an effort to begin to unify the umpteen FSL I2C drivers that
are all otherwise very similar.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
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Conflicts:
drivers/tsec.c
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* Added support for using eTSEC 3 and eTSEC 4 on the 8548 CDS.
This will only work on rev 1.3 boards (but doesn't break older boards)
* Cleaned up some comments to reflect the expanded role of tsec
in other systems
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Conflicts:
board/stxxtc/Makefile
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Remove PEX fluff commands.
Signed-off-by: Haiying Wang <haiying.wang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
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Signed-off-by:Jason Jin<jason.jin@freescale.com>
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Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
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Signed-off-by: Jon Loeliger <jdl@freescale.com>
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Conflicts:
include/ft_build.h
include/pci.h
Resolved, though.
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* Added comments and a printf to warn that PCI-X won't
work at 33MHz
Patch by Andy Fleming 17-Mar-2006
Signed-off-by: Andy Fleming <afleming@freescale.com>
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* Added support for PCI2 on CDS
Patch by Andy Fleming 17-Mar-2006
Signed-off-by: Andy Fleming <afleming@freescale.com>
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Signed-off-by: Andy Fleming <afleming@freescale.com>
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Loeliger 17-Jan-2006
Signed-off-by: Jon Loeliger <jdl@freescale.com>
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Added code for reading and writing Mac addresses to/from ID EEPROM(0x57).
With attached patch, we can use command "mac/mac read/mac save/"
to read and write EEPROM under u-boot prompt.
U-boot will calculate the checksum of EEPROM while bootup,
if it is right, then u-boot will check whether the mac address
of eTSEC0/1/2/3 is availalbe (non-zero).
If there is mac address availabe in EEPROM, u-boot will use it,
otherewise, u-boot will use the mac address defined in
MPC8641HPCN.h. This matches the requirement to set unique mac address
for each TSEC port.
Signed-off-by: Haiying Wang <haiying.wang@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
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Signed-off-by:Jason Jin <Jason.jin@freescale.com>
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signed-off-by: Jason Jin <Jason.Jin@freescale.com>
signed-off-by: Wei Zhang <wei.zhang@freescale.com>
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Signed-off-by: Jason Jin <Jason.jin@freescale.com>
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Enable the CFI driver.
Remove bogus LAWBAR7 cruft.
Use correct TEXT_BASE, Fixup load script.
Enable SPD EEPROM during DDR setup.
Use generic RFC 1918 IP addresses by default.
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Removed //-style comments.
Use 80-column lines.
Remove trailing whitespace.
Remove dead code and debug cruft.
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(must have never been tested before!)
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Based on idea and implementation from Jeff Mann
Patch by Stefan Roese, 20 Oct 2006
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Patch by Aaron Sells, 20 Jun 2006
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- Map in a additional chip selects CS4 and CS5.
- Modify the port configration, configure six UARTs and no PCI,
ATA and USB.
- Add custom flash driver to handle specific byte swapping
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Patch by Stefan Roese, 13 Sep 2006
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Patch by Stefan Roese, 12 Sep 2006
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Patch by Stefan Roese, 07 Sep 2006
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