| Commit message (Collapse) | Author | Age | Lines |
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Allow network devices to be referred to as "eth0" instead of
"eth@12345678" when specified in ethact.
Add tests to verify this behavior.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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The sandbox driver will now generate response traffic to exercise the
ping command even when no network exists. This allows the basic data
pathways of the DM to be tested.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Add basic network support to sandbox which includes a network driver.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Enable PCI options so that sandbox can be used for testing this bus with
driver model.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Support running U-Boot as a coreboot payload. Tested peripherals include:
- Video (HDMI and DisplayPort)
- SATA disk
- Gigabit Ethernet
- SPI flash
USB3 does not work. This may be a problem with the USB3 PCI driver or
something in the USB3 stack and has not been investigated So far this is
disabled. The SD card slot also does not work.
For video, coreboot will need to run the OPROM to set this up.
With this board, bare support (running without coreboot) is not available
as yet.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Since Chromebooks mostly have similar configuration, put it in a common
file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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Sunxi platforms come with at least 3 TWI (I2C) controllers and some platforms
even have up to 5. This adds support for every controller on each supported
platform, which is especially useful when using expansion ports on single-board-
computers.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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Orion5x, Kirkwood and Armada XP platforms come with a single TWSI (I2C) MVTWSI
controller. However, other platforms using MVTWSI may come with more: this is
the case on Allwinner (sunxi) platforms, where up to 4 controllers can be found
on the same chip.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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Enabled dwc3, dwc3-omap and PHY for dwc3 are enabled. Also enabled
support for DFU.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
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Enabled dwc3, dwc3-omap and PHY for dwc3 are enabled. Also enabled
support for DFU.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
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Add support for Inverse Path USB armory board, an open source
flash-drive sized computer based on Freescale i.MX53 SoC.
http://inversepath.com/usbarmory
Signed-off-by: Andrej Rosano <andrej@inversepath.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Chris Kuethe <chris.kuethe@gmail.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Vagrant Cascadian <vagrant@debian.org>
Tested-By: Vagrant Cascadian <vagrant@debian.org>
Tested-by: Chris Kuethe <chris.kuethe@gmail.com>
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Since commit 32df39c741788e ("mx5: fix get_reset_cause") we have the following
boot messages on a mx53qsb:
U-Boot 2015.04-rc5-00029-gd68df02 (Apr 06 2015 - 11:15:39)
CPU: Freescale i.MX53 rev2.1 at 800 MHz
Reset cause: POR
Board: MX53 LOCO
I2C: ready
DRAM: 1 GiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1
In: serial
Out: serial
Err: serial
CPU: Freescale i.MX53 rev2.1 at 1000 MHz
Reset cause: unknown reset
Net: FEC [PRIME]
The CPU and Reset cause lines appear twice.
Initially mx53 boots at 800MHz, then at a later point the PMIC is configured via
I2C to raise the CPU voltage so that it can run at 1GHz.
To avoid such misleading double printings, disable printing cpu info for now.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
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There're 2 versions of motherboards that could be used in ARC SDP.
The only important difference for U-Boot is different NAND IC in use:
[1] v2 board (we used to support up until now) sports MT29F4G08ABADAWP
while
[2] v3 board sports MT29F4G16ABADAWP
They are almost the same except data bus width 8-bit in [1] and 16-bit
in [2]. And for proper support of 16-bit data bus we have to pass
NAND_BUSWIDTH_16 option to NAND driver core - which we do now knowing
board type we're running on.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
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This consolidates the flash settings for the Integrator
and activates the new ARM flash image support for them
so images can be loaded by name from flash.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This modifies the vexpress64 Juno configuration so that
it will by default load and boot a kernel and a device tree
from the images stored in the NOR flash. When we are
at it, also define the proper command line for the Juno and
indicate that the USB stick (/dev/sda1) is the default
root file system.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Work_92105 from Work Microwave is an LPC3250-
based board with the following features:
- 64MB or 128MB SDR DRAM
- 1 GB SLC NAND, managed through MLC controller.
- Ethernet
- Ethernet + PHY SMSC8710
- I2C:
- EEPROM (24M01-compatible)
- RTC (DS1374-compatible)
- Temperature sensor (DS620)
- DACs (2 x MAX518)
- SPI (through SSP interface)
- Port expander MAX6957
- LCD display (HD44780-compatible), controlled
through the port expander and DACs
This board has SPL support, and uses the LPC32XX boot
image format.
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
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This allows to clean up the config a good deal and also converts
pandora to Generic Board.
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
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Remove obsolete email address from MAINTAINERS.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Tom Rini <trini@konsulko.com>
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After this change it is possible to boot trats2 device with Image.itb,
which facilitates automated testing, since only one file is necessary.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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After this change it is possible to boot trats device with Image.itb,
which facilitates automated testing, since only one file is necessary.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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This change allows using Image.itb image format with Exynos4 devices
(especially trats and trats2).
Such change facilitates automated testing since only one binary needs
to be prepared.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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The peach boards have their SDRAM start address at 0x20000000 instead of
0x40000000 which seems common for all other exynos5 based boards. This
means the layout set in exynos5-common.h causes the kernel be loaded
more then 128MB (at 0x42000000) away from memory start which breaks
booting kernels with CONFIG_AUTO_ZRELADDR
Define a custom MEM_LAYOUT_ENV_SETTINGS for both peach boards which uses
the same offsets from start of memory as the common exynos5 settings.
This fixes booting via bootz and PXE
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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We can enable / disable trace feature from the FTRACE config options.
To enable, compile U-Boot with FTRACE=1.
This patch add #ifdef FTRACE in exynos5-common.h for enable/disable
to use FTRACE configs instead of having to change board config files.
Signed-off-by: Inha Song <ideal.song@samsung.com>
Acked-by: Simon Glass <sjg@chroimum.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>
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Conflicts:
board/armltd/vexpress64/vexpress64.c
Signed-off-by: Tom Rini <trini@konsulko.com>
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Bring the Colibri T20 configuration in-line with Apalis/Colibri T30.
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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In accordance with our other modules supported by U-Boot and as agreed
upon for Apalis/Colibri T30 get rid of the carrier board in the board/
configuration/device-tree naming.
While at it also bring the prompt more in line with our other products.
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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This CONFIG is not used, so drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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Signed-off-by: David Feng <fenghua@phytium.com.cn>
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Create a new configuration file: at91-sama5_common.h. Which includes the
configurations that reused by all SAMA5 chips.
at91-sama5_common.h includes:
- hw macros (clock, text_base and etc.)
- default commands.
- BOOTARGS
- U-Boot common configs.
NOTE: NOR flash definition should be put before including the common header.
For sama5d3-xplained:
- add CMD_SETEXPR
For sama5d3xek:
- add CMD_SETEXPR
- change CONFIG_SYS_MALLOC_LEN to (4*1024*1024)
Signed-off-by: Josh Wu <josh.wu@atmel.com>
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Enable SPL support for at91sam9n12ek boards, now it supports
boot up from NAND flash, serial flash.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
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Enable SPL support for at91sam9x5ek board. Now, it supports
boot up from NAND flash and SPI flash.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
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Supports boot up from NAND flash with software ECC eanbled.
And supports boot up from SD/MMC card with FAT file system.
As the boot from SD/MMC card with FAT file system, the BSS
segment is too big to fit into SRAM, so, use the lds to put
it into SDRAM.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
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Insteading in mmc's raw sectors, this patch will save the environment
in a fat file (uboot.env) in mmc card's first FAT patition by default.
If you want to save in mmc's raw sectors, you only need to define
CONFIG_ENV_IS_IN_MMC.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Bo Shen <voice.shen@atmel.com>
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move MACH_TYPE into defconfig
Signed-off-by: Heiko Schocher <hs@denx.de>
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This command is only enabled by one board, complicates the NAND code,
and doesn't appear to have been functioning properly for several
years. If there are no bad blocks in the NAND region being written
nand_write_skip_bad() will take the shortcut of calling nand_write()
which bypasses the special yaffs handling. This causes invalid YAFFS
data to be written. See
http://lists.denx.de/pipermail/u-boot/2011-September/102830.html for
an example and a potential workaround.
U-Boot still retains the ability to mount and access YAFFS partitions
via CONFIG_YAFFS2.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
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The CONFIG_MTD_NAND_VERIFY_WRITE has been removed from Linux for some
time and a more generic method of NAND verification now exists in U-Boot.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
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This option was removed along with legacy NAND support in
be33b046b549ad88c204c209508cd7657232ffbd. Clean up some remnants.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
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This patch is to support reading temperature for mx6slevk board.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Add basic SECO MX6Q/uQ7 board support (Ethernet, UART, SD are supported).
It also adds a Kconfig skeleton to later add more SECO board (supporting
SoC and board variants).
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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This patch enables QUAD read mode for qspi to improve the
read performace while loading the binaries from qspi.
Signed-off-by: Ravi Babu <ravibabu@ti.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
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make the CPU clock selectable via Kconfig
this removes the sunxi specific CONFIG_CLK_FULL_SPEED defined in each
soc header and replaces it's use in board/sunxi/board.c with
CONFIG_SYS_CLK_FREQ from Kconfig which allows us to configure board
specific frequency on boot
Signed-off-by: Iain Paton <ipaton0@gmail.com>
[hdegoede@redhat.com s/CONFIG_SYS_CLK_FREQ/CONFIG_TIMER_CLK_FREQ/ for the
arch-timer clk speed on sun7i to fix mis-compile on sun7i]
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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