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| | * | | exynos: Update origen and smdkv310 to use common tzpc_initInderpal Singh2013-06-04-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org> Acked-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | | exynos: move tzpc_init to armv7/exynosInderpal Singh2013-06-04-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | tzpc_init is common for all exynos5 boards, hence move it to armv7/exynos so that all other boards can use it. Also update the smdk5250 Makefile and config file. Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org> Acked-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | | SMDK5250: Enable SPI Gigabyte device.Rajeshwari Shinde2013-05-20-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables gigabyte device for SMDK5250. Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | | | powerpc/85xx: Add P1023RDB board supportChunhe Lan2013-06-20-0/+401
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | P1023RDB Specification: ----------------------- Memory subsystem: 512MB DDR3 (Fixed DDR on board) 64MB NOR flash 128MB NAND flash Ethernet: eTSEC1: Connected to Atheros AR8035 GETH PHY eTSEC2: Connected to Atheros AR8035 GETH PHY PCIe: Three mini-PCIe slots USB: Two USB2.0 Type A ports I2C: AT24C08 8K Board EEPROM (8 bit address) Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | | | | common/Makefile: Add new symbol CONFIG_SPL_ENV_SUPPORT for environment in SPLYing Zhang2013-06-20-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There will need the environment in SPL for reasons other than network support (in particular, hwconfig contains info for how to set up DDR). Add a new symbol CONFIG_SPL_ENV_SUPPORT to replace CONFIG_SPL_NET_SUPPORT for environment in common/Makefile. Signed-off-by: Ying Zhang <b40530@freescale.com> Reviewed-by: Tom Rini <trini@ti.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | | | | board/b4860qds: Relax NOR flash teadc timing parameterPrabhakar Kushwaha2013-06-20-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Relax parameters to give address latching more time to setup. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | | | | powerpc/t4qds: Slave module for boot from SRIO and PCIELiu Gang2013-06-20-7/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When a T4 board boots from SRIO or PCIE, it needs to finish these processes: 1. Set all the cores in holdoff status. 2. Set the boot location to one PCIE or SRIO interface by RCW. 3. Set a specific TLB entry for the boot process. 4. Set a LAW entry with the TargetID of one PCIE or SRIO for the boot. 5. Set a specific TLB entry in order to fetch ucode and ENV from master. 6. Set a LAW entry with the TargetID one of the PCIE ports for ucode and ENV. 7. Slave's u-boot image should be generated specifically by make xxxx_SRIO_PCIE_BOOT_config. This will set SYS_TEXT_BASE=0xFFF80000 and other configurations. For more information about the feature of Boot from SRIO/PCIE, please refer to the document doc/README.srio-pcie-boot-corenet. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | | | | powerpc/t4qds: Enable master module for Boot from SRIO and PCIELiu Gang2013-06-20-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | T4 can support the feature of Boot from SRIO/PCIE, and the macro "CONFIG_SRIO_PCIE_BOOT_MASTER" will enable the master module of this feature when building the u-boot image. You can get some description about this macro in README file, and for more information about the feature of Boot from SRIO/PCIE, please refer to the document doc/README.srio-pcie-boot-corenet. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | | | | powerpc/b4860qds: Slave module for boot from SRIO and PCIELiu Gang2013-06-20-5/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When a b4860qds board boots from SRIO or PCIE, it needs to finish these processes: 1. Set all the cores in holdoff status. 2. Set the boot location to one PCIE or SRIO interface by RCW. 3. Set a specific TLB entry for the boot process. 4. Set a LAW entry with the TargetID of one PCIE or SRIO for the boot. 5. Set a specific TLB entry in order to fetch ucode and ENV from master. 6. Set a LAW entry with the TargetID one of the PCIE ports for ucode and ENV. 7. Slave's u-boot image should be generated specifically by make xxxx_SRIO_PCIE_BOOT_config. This will set SYS_TEXT_BASE=0xFFF80000 and other configurations. For more information about the feature of Boot from SRIO/PCIE, please refer to the document doc/README.srio-pcie-boot-corenet. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | | | | powerpc/b4860qds: Enable master module for boot from SRIO and PCIELiu Gang2013-06-20-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | B4860QDS can support the feature of Boot from SRIO/PCIE, and the macro "CONFIG_SRIO_PCIE_BOOT_MASTER" will enable the master module of this feature when building the u-boot image. You can get some description about this macro in README file, and for more information about the feature of Boot from SRIO/PCIE, please refer to the document doc/README.srio-pcie-boot-corenet. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | | | | powerpc/boot: Change the macro of Boot from SRIO and PCIE master moduleLiu Gang2013-06-20-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the macro "CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER" can enable the master module of Boot from SRIO and PCIE on a platform. But this is not a silicon feature, it's just a specific booting mode based on the SRIO and PCIE interfaces. So it's inappropriate to put the macro into the file arch/powerpc/include/asm/config_mpc85xx.h. Change the macro "CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER" to "CONFIG_SRIO_PCIE_BOOT_MASTER", remove them from arch/powerpc/include/asm/config_mpc85xx.h file, and add those macros in configuration header file of each board which can support the master module of Boot from SRIO and PCIE. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | | | | board/bsc9131rdb: Update default boot environment settingsPriyanka Jain2013-06-20-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BSC9131RDB has 1GB DDR. Out of this, only 880MB is passed on to Linux via bootm_size. Remaining -16MB is reserved for PowerPC-DSP shared control area -128MB is reserved for DSP private area. Also 256MB, out of this 880MB is required for data communication between PowerPC and DSP core. For this bootargs are modified to pass parameter to create 1 hugetlb page of 256MB via default_hugepagesz, hugepagesz and hugepages Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | | | | board/bsc9131rdb: Add DSP side tlb and lawsPriyanka Jain2013-06-20-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BSC9131RDB is a Freescale Reference Design Board for BSC9131 SoC which is a integrated device that contains one powerpc e500v2 core and one DSP starcore. To support DSP starcore -Creating LAW and TLB for DSP-CCSR space. -Creating LAW for DSP-core subsystem M2 memory Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | | | | board/bsc9131rdb: Add targets for Sysclk 100MHzPriyanka Jain2013-06-20-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BSC9131RDB supports Sysclk -66MHz if jumper J16 is close (default state) -100MHz if jumper J16 is open Add targets -BSC9131RDB_NAND_SYSCLK100 : for NAND boot at Sysclk 100MHz -BSC9131RDB_SPIFLASH_SYSCLK100: for SPI boot at Sysclk 100MHz Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | | | | board/bsc9132qds:Add NAND boot support using new SPL formatPrabhakar Kushwaha2013-06-20-6/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Add NAND boot target - defines constants - Add spl_minimal.c to initialise DDR - update TLB, LAW entries as per NAND boot Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | | | | board/bsc9131rdb:Add NAND boot support using new SPL formatPrabhakar Kushwaha2013-06-20-11/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Add NAND boot target - defines constants - Add spl_minimal.c to initialise DDR - update TLB entries as per NAND boot Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | | | | board/p1010rdb:Add NAND boot support using new SPL formatPrabhakar Kushwaha2013-06-20-31/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - defines constants - Add spl_minimal.c to initialise DDR - update TLB entries as per NAND boot - remove nand_spl support for P1010RDB Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | | | | powerpc/mpc85xx:No NOR boot, do not compile IFC errata A003399Prabhakar Kushwaha2013-06-20-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | IFC errata A003399 is valid for IFC NOR boot i.e.if no on-board NOR flash or no NOR boot, do not compile its workaround. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | | | | Merge branch 'master' of git://www.denx.de/git/u-boot-mmcTom Rini2013-06-14-8/+8
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| * | | | | ARM: tegra: make use of negative ENV_OFFSET on NVIDIA boardsStephen Warren2013-06-13-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use a negative value of CONFIG_ENV_OFFSET for all NVIDIA reference boards that store the U-Boot environment in the 2nd eMMC boot partition. This makes U-Boot agnostic to the size of the eMMC boot partition, which can vary depending on which eMMC device was actually stuffed into the board. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | | | | | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-06-13-292/+693
|\ \ \ \ \ \ | |/ / / / / |/| / / / / | |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | Small conflict over DRA7XX updates and adding SRAM_SCRATCH_SPACE_ADDR Conflicts: arch/arm/include/asm/arch-omap5/omap.h Signed-off-by: Tom Rini <trini@ti.com>
| * | | | arm: pxa: Add support for ICP DAS LP-8x4xSergey Yanovich2013-06-12-0/+262
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LP-8x4x is a programmable automation controller by ICP DAS. It is shipped with outdated U-Boot v1.3.0 This patch adds enough supports to boot the board: - 128M of 128M SDRAM - 32M of 48M NOR Flash memory - 1 of 4 Serial consoles (PXA FFUART) - 2 of 2 Ethernet controllers (DM9000) Signed-off-by: Sergey Yanovich <ynvich@gmail.com> Series-to: u-boot Series-cc: marex
| * | | | arm: da830: moved pinmux configurations to the arch treeVishwanathrao Badarkhe, Manish2013-06-10-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move pinmux configurations for the DA830 SoCs from board file to the arch tree so that it can be used for all da830 based devices. Also, avoids duplicate pinmuxing in case of NAND. Signed-off-by: Vishwanathrao Badarkhe, Manish <manishv.b@ti.com> Reviewed-by: Tom Rini <trini@ti.com> Acked-by: Christian Riesch <christian.riesch@omicron.at>
| * | | | arm: Remove OMAP2420H4 and all omap24xx supportTom Rini2013-06-10-264/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The omap2420H4 was the only mainline omap24xx board. Prior to being fixed by Jon Hunter in time for v2013.04 it had been functionally broken for a very long time. Remove this board as there's not been interest in it in U-Boot for quite a long time. Signed-off-by: Tom Rini <trini@ti.com>
| * | | | da830: add MMC supportVishwanathrao Badarkhe, Manish2013-06-10-2/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add MMC support for da830 boards in order to perform mmc operations(read,write and erase). Signed-off-by: Vishwanathrao Badarkhe, Manish <manishv.b@ti.com>
| * | | | ARM: DRA7xx: clocks: Update PLL valuesLokesh Vutla2013-06-10-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update PLL values. SYS_CLKSEL value for 20MHz is changed to 2. In other platforms SYS_CLKSEL value 2 represents reserved. But in sys_clk array ind 1 is used for 13Mhz. Since other platforms are not using 13Mhz, reusing index 1 for 20MHz. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com>
| * | | | mmc: omap_hsmmc: Update pbias programmingBalaji T K2013-06-10-5/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update pbias programming sequence for OMAP5 ES2.0/DRA7 Signed-off-by: Balaji T K <balajitk@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * | | | ARM: DRA7xx: Correct the SYS_CLK to 20MHZSricharan R2013-06-10-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sys_clk on the dra evm board is 20MHZ. Changing the configuration for the same. And also moving V_SCLK, V_OSCK defines to arch/clock.h for OMAP4+ boards. Signed-off-by: Sricharan R <r.sricharan@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * | | | ARM: DRA7xx: Change the Debug UART to UART1Sricharan R2013-06-10-4/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Serial UART is connected to UART1. So add the change for the same. Signed-off-by: Sricharan R <r.sricharan@ti.com>
| * | | | ARM: DRA7xx: Add control id code for DRA7xxLokesh Vutla2013-06-10-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The registers that are used for device identification are changed from OMAP5 to DRA7xx. Using the correct registers for DRA7xx. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * | | | Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2013-06-08-9/+394
| |\ \ \ \ | | | |_|/ | | |/| | | | | | | | | | | | Conflicts: drivers/serial/Makefile
| | * | | ARM: imx: Fix incorrect usage of CONFIG_SYS_MMC_ENV_PARTFabio Estevam2013-06-06-7/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When running the "save" command several times on a mx6qsabresd we see: U-Boot > save Saving Environment to MMC... Writing to MMC(1)... done U-Boot > save Saving Environment to MMC... MMC partition switch failed U-Boot > save Saving Environment to MMC... Writing to MMC(1)... done U-Boot > save Saving Environment to MMC... MMC partition switch failed U-Boot > save Saving Environment to MMC... Writing to MMC(1)... done U-Boot > save Saving Environment to MMC... MMC partition switch failed This issue is caused by the incorrect usage of CONFIG_SYS_MMC_ENV_PART. CONFIG_SYS_MMC_ENV_PART should be used to specify the mmc partition that stores the environment variables. On some imx boards it is been incorrectly used to pass the partition of kernel and dtb files for the 'mmcpart' script variable. Remove the CONFIG_SYS_MMC_ENV_PART usage and configure the 'mmcpart' variable directly. Reported-by: Jason Liu <r64343@freescale.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Jason Liu <r64343@freescale.com>
| | * | | Add support for Congatec Conga-QEVAl boardSARTRE Leo2013-06-04-0/+194
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add minimal support (only boot from mmc device) for the Congatec Conga-QEVAl Evaluation Carrier Board with conga-Qmx6q (i.MX6 Quad processor) module. Signed-off-by: Leo Sartre <lsartre@adeneo-embedded.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
| | * | | wandboard: Add Boot Splash image with Wandboard logoOtavio Salvador2013-06-03-0/+2
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
| | * | | wandboard: Enable HDMI splashscreenFabio Estevam2013-06-03-1/+14
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| | * | | mx6qsabreauto: Add i2c to mx6qsabreauto boardRenato Frias2013-06-03-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add i2c2 and 3 to mx6qsabreauto board, i2c3 is multiplexed use gpio to set steering. Signed-off-by: Renato Frias <b13784@freescale.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
| | * | | mx6slevk: Allow booting a device tree kernelFabio Estevam2013-06-03-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the mx6slevk board support was added in U-boot there was no device tree support for mx6sl, so only a FSL 3.0.35 was tested at that time. Now that mx6slevk support is available we can boot a device tree kernel, by adjusting CONFIG_LOADADDR into a proper location, so that a non-dt and a dt kernels can be booted. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| | * | | arm: vf610: Add basic support for Vybrid VF610TWR boardAlison Wang2013-06-03-0/+140
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | VF610TWR is a board based on Vybrid VF610 SoC. This patch adds basic support for Vybrid VF610TWR board. Signed-off-by: Alison Wang <b18965@freescale.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| | * | | mx23evk: Add splash screen supportFabio Estevam2013-05-16-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable display support. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| | * | | mx28evk: Add splash screen supportFabio Estevam2013-05-16-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable display support. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* | | | | ppc: ppmc7xx: Fix possible out-of-bound accessMarek Vasut2013-06-11-1/+1
| |_|_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The flash_info_t->start[] field is limited in size by CONFIG_SYS_MAX_FLASH_SECT macro, which is set to 19 for this board in the board config file. If we inspect the board/ppmc7xx/flash.c closely, especially the flash_get_size() function, we can notice the "switch ((long)flashtest)" at around line 80 having a few results which will set flash_info_t->sector_count to value higher than 19, for example "case AMD_ID_LV640U" will set it to 128. Notice that right underneath, iteration over flash_info_t->start[] happens and the upper bound for the interation is flash_info_t->sector_count. Now if the sector_count is 128 as it is for the AMD_ID_LV640U case, but the CONFIG_SYS_MAX_FLASH_SECT limiting the start[] is only 19, an access past the start[] array much happen. Moreover, during this iteration, the field is written to, so memory corruption is inevitable. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Richard Danter <richard.danter@windriver.com>
* | | | pci: introduce CONFIG_PCI_INDIRECT_BRIDGE optionGabor Juhos2013-06-07-0/+138
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pci_indirect.c file is always compiled when CONFIG_PCI is defined although the indirect PCI bridge support is not needed by every board. Introduce a new CONFIG_PCI_INDIRECT_BRIDGE config option and only compile indirect PCI bridge support if this options is enabled. Also add the new option into the configuration files of the boards which needs that. Compile tested for powerpc, x86, arm and nds32. MAKEALL results: powerpc: --------------------- SUMMARY ---------------------------- Boards compiled: 641 Boards with warnings but no errors: 2 ( ELPPC MPC8323ERDB ) ---------------------------------------------------------- Note: the warnings for ELPPC and MPC8323ERDB are present even without the actual patch. x86: --------------------- SUMMARY ---------------------------- Boards compiled: 1 ---------------------------------------------------------- arm: --------------------- SUMMARY ---------------------------- Boards compiled: 311 ---------------------------------------------------------- nds32: --------------------- SUMMARY ---------------------------- Boards compiled: 3 ---------------------------------------------------------- Cc: Tom Rini <trini@ti.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
* | | | am335x: enable falcon boot mode for mmc (raw and fat) and nandPeter Korsgaard2013-06-07-3/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Jump into full u-boot mode if a 'c' character is received on the uart. We need to adjust the spl bss/malloc area to not overlap with the loadaddr of the kernel (sdram + 32k), so move it past u-boot instead. For raw mmc, we store the kernel parameter area in the free space after the MBR (if used). For nand, we use the last sector of the partition reserved for u-boot. This also enables the spl command in the full u-boot so the kernel parameter area snapshot can be created. Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
* | | | devkit8000: Add SPL_OS for MMC supportTom Rini2013-06-07-0/+8
| | | | | | | | | | | | | | | | Signed-off-by: Tom Rini <trini@ti.com>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-videoTom Rini2013-06-07-0/+2
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| * | | | ARM: bcm2835: add simplefb DT node during bootz/mStephen Warren2013-06-05-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a DT simple-framebuffer node to DT when booting the Linux kernel. This will allow the kernel to inherit the framebuffer configuration from U-Boot, and display a graphical boot console, and even run a full SW- rendered X server. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Simon Glass <sjg@chromium.org>
* | | | | am33xx/omap4+: Move SRAM_SCRATCH_SPACE_ADDR to <asm/arch/omap.h>Tom Rini2013-06-06-9/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The location of valid scratch space is dependent on SoC, so move that there. On OMAP4+ we continue to use SRAM_SCRATCH_SPACE_ADDR. On am33xx/ti814x we want to use what the ROM defines as "public stack" which is the area after our defined download image space. Correct the comment about and location of CONFIG_SPL_TEXT_BASE. Signed-off-by: Tom Rini <trini@ti.com>
* | | | | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-06-05-6/+24
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| * | | | am33xx: Correct NON_SECURE_SRAM_START/ENDTom Rini2013-06-04-6/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Prior to Sricharan's cleanup of the boot parameter saving code, we did not make use of NON_SECURE_SRAM_START on am33xx, so it wasn't a problem that the address was pointing to the middle of our running SPL. Correct to point to the base location of the download image area. Increase CONFIG_SPL_TEXT_BASE to account for this scratch area being used. As part of correcting these tests, make use of the fact that we've always been placing our stack outside of the download image area (which is fine, once the downloaded image is run, ROM is gone) so correct the max size test to be the ROM defined top of the download area to where we link/load at. Signed-off-by: Tom Rini <trini@ti.com> --- Changes in v2: - Fix typo noted by Peter Korsgaard
* | | | | Merge branch 'tpm' of git://git.denx.de/u-boot-x86Tom Rini2013-06-05-4/+5
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