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* SPD823TS: do not define CONFIG_CMD_ENVMike Frysinger2009-01-28-0/+1
| | | | | | | | | | | | | Since the SPD823TS board does not actually have any writable flash to save its environment, undefine CONFIG_CMD_ENV so the "saveenv" command is disabled. This fixes the build error: common/libcommon.a(cmd_nvedit.o): In function `do_saveenv': common/cmd_nvedit.c:557: undefined reference to `saveenv' make: *** [u-boot] Error 1 Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Merge branch 'master' of git://git.denx.de/u-boot-usbWolfgang Denk2009-01-28-14/+18
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| * usb : musb : Enabling USB MSC support for DM6446 (TI DaVinci) platformThomas Abraham2009-01-28-0/+18
| | | | | | | | | | | | | | | | | | | | | | Enabling USB MSC support for DM6446 (TI DaVinci) platform in the configuration file. Signed-off-by: Ravi Babu <ravibabu@ti.com> Signed-off-by: Swaminathan S <swami.iyer@ti.com> Signed-off-by: Thomas Abraham <t-abraham@ti.com> Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com> Signed-off-by: Remy Bohmer <linux@bohmer.net>
| * usb.h: use standard __LITTLE_ENDIAN from Linux headersMike Frysinger2009-01-28-14/+0
| | | | | | | | | | | | | | | | | | Rather than forcing people to define a custom "LITTLEENDIAN", just use the __LITTLE_ENDIAN one from the Linux byteorder headers that every arch is already setting up. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Remy Bohmer <linux@bohmer.net>
* | Blackfin: overhaul i2c driverMike Frysinger2009-01-28-41/+6
|/ | | | | | | | | | | The current Blackfin i2c driver does not work properly with certain devices due to it breaking up transfers incorrectly. This is a rewrite of the driver and relocates it to the newer place in the source tree. Also remove duplicated I2C speed defines in Blackfin board configs and disable I2C slave address usage since it isn't implemented. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Merge branch 'master' of git://git.denx.de/u-boot-mipsWolfgang Denk2009-01-27-0/+340
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| * MIPS: Add VCT board series support (Part 2/3)Stefan Roese2009-01-27-0/+340
| | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Remove CONFIG_SYS_IGNORE_405_UART_ERRATA_59 from config filesMatthias Fuchs2009-01-26-24/+0
| | | | | | | | | | | | | | | | | | Lot's of 405 board config files use CONFIG_SYS_IGNORE_405_UART_ERRATA_59. Either they define or undef it. Because it's not used in any source files this patch removes any references to it. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Add GDsys PowerPC 440 ETX board support.Dirk Eibach2009-01-26-0/+194
|/ | | | | | | | Board support for the Guntermann & Drunck PowerPC 440 ETX module. Based on the AMCC Yosemite board support by Stefan Roese. Signed-off-by: Dirk Eibach <eibach@gdsys.de> Signed-off-by: Stefan Roese <sr@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2009-01-24-105/+209
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| * 85xx: Add a 36-bit physical configuration for MPC8572DSKumar Gala2009-01-23-1/+46
| | | | | | | | | | | | | | We move all IO addressed (CCSR, localbus, PCI) above the 4G boundary to allow for larger memory sizes. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * 85xx: Handle eLBC difference w/36-bit physicalKumar Gala2009-01-23-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | The eLBC only handles 32-bit physical address in systems with 36-bit physical. The previos generation of LBC handled 34-bit physical address in 36-bit systems. Added a new CONFIG option to convey the difference between the LBC and eLBC. Also added defines for XAM bits used in LBC for the extended 34-bit support. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * 85xx: Use BR_ADDR macro for NAND chipselectsKumar Gala2009-01-23-8/+8
| | | | | | | | | | | | | | | | | | Use the new BR_ADDR macro to properly setup the address field of the localbus chipselects used by NAND. This allows us to deal with 36-bit phys on these boards in the future. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * 85xx: Introduce CONFIG_SYS_PCI*_IO_VIRT for FSL boardsKumar Gala2009-01-23-6/+28
| | | | | | | | | | | | | | | | | | Introduce a new define to seperate out the virtual address that PCI IO space is at from the physical address. In most situations these are mapped 1:1. However any code accessing the bus should use VIRT. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Andy Fleming <afleming@freescale.com>
| * 85xx: Introduce CONFIG_SYS_PCI*_MEM_VIRT for FSL boardsKumar Gala2009-01-23-26/+56
| | | | | | | | | | | | | | | | | | Introduce a new define to seperate out the virtual address that PCI memory is at from the physical address. In most situations these are mapped 1:1. However any code accessing the bus should use VIRT. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Andy Fleming <afleming@freescale.com>
| * 85xx: Use CONFIG_SYS_{PCI*,RIO*}_MEM_PHYS for physical address on FSL boardsKumar Gala2009-01-23-0/+1
| | | | | | | | | | | | | | | | Use the _MEM_PHYS defines instead of _MEM_BUS for LAW and real address fields of TLBs. This is what we should have always been using from the start. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Andy Fleming <afleming@freescale.com>
| * 85xx: Convert CONFIG_SYS_PCI*_IO_BASE to _IO_BUS for FSL boardsKumar Gala2009-01-23-28/+28
| | | | | | | | | | | | | | Use CONFIG_SYS_PCI*_IO_BUS for the bus relative address instead of _IO_BASE so we are more explicit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * 85xx: Convert CONFIG_SYS_{PCI*,RIO*}_MEM_BASE to _MEM_BUS for FSL boardsKumar Gala2009-01-23-52/+52
| | | | | | | | | | | | | | | | Use CONFIG_SYS_{PCI,RIO}_MEM_BUS for the bus relative address instead of _MEM_BASE so we are more explicit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Andy Fleming <afleming@freescale.com>
| * 85xx: separate FLASH BASE virtual from physical addressKumar Gala2009-01-23-8/+10
| | | | | | | | | | | | | | | | | | | | Added a CONFIG_SYS_FLASH_BASE_PHYS for use as the physical address and maintain CONFIG_SYS_FLASH_BASE as the virtual address of the flash. This allows us to deal with 36-bit phys on these boards in the future. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Andy Fleming <afleming@freescale.com>
| * 85xx: separate PIXIS virtual from physical addressKumar Gala2009-01-23-2/+4
| | | | | | | | | | | | | | | | | | | | Added a PIXIS_BASE_PHYS for use as the physical address and maintain PIXIS_BASE as the virtual address of the PIXIS fpga registers. This allows us to deal with 36-bit phys on these boards in the future. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Andy Fleming <afleming@freescale.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxWolfgang Denk2009-01-24-0/+586
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| * \ Merge branch 'next'Kim Phillips2009-01-23-119/+1160
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| | * mpc83xx: New board support for SIMPC8313Ron Madrid2009-01-23-0/+544
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch will create a new board, SIMPC8313, from Sheldon Instruments. This board boots from NAND devices and is configureable for either large or small page devices. The board supports non-soldered DDR2, one ethernet port, a Marvell 88E1118 PHY, and PCI host support. The board also has a FPGA connected to the eLBC providing glue logic to a TMS320C67xx DSP. Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| | * mpc83xx: Add PCI-E support for MPC837XEMDS boardsAnton Vorontsov2009-01-21-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MPC837XEMDS boards can support PCI-E via "PCI-E riser card". The card provides two PCI-E (x2) ports. Though, only one port can be used in x2 mode. Two ports can function simultaneously in x1 mode. PCI-E x1/x2 modes can be switched via "pex_x2" environment variable. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| | * mpc83xx: Add PCI-E support for MPC8315ERDB boardsAnton Vorontsov2009-01-21-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | MPC8315ERDB boards features PCI-E x1 and Mini PCI-E x1 ports. Let's support them. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| | * Merge branch 'master' into nextKim Phillips2009-01-21-574/+1516
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| | * | powerpc, keymile boards: extract identical config optionsHeiko Schocher2008-11-24-216/+120
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch extracts the identical config options for the keymile boards mgcoge, mgsuvd and kmeter1 in a new common config file keymile-common.h. Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| | * | powerpc: keymile: Add a check for the PIGGY debug boardHeiko Schocher2008-11-24-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Check the presence of the PIGGY on the keymile boards mgcoge, mgsuvd and kmeter1. If the PIGGY is not present, dont register this Ethernet device. Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| | * | powerpc: 83xx: add support for the kmeter1 boardHeiko Schocher2008-11-20-0/+523
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the kmeter1 board from Keymile, based on a Freescale MPC8360 CPU. - serial console on UART 1 - 256 MB DDR2 RAM - 64 MB NOR Flash - Ethernet RMII Mode over UCC4 - PHY SMSC LAN8700 Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | | Removed all references to CONFIG_SYS_RESET_GENERICGraeme Russ2009-01-24-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | Generic i386 reset - #define made redundant by weak function Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* | | | Added initial eNET board supportGraeme Russ2009-01-24-0/+249
| | | | | | | | | | | | | | | | Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* | | | powerpc, keymile boards: extract identical config optionsHeiko Schocher2009-01-24-216/+120
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch extracts the identical config options for the keymile boards mgcoge, mgsuvd and kmeter1 in a new common config file keymile-common.h. Signed-off-by: Heiko Schocher <hs@denx.de>
* | | | powerpc: keymile: Add a check for the PIGGY debug boardHeiko Schocher2009-01-24-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Check the presence of the PIGGY on the keymile boards mgcoge, mgsuvd and kmeter1. If the PIGGY is not present, dont register this Ethernet device. Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Ben Warren <biggerbadderben@gmail.com>
* | | | powerpc: 83xx: add support for the kmeter1 boardHeiko Schocher2009-01-24-0/+523
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the kmeter1 board from Keymile, based on a Freescale MPC8360 CPU. - serial console on UART 1 - 256 MB DDR2 RAM - 64 MB NOR Flash - Ethernet RMII Mode over UCC4 - PHY SMSC LAN8700 Signed-off-by: Heiko Schocher <hs@denx.de>
* | | Merge branch 'master' of git://git.denx.de/u-boot-nand-flashWolfgang Denk2009-01-23-65/+6
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| * | | NAND: rename NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPSWolfgang Grandegger2009-01-23-61/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch renames NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS and changes the default from 8 to 1 for the legacy and the new MTD NAND layer. This allows to remove all NAND_MAX_CHIPS definitions in the board config files because none of the boards use multi chip support (NAND_MAX_CHIPS > 1) so far. The bamboo and the DU440 define #define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE but that's bogus and did not work anyhow. Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | | mpc83xx: enable eLBC NAND support for MPC8315ERDB boardDave Liu2009-01-23-5/+7
| | |/ | |/| | | | | | | Signed-off-by: Dave Liu <daveliu@freescale.com>
* | | microblaze: Add cache flushMichal Simek2009-01-23-1/+18
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* | | microblaze: Change microblaze-generic config fileMichal Simek2009-01-23-47/+52
| | | | | | | | | | | | Signed-off-by: Michal Simek <monstr@monstr.eu>
* | | microblaze: Rename ml401 to microblaze-genericMichal Simek2009-01-23-2/+1
|/ / | | | | | | Signed-off-by: Michal Simek <monstr@monstr.eu>
* | ppc4xx: Add loadpci command to esd's CPCI4052 and CPCI405AB boardsMatthias Fuchs2009-01-14-0/+5
| | | | | | | | | | | | | | | | This patch adds esd's loadpci BSP command to CPCI4052 and CPCI405AB board. This requires CONFIG_CMD_BSP and CONFIG_PRAM. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2009-01-14-0/+1
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| * | Some changes of TLB entry setting for MPC8572DSHaiying Wang2009-01-13-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Move the TLB entry of PIXIS_BASE from TLB0 to TLB1[8], because in CAMP mode, all the TLB0 entries will be invalidated after cpu1 brings up kernel, thus cpu0 can not access PIXIS_BASE anymore (any access will cause DataTLBError exception) - Set CONFIG_SYS_DDR_TLB_START to 9 for MPC8572DS board. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
* | | mpc8610hpcd: Fix PCI mapping conceptsBecky Bruce2009-01-13-11/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | Rename _BASE to _BUS, as it's actually a PCI bus address, separate virtual and physical addresses into _VIRT and _PHYS, and use each appopriately. This makes the code easier to read and understand, and facilitates mapping changes going forward. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
* | | sbc8641d: Fix PCI mapping conceptsBecky Bruce2009-01-13-14/+18
|/ / | | | | | | | | | | | | | | | | Rename _BASE to _BUS, as it's actually a PCI bus address, separate virtual and physical addresses into _VIRT and _PHYS, and use each appopriately. This makes the code easier to read and understand, and facilitates mapping changes going forward. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
* | m501sk: move to the common memory setupJean-Christophe PLAGNIOL-VILLARD2009-01-06-0/+33
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | at91rm9200: rename lowlevel init value to CONFIG_SYS_Jean-Christophe PLAGNIOL-VILLARD2009-01-06-92/+92
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2008-12-30-16/+1139
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| * | XPedite5200 board support cleanupPeter Tyser2008-12-29-0/+546
| | | | | | | | | | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
| * | sbc8548: use proper PHY addressPaul Gortmaker2008-12-19-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | The values given for the PHY address were wrong, so the code read no valid PHY ID, and fell through to the generic PHY support, which would work on 1000M but would not auto negotiate down to 100M or 10M. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
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