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* ARM64: zynqmp: Add support for standard distro boot commandsMichal Simek2016-06-06-57/+44
| | | | | | | | | | | | | Nand and QSPI are not defined now but this will be extended. Based on selected bootmode boot_targets are rewritten. Patch also contains detection if variables are saved. If yes don't rewrite boot_targets variable. Also move variable setup to the end of file because SCSI needs to be defined before others macros are using it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Alexander Graf <agraf@suse.de>
* ARM64: zynqmp: Remove CONFIG_BOOTP_SERVERIPAlexander Graf2016-06-06-1/+0
| | | | | | | | | | | | | When the CONFIG_BOOTP_SERVERIP option is set, we ignore all dhcp values for the tftp server and use our own serverip and file name instead. This is usually not what we want and I doubt it's set for a good reason on ZynqMP. It definitely hurts if we want to support uEFI PXE boot on it. So just remove the option for now. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: Enable AHCI when CONFIG_SATA_CEVA is definedMichal Simek2016-06-06-2/+2
| | | | | | | Simplify zcu102 board file by moving CONFIG_AHCI enabling to common file. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: Add support for zc1751-dc4Michal Simek2016-06-06-0/+24
| | | | | | zc1751-dc4 contains four GEMs. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: Enable Vitesse and RealTek ethernet physMichal Simek2016-06-06-0/+2
| | | | | | Phys are available on zc1751-dc4 that's why enable them. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: Enable CMD_NAND via KconfigMichal Simek2016-06-06-1/+0
| | | | | | Simplify board file by enabling CMD_NAND via Kconfig. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini2016-06-02-7/+235
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| * arm: socfpga: improve raw MMC SPL bootSylvain Lesne2016-06-01-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | Before this patch, when booting from MMC (no filesystem), the SPL loaded U-Boot from a fixed offset. It will now load U-Boot from an offset of 256kB (which is 4 times the padded SPL image) in the third partition. This behaviour is similar to what the vendor SPL (based on U-Boot 2013.01) does, and allows to directly 'dd' the u-boot-with-spl.sfp file to the A2 partition. Signed-off-by: Sylvain Lesne <lesne@alse-fr.com>
| * arm: socfpga: Add missing ',' in CONFIG_BOOTARGSStefan Roese2016-06-01-1/+1
| | | | | | | | | | | | | | | | | | | | Somehow the sr1500 is missing this comma in the CONFIG_BOOTARGS definition. This patch adds it to. Signed-off-by: Stefan Roese <sr@denx.de> Reported-by: Pavel Machek <pavel@denx.de> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de>
| * arm: socfpga: Enable tiny printf and simple malloc in SPLMarek Vasut2016-06-01-3/+0
| | | | | | | | | | | | | | | | | | | | Enable both features to reduce the SPL size by 6 kiB. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pavel Machek <pavel@denx.de> Cc: Stefan Roese <sr@denx.de>
| * arm: socfpga: Add samtec VIN|ING boardMarek Vasut2016-06-01-0/+231
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for board based on the popular Altera Cyclone V SoC. This board has the following properties: - 1 GiB of DRAM - 1 Gigabit ethernet - 1 USB gadget port - 1 USB host port with an on-board hub - 2 QSPI NORs connected to the Cadence QSPI core - Multiple I2C EEPROMs and one I2C temperature sensor Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com> --- V2: Update the defconfig as per Tom's request
* | mips: wdr4300: Move the CONFIG_USE_PRIVATE_LIBGCC to KconfigMarek Vasut2016-06-02-2/+0
|/ | | | | | | | | | This fixes the last remaining libgcc warning, where the symbol was defined twice. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2016-05-31-60/+18
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| * mips: ath79: Use 8MB flash profile for mtd partition by defaultWills Wang2016-05-31-5/+5
| | | | | | | | | | | | Change bootm flash address and mtd partition table for 8MB flash profile. Signed-off-by: Wills Wang <wills.wang@live.com>
| * MIPS: Split I & D cache line size configPaul Burton2016-05-31-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | Allow L1 Icache & L1 Dcache line size to be specified separately, since there's no architectural mandate that they be the same. The [id]cache_line_size functions are tidied up to take advantage of the fact that the Kconfig entries are always present to simply check them for zero rather than needing to #ifdef on their presence. Signed-off-by: Paul Burton <paul.burton@imgtec.com> [removed CONFIG_SYS_CACHELINE_SIZE in include/configs/pic32mzdask.h] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * MIPS: Move cache sizes to KconfigPaul Burton2016-05-31-49/+0
| | | | | | | | | | | | | | | | | | | | | | | | Move details of the L1 cache line sizes & total sizes into Kconfig, defaulting to 0. A new CONFIG_SYS_CACHE_SIZE_AUTO Kconfig entry is introduced to allow platforms to select auto-detection of cache sizes, and it defaults to being enabled if none of the cache sizes are set by the configuration (ie. sizes are all the default 0), and code is adjusted to #ifdef on that rather than on the definition of the sizes (which will always be defined even if 0). Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * malta: Allow MIPS64 buildsPaul Burton2016-05-31-5/+13
| | | | | | | | | | | | | | | | Both real Malta boards & emulators that mimic Malta (eg. QEMU) can support MIPS64 CPUs. Allow MIPS64 builds of U-Boot for such boards, which enables the user to make use of the whole 64 bit address space. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
* | arm: spear: x600: Add support for Micrel KSZ9031 PHYStefan Roese2016-05-31-0/+2
|/ | | | | | | | As the old ethernet PHY is not available any more, the x600 board has been redesigned with the Micrel KSZ9031 PHY. This patch adds support to autodetect the PHY and configure the Micrel PHY correctly. Signed-off-by: Stefan Roese <sr@denx.de>
* Merge git://git.denx.de/u-boot-dmTom Rini2016-05-27-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | For odroid-c2 (arch-meson) for now disable designware eth as meson now needs to do some harder GPIO work. Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: lib/efi_loader/efi_disk.c Modified: configs/odroid-c2_defconfig
| * rockchip: Drop SPL GPIO support for rk3288Simon Glass2016-05-27-1/+0
| | | | | | | | | | | | This is not currently used and saves a little over 1KB of SPL image size. Signed-off-by: Simon Glass <sjg@chromium.org>
| * arm: rpi: Define CONFIG_TFTP_TSIZE to show tftp size infoSimon Glass2016-05-26-0/+1
| | | | | | | | | | | | | | | | This shows a proper progress display and the total amount of data transferred. Enable it for Raspberry Pi. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@wwwdotorg.org>
* | config: env: Set AM335x-ICEv2 board specific envLokesh Vutla2016-05-27-0/+9
| | | | | | | | | | | | | | Populate the right dtb file and console for AM335x-ICEv2 board. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | board: AM335x-ICEv2: Add cpsw supportLokesh Vutla2016-05-27-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to enable cpsw on AM335x ICEv2 board, the following needs to be done: 1)There are few on board jumper settings which gives a choice between cpsw and PRUSS, that needs to be properly selected[1]. Even after selecting this, there are few GPIOs which control these muxes that needs to be held high. 2) The clock to PHY is provided by a PLL-based clock synthesizer[2] connected via I2C. This needs to properly programmed and locked for PHY operation. And PHY needs to be reset before before being used, which is also held by a GPIO. 3) RMII mode needs to be selected. [1] http://www.ti.com/lit/zip/tidr336 [2] http://www.ti.com/lit/ds/symlink/cdce913.pdf Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | configs: am335x_evm: Switch to env on FAT SD by defaultTom Rini2016-05-27-19/+21
| | | | | | | | | | | | | | | | Re-org env sections so that we can fall back to env is in FAT on SD card, for broader board compatibility Signed-off-by: Tom Rini <trini@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | Remove unused BOOTFLAG definitionsChris Packham2016-05-27-16/+0
| | | | | | | | | | | | | | | | This follows on from commit d98b052 ("powerpc: Cleanup BOOTFLAG_* references") and commit fc3d297 ("Drop bogus BOOTFLAG_* definitions"). Remove the definitions that have crept in since. Signed-off-by: Chris Packham <judge.packham@gmail.com>
* | ti_omap5_common: Update SPL start address on secure partsDaniel Allred2016-05-27-5/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Updated the CONFIG_SPL_TEXT_BASE to support secure parts (moving the start address past secure reserved memory and the size of the security certificate that precedes the boot image on secure devices). Updated the related CONFIG_SPL_MAX_SIZE to properly reflect the internal memory actually available on the various device flavors (Common minimum internal RAM guaranteed for various flavors of DRA7xx/AM57xx is 512KB). Signed-off-by: Daniel Allred <d-allred@ti.com> Signed-off-by: Madan Srinivas <madans@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ti: AM43xx: board: Detect AM43xx HS EVMMadan Srinivas2016-05-27-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds code to detect AM43xx HS EVMS - the string in the I2C EEPROM for HS EVMs differs from GP EVMs. Adds code to for evm detection, regardless of whether the evm is for GP or HS parts, and updates board init to use that. Modifies findfdt command to pick up am437x-gp-evm.dtb for the HS EVMs also, as the boards are similar except for some security specific changes around power supply and enclosure protection. Signed-off-by: Madan Srinivas <madans@ti.com> Signed-off-by: Daniel Allred <d-allred@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ti: AM43xx: Use CONFIG options from SOC KconfigMadan Srinivas2016-05-27-12/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Updates configs/am43xx_evm.h to use CONFIG options from SOC specific Kconfig file for various calculations. On AM43x devices, the address of SPL entry point depends on the device type, i.e. whether it is secure or non-secure. Further, for non-secure devices, the SPL entry point is different between USB HOST boot mode, other "memory" boot modes (MMC, NAND) and "peripheral" boot modes (UART, USB) To add to the complexity, on secure devices, in addition to the above differences, the SPL entry point can change because of the space occupied by other components (other than u-boot or spl) that go into a secure boot image. To prevent the user from having to modify source files every time any component of the secure image changes, the value of CONFIG_SPL_TEXT_BASE has been set using a Kconfig option that is supplied in the am43xx_*_defconfig files Using the CONFIG options also enables us to do away with some compile time flags that were used to specify CONFIG_SPL_TEXT_BASE for different boot modes. On QSPI devices, the same problem described above occurs w.r.t. the address of the u-boot entry point in flash, when booting secure devices. To handle this, CONFIG_SYS_TEXT_BASE is also setup via a Kconfig option and the defconfig files. Signed-off-by: Madan Srinivas <madans@ti.com> Signed-off-by: Daniel Allred <d-allred@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | arm: Kconfig: Add support for AM43xx SoC specific KconfigMadan Srinivas2016-05-27-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adding support for AM43xx secure devices require the addition of some SOC specific config options like the amount of memory used by public ROM and the address of the entry point of u-boot or SPL, as seen by the ROM code, for the image to be built correctly. This mandates the addition of am AM43xx CONFIG option and the ARM Kconfig file has been modified to source this SOC Kconfig file. Moving the TARGET_AM43XX_EVM config option to the SOC KConfig and out of the arch/arm/Kconfig. Updating defconfigs to add the CONFIG_AM43XX=y statement and removing the #define CONFIG_AM43XX from the header file. Signed-off-by: Madan Srinivas <madans@ti.com> Signed-off-by: Daniel Allred <d-allred@ti.com> Tested-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | Drop references to CONFIG_SYS_GENERIC_BOARD in config filesSimon Glass2016-05-27-7/+0
| | | | | | | | | | | | This option is no longer used so need not be enabled. Signed-off-by: Simon Glass <sjg@chromium.org>
* | openrisc: Drop the arch-specific board initSimon Glass2016-05-27-0/+1
| | | | | | | | | | | | | | | | | | It is well past the deadline for conversion to generic board init. Remove the old code. Stefan, can you test this please and perhaps send a follow-up patch if needed? Signed-off-by: Simon Glass <sjg@chromium.org>
* | arm: add initial support for Amlogic Meson and ODROID-C2Beniamino Galvani2016-05-27-0/+51
| | | | | | | | | | | | | | | | | | | | | | | | This adds platform code for the Amlogic Meson GXBaby (S905) SoC and a board definition for ODROID-C2. This initial submission only supports UART and Ethernet (through the existing Designware driver). DTS files are the ones submitted to Linux arm-soc for 4.7 [1]. [1] https://patchwork.ozlabs.org/patch/603583/ Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | net: Fix client identifiers for ARMAlexander Graf2016-05-27-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | There are client identifiers specifically reserved for ARM U-Boot according to http://www.ietf.org/assignments/dhcpv6-parameters/dhcpv6-parameters.xml#processor-architecture. So let's actually make use of them rather than the bogus 0x100 that we emitted so far. Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Tom Rini <trini@konsulko.com> [trini: Drop the Xilinx define to 0x100 as it's not the correct value to use]. Signed-off-by: Tom Rini <trini@konsulko.com>
* | net: Move the VCI and client arch values to KconfigAlexander Graf2016-05-27-9/+0
|/ | | | | | | | | | | | | We have a bunch of boards that define their vendor class identifier and client archs in the board files or in the distro config. Move everything to the generic Kconfig options. We're missing the distinction between i386 and x86_64, as I couldn't find any config variable that would tell us the difference. Is that really important to people? I guess not, so I left it out. Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2016-05-25-30/+1
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| * MIPS: Move CONFIG_SYS_TEXT_BASE to KconfigPaul Burton2016-05-26-23/+0
| | | | | | | | | | | | | | | | | | Move CONFIG_SYS_TEXT_BASE to Kconfig, and add default values in board Kconfig files matching what was present in their config headers. This will make it cleaner to conditionalise the value for Malta based on 32 vs 64 bit builds. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * malta: Use device model & tree for UARTPaul Burton2016-05-26-6/+0
| | | | | | | | | | | | | | | | | | | | | | Make use of device model & device tree to probe the UART driver. This is the initial step in bringing Malta up to date with driver model, and allows for cleaner handling of the different I/O addresses for different system controllers by specifying the ISA bus address instead of a translated memory address. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * malta: Tidy up UART address selectionPaul Burton2016-05-26-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | The address of the UART differs based upon the system controller because it's actually within the I/O port region, which is in a different location for each system controller. Rather than handling this as 2 UARTs with the correct one selected at runtime, use I/O port accessors for the UART such that access to it gets translated into the I/O port region automatically. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* | Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2016-05-25-6/+24
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| * | arm64: sunxi: adjust default load addressesAndre Przywara2016-05-25-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As arm64 has slightly different expectations about load addresses, lets use a different set of default addresses for things like the kernel. As arm64 kernels don't come with a decompressor right now, reserve some more space for really big uncompressed kernels. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * | sunxi: Increase SPL header size to 64 bytes to avoid code corruptionSiarhei Siamashka2016-05-25-6/+6
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current SPL header, created by the 'mksunxiboot' tool, has size 32 bytes. But the code in the boot ROM stores the information about the boot media at the offset 0x28 before passing control to the SPL. For example, when booting from the SD card, the magic number written by the boot ROM is 0. And when booting from the SPI flash, the magic number is 3. NAND and eMMC probably have their own special magic numbers too. Currently the corrupted byte is a part of one of the instructions in the reset vectors table: b reset ldr pc, _undefined_instruction ldr pc, _software_interrupt <- Corruption happens here ldr pc, _prefetch_abort ldr pc, _data_abort ldr pc, _not_used ldr pc, _irq ldr pc, _fiq In practice this does not cause any visible problems, but it's still better to fix it. As a bonus, the reported boot media type can be later used in the 'spl_boot_device' function, but this is out of the scope of this patch. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-uniphierTom Rini2016-05-25-1/+11
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| * | ARM: uniphier: add PH1-LD11 SoC supportMasahiro Yamada2016-05-26-1/+11
| |/ | | | | | | | | | | This is a low-cost ARMv8 SoC from Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2016-05-25-0/+4
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| * powerpc/t2080qds: Enable qixis commands to reboot from NAND and SDYork Sun2016-05-19-0/+4
| | | | | | | | | | Signed-off-by: York Sun <york.sun@nxp.com> CC: Shengzhou Liu <Shengzhou.Liu@nxp.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-05-24-2/+37
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| * | armv8: ls1043ardb: enable scsi command and pcie to sata converterPo Liu2016-05-18-0/+21
| | | | | | | | | | | | | | | | | | | | | Enable scsi command and pcie to sata chip 88SE9170. Signed-off-by: Po Liu <po.liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | armv8: ls1043ardb: invert irq pin polarity for AQR105 PHYShaohui Xie2016-05-18-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | To use AQR105 PHY's interrupt, we need to invert the IRQ pin polarity by setting relative bit in SCFG_INTPCR register, because AQR105 interrupt is low active but GIC accepts high active. Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | armv8: ls1043a: copy kernel from QSPI when booting with QSPI enabledQianyu Gong2016-05-18-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | IFC won't be initialized in U-Boot if QSPI is enabled on LS1043AQDS. So this patch could fix 'sync abort' caused by autoboot that tries to access IFC address. Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | armv8: ls2080a: update eth primePrabhakar Kushwaha2016-05-18-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | As per new PHY framework, DPNI naming convetion is no more used. Use new naming convention. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
generated by cgit v1.1 at 2024-11-09 05:40:10 +0000