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* rmobile: armadillo-800eva: Remove CONFIG_SYS_NO_L2CACHENobuhiro Iwamatsu2012-10-03-1/+0
| | | | | | | armadillo-800eva needs this config. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* rmobile: armadillo-800eva: Add Support NFS and BOOTZ commandNobuhiro Iwamatsu2012-10-03-0/+2
| | | | | Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* rmobile: armadillo-800eva: Add Support CONFIG_OF_LIBFDTNobuhiro Iwamatsu2012-10-03-0/+2
| | | | | Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: Add support for ATMARK-TECHNO Armadillo-800EVA boardHideyuki Sano2012-10-03-0/+157
| | | | | | | | | | | | | | The Armadillo-800EVA board has Renesas R-Mobile R8A7740, 512MB DDR3-SDRAM, Ethernet, and more. This patch supports the following functions: - 512MB DDR3-SDRAM - Serial console (SCIF) - Ethernet MAC(MII) & PHY(SMSC) Signed-off-by: Hideyuki Sano <hideyuki.sano.dn@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: kzm9g: Add CONFIG_GLOBAL_TIMER to board config fileNobuhiro Iwamatsu2012-10-03-0/+1
| | | | | | | | | | kzm9g board use global timer. But by commit 813ffda31, timer function of rmobile was changed that global timer might be used, when CONFIG_GLOBAL_TIMER was defined. This add CONFIG_GLOBAL_TIMER to board config file. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: kzm9g: remove unrelated configNobuhiro Iwamatsu2012-10-03-1/+0
| | | | | | | Remove CONFIG_ARM_CORTEXA9. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: kzm9g: Add LIBFDT supportNobuhiro Iwamatsu2012-10-03-1/+2
| | | | | Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: kzm9g: remove unrelated configTetsuyuki Kobayashi2012-10-03-2/+0
| | | | | | | Remove CONFIG_INTEGRATOR and CONFIG_ARCH_CINTEGRATOR. These are not for kzm9g. Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: kzm9g: add NFS_TIMEOUT in config fileTetsuyuki Kobayashi2012-10-03-0/+1
| | | | | | | Set NFS_TIMEOUT to 10,000 msec. Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: kzm9g: Fix CONFIG_BAUDRATE settingTetsuyuki Kobayashi2012-10-03-1/+1
| | | | | | | | | The value of CONFIG_BAUDRATE is treated as string and put as initial value of environment variable. If it begin with '(', it is wrongly parsed to 0 in number. So I removed '(' and ')'. Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: kzm9g: change prompt to board specificTetsuyuki Kobayashi2012-10-03-1/+1
| | | | | | | Change U-Boot prompt to board specific one. Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: kzm9g: Modify sdram areaTetsuyuki Kobayashi2012-10-03-2/+3
| | | | | | | Reserve first 16MB for RT-CPU (as same as kernel config). Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: Add supoprt for KMC KZM-A9-GT boardNobuhiro Iwamatsu2012-10-03-0/+168
| | | | | | | | | | | | | | | The KZM-A9-GT board has Renesas R-Mobile SH73A0, 512MB DDR2-SDRAM, USB, Ethernet, and more. This patch supports the following functions: - 512MB DDR2-SDRAM - 16MB NOR Flash memory - Serial console (SCIF) - Ethernet (SMSC) - I2C Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* omap4_panda: remove CONFIG_PANDA, not usedPeter Meerwald2012-10-01-1/+0
| | | | Signed-off-by: Peter Meerwald <pmeerw@pmeerw.net>
* am335x-evm config: decrease bootdelay to 1s and mount rootfs ROKoen Kooi2012-10-01-2/+2
| | | | | | | | | | | A fast boot is important to the beaglebone, so save 2 seconds here by decreasing bootdelay. This is still plenty time to break into the prompt, I do that at least once a day. Mount the rootfs RO by default, this is needed to make fsck succeed without resorting to an initramfs. Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
* am335x_evm: enable networking in SPLIlya Yanok2012-10-01-1/+4
| | | | | | | | This patch adds support for networking in SPL on TI AM335x based boards. Vendor Class Identifier used by SPL during BOOTP is "AM335x U-Boot SPL". Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* davinci: ea20: add some configs and default environmet variablesBastian Ruppert2012-10-01-40/+66
| | | | | | Signed-off-by: Bastian Ruppert <Bastian.Ruppert@Sewerin.de> CC: Tom Rini <trini@ti.com> Acked-by: Stefano Babic <sbabic@denx.de>
* davinci: ea20: the console is always set to the serial lineBastian Ruppert2012-10-01-0/+2
| | | | | | | | Do not allow to overwrite it when video is enabled. Signed-off-by: Bastian Ruppert <Bastian.Ruppert@Sewerin.de> CC: Tom Rini <trini@ti.com> Acked-by: Stefano Babic <sbabic@denx.de>
* devkit8000: add rootwait to mmcboot optionAndreas Bießmann2012-10-01-0/+1
| | | | | Signed-off-by: Andreas Bießmann <biessmann@corscience.de> cc: Thomas Weber <weber@corscience.de>
* Merge remote-tracking branch 'u-boot/master'Albert ARIBAUD2012-09-30-400/+427
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| * hawkboard: Update config file to work with common spl frameworkSughosh Ganu2012-09-27-1/+1
| | | | | | | | | | | | | | | | | | | | The common spl framework expects the u-boot payload size through CONFIG_SYS_MONITOR_LEN. Define the macro with the u-boot's size. With this change, CONFIG_SYS_NAND_U_BOOT_SIZE is no longer required. Delete the same. Signed-off-by: Tom Rini <trini@ti.com> Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
| * ARM: SPL: Convert davinci to CONFIG_SPL_FRAMEWORKTom Rini2012-09-27-5/+16
| | | | | | | | | | | | | | | | - Convert the non-relocation part of board_init_f to spl_board_init, turn on CONFIG_SPL_BOARD_INIT in the configs. - Remove duplicated code. - Add spl_boot_device() that returns the statically chosen boot device. Signed-off-by: Tom Rini <trini@ti.com>
| * SPL: Move the omap SPL framework to common/splTom Rini2012-09-27-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | Add a new flag, CONFIG_SPL_FRAMEWORK to opt into the common/spl SPL framework, enable on all of the previously using boards. We move the spl_ymodem.c portion to common/ and spl_mmc.c to drivers/mmc/. We leave the NAND one in-place as we plan to replace it later in this series. We use common/spl to avoid linker problems with respect to merging constant strings in objects. Otherwise all strings in common/ will be linked in and kept which grows SPL in size too much. Signed-off-by: Tom Rini <trini@ti.com>
| * ARM: SPL: Move gpmc_init() to spl_board_init()Tom Rini2012-09-27-0/+4
| | | | | | | | | | | | | | | | This is an OMAP/related-specific function, move calling it to spl_board_init() and turn on CONFIG_SPL_BOARD_INIT on the boards that enabled NAND and didn't enable this already. Signed-off-by: Tom Rini <trini@ti.com>
| * omap-common: SPL: Add CONFIG_SPL_DISPLAY_PRINT / spl_display_print()Tom Rini2012-09-27-0/+2
| | | | | | | | | | | | | | | | Only omap4/5 currently have a meaningful set of display text and overo had been adding a function to display nothing. Change how this works to be opt-in and only turned on for omap4/5 now. Signed-off-by: Tom Rini <trini@ti.com>
| * Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2012-09-25-106/+96
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| | * powerpc/p1_p2_rdb_pc: print -PC suffix in board nameScott Wood2012-08-23-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the -PC variants of the P1/P2 RDB boards do not print it on boot -- e.g. a P2020RDB-PC will claim to be a plain P2020RDB. Besides being incorrect, this can confuse a user into building U-Boot for P2020RDB rather than P2020RDB-PC, resulting in a board that does not boot. P1024RDB and P1025RDB are not included, as these boards apparently do not have -PC as part of their name, even though they are supported by p1_p2_rdb_pc. The P2020RDB variant covered by this is apparently P2020RDB-PCA rather than P2020RDB-PC. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| | * powerpc/fsl-corenet: remove dead variant symbolsScott Wood2012-08-23-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These are not supported as individual build targets, but instead are supported by another target. The dead p4040 defines in particular had bitrotted significantly. Signed-off-by: Scott Wood <scottwood@freescale.com> Acked-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andy Fleming <afleming@freescale.com>
| | * powerpc/85xx: remove support for the Freescale P3060Timur Tabi2012-08-23-53/+1
| | | | | | | | | | | | | | | | | | | | | | | | The P3060 was cancelled before it went into production, so there's no point in supporting it. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| | * powerpc/CoreNet: add tool to support pbl image build.Shaohui Xie2012-08-23-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Provides a tool to build boot Image for PBL(Pre boot loader) which is used on Freescale CoreNet SoCs, PBL can be used to load some instructions and/or data for pre-initialization. The default output image is u-boot.pbl, for more details please refer to doc/README.pblimage. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| | * powerpc/corenet_ds: Slave module for boot from PCIELiu Gang2012-08-23-28/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When boot from PCIE, slave's core should be in holdoff after powered on for some specific requirements. Master will release the slave's core at the right time by PCIE interface. Slave's ucode and ENV can be stored in master's memory space, then slave can fetch them through PCIE interface. For the corenet platform, ucode is for Fman. NOTE: Because the slave can not erase, write master's NOR flash by PCIE interface, so it can not modify the ENV parameters stored in master's NOR flash using "saveenv" or other commands. environment and requirement: master: 1. NOR flash for its own u-boot image, ucode and ENV space. 2. Slave's u-boot image is in master NOR flash. 3. Put the slave's ucode and ENV into it's own memory space. 4. Normally boot from local NOR flash. 5. Configure PCIE system if needed. slave: 1. Just has EEPROM for RCW. No flash for u-boot image, ucode and ENV. 2. Boot location should be set to one PCIE interface by RCW. 3. RCW should configure the SerDes, PCIE interfaces correctly. 4. Must set all the cores in holdoff by RCW. 5. Must be powered on before master's boot. For the slave module, need to finish these processes: 1. Set the boot location to one PCIE interface by RCW. 2. Set a specific TLB entry for the boot process. 3. Set a LAW entry with the TargetID of one PCIE for the boot. 4. Set a specific TLB entry in order to fetch ucode and ENV from master. 5. Set a LAW entry with the TargetID one of the PCIE ports for ucode and ENV. 6. Slave's u-boot image should be generated specifically by make xxxx_SRIO_PCIE_BOOT_config. This will set SYS_TEXT_BASE=0xFFF80000 and other configurations. In addition, the processes are very similar between boot from SRIO and boot from PCIE. Some configurations like the address spaces can be set to the same. So the module of boot from PCIE was added based on the existing module of boot from SRIO, and the following changes were needed: 1. Updated the README.srio-boot-corenet to add descriptions about boot from PCIE, and change the name to README.srio-pcie-boot-corenet. 2. Changed the compile config "xxxx_SRIOBOOT_SLAVE" to "xxxx_SRIO_PCIE_BOOT", and the image builded with "xxxx_SRIO_PCIE_BOOT" can support both the boot from SRIO and from PCIE. 3. Updated other macros and documents if needed to add information about boot from PCIE. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| | * powerpc/corenet_ds: Master module for boot from PCIELiu Gang2012-08-23-18/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For the powerpc processors with PCIE interface, boot location can be configured from one PCIE interface by RCW. The processor booting from PCIE can do without flash for u-boot image. The image can be fetched from another processor's memory space by PCIE link connected between them. The processor booting from PCIE is slave, the processor booting from normal flash memory space is master, and it can help slave to boot from master's memory space. When boot from PCIE, slave's core should be in holdoff after powered on for some specific requirements. Master will release the slave's core at the right time by PCIE interface. Environment and requirement: master: 1. NOR flash for its own u-boot image, ucode and ENV space. 2. Slave's u-boot image is in master NOR flash. 3. Normally boot from local NOR flash. 4. Configure PCIE system if needed. slave: 1. Just has EEPROM for RCW. No flash for u-boot image, ucode and ENV. 2. Boot location should be set to one PCIE interface by RCW. 3. RCW should configure the SerDes, PCIE interfaces correctly. 4. Must set all the cores in holdoff by RCW. 5. Must be powered on before master's boot. For the master module, need to finish these processes: 1. Initialize the PCIE port and address space. 2. Set inbound PCIE windows covered slave's u-boot image stored in master's NOR flash. 3. Set outbound windows in order to configure slave's registers for the core's releasing. 4. Should set the environment variable "bootmaster" to "PCIE1", "PCIE2" or "PCIE3" using the following command: setenv bootmaster PCIE1 saveenv Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| | * powerpc/corenet_ds: Get rid of the CONFIG_SRIOBOOT_SLAVE_PORTx macroLiu Gang2012-08-23-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When compile the slave image for boot from SRIO, no longer need to specify which SRIO port it will boot from. The code will get this information from RCW and then finishes corresponding configurations. This has the following advantages: 1. No longer need to rebuild an image when change the SRIO port for boot from SRIO, just rewrite the new RCW with selected port, then the code will get the port information by reading new RCW. 2. It will be easier to support other boot location options, for example, boot from PCIE. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| | * powerpc/corenet_ds: Get rid of the SRIOBOOT_MASTER build targetLiu Gang2012-08-23-26/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Get rid of the SRIOBOOT_MASTER build target, and to support for serving as a SRIO boot master via environment variable. Set the environment variable "bootmaster" to "SRIO1" or "SRIO2" using the following command: setenv bootmaster SRIO1 saveenv The "bootmaster" will enable the function of the SRIO boot master, and this has the following advantages compared with SRIOBOOT_MASTER build configuration: 1. Reduce a build configuration item in boards.cfg file. No longer need to build a special image for master, just use a normal target image and set the "bootmaster" variable. 2. No longer need to rebuild an image when change the SRIO port for boot from SRIO, just set the corresponding value to "bootmaster" based on the using SRIO port. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2012-09-21-245/+389
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| * | | ColdFire: Rename NANDFLASH_SIZE into CONFIG_NANDFLASH_SIZE for MCF537xAlison Wang2012-09-20-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes the build error for MCF537x. As the NANDFLASH_SIZE is redefined in boards.cfg, it is needed to rename NANDFLASH_SIZE into CONFIG_NANDFLASH_SIZE in include/configs/M5373EVB.h. Signed-off-by: Alison Wang <b18965@freescale.com>
| * | | Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxTom Rini2012-09-18-0/+31
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| | * | | mpc8308rdb: add support for eSDHC MMC controllerIra W. Snyder2012-09-18-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the onboard eSDHC MMC controller. The hardware on the MPC8308RDB has the following errata: - ESDHC111: manual asynchronous CMD12 is broken - DMA is broken (PIO works) Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> [added include fsl_esdhc header to prevent implicit declarations of fsl_esdhc_mmc_init() and fdt_fixup_esdhc()] Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| | * | | mpc8308rdb: add support for FIT imagesIra W. Snyder2012-09-18-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is very useful on a modern system. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| | * | | mpc8308rdb: add support for Spansion SPI flash on header J8Ira W. Snyder2012-09-18-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SPI pins are routed to header J8 for testing SPI functionality. A Spansion flash has been wired up and tested on this header. This patch breaks support for the second TSEC interface, since the GPIO pin used as a chip select is pinmuxed with some of the TSEC pins. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | | | ARM: Remove apollon boardMarek Vasut2012-09-18-261/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This board is the only board that still sticks to OneNAND IPL. Remove this board, since we have SPL around for a while and OneNAND is well supported in the SPL framework. The board can be revived if necessary. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Tom Rini <trini@ti.com>
| * | | | Merge branch 'master' of git://git.denx.de/u-boot-nand-flashTom Rini2012-09-18-3/+0
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| | * | | mxc nand: Let driver detect IP revisionBenoît Thébaudeau2012-09-17-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no reason to have board configs to select the NFC IP revision. Just let the driver detect it. BTW, remove broken NFC IP revision configs from board config files. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | | | Merge branch 'master' of git://git.denx.de/u-boot-i2cTom Rini2012-09-17-7/+17
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| | * | | | i2c:soft:multi: Enable soft I2C multibus at Trats development boardŁukasz Majewski2012-09-17-7/+17
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit enables multibus handling at Samsung's Trats development board. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Acked-by: Heiko Schocher <hs@denx.de>
| * | | | Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2012-09-14-1/+7
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| | * | | | MIPS: add support for qemu for little endian MIPS32 CPUsDaniel Schwierzeck2012-08-24-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tested with 'qemu-system-mipsel -machine mips -bios u-boot.bin -nographic' Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| | * | | | MIPS: factor out endianess flag handling to arch config.mkDaniel Schwierzeck2012-08-24-0/+1
| | | |_|/ | | |/| | | | | | | | | | | | | | | | | | | | | | This is CPU independent and should be configured architecture-wide. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | | | Merge branch 'master' of git://git.denx.de/u-boot-avr32Tom Rini2012-09-13-0/+209
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| | * | | | avr32: add atngw100mkii boardAndreas Bießmann2012-09-13-0/+209
| | | |/ / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is derived from an older patch provided by atmel in its buildroot-avr32-v3.0.0.tar.bz2 Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> cc: Hans-Christian Egtvedt <egtvedt@samfundet.no> Acked-by: Hans-Christian Egtvedt <egtvedt@samfundet.no>
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