| Commit message (Collapse) | Author | Age | Lines |
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cppcheck reports:
[board/muas3001/muas3001.c:270]: (error) Uninitialized variable: psize
remove the CONFIG_SYS_RAMBOOT define to prevent this error report.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reported-by: Wolfgang Denk <wd@denx.de>
Reviewed-by: York Sun <yorksun@freescale.com>
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This define is never set in our setup, so we can remove it safely. The
former code causes cppcheck to complain about:
[board/keymile/km82xx/km82xx.c:311]: (error) Uninitialized variable:
psize
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Wolfgang Denk <wd@denx.de>
Reviewed-by: York Sun <yorksun@freescale.com>
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Use generic board architecture for p1010rdb, tested with NOR
boot on p1010rdb-pb.
Signed-off-by: Ying Zhang <b40530@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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The define CONFIG_FSL_SATA_V2 is missing, so SATA is not available
in U-boot.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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Use generic board architecture for p1025-twr, tested with NOR
boot and NAND boot on p1025-twr.
Signed-off-by: Ying Zhang <b40530@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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The fuse status register provides the values from on-chip
voltage ID efuses programmed at the factory.
These values define the voltage requirements for
the chip. u-boot reads FUSESR and translates the values
into the appropriate commands to set the voltage output
value of an external voltage regulator.
Signed-off-by: Ying Zhang <b40530@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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When device is configured to load RCW from NAND flash IFC_A[16:31] are driven
low after RCW loading. Hence Devices connected on IFC_CS[1:7] and using
IFC_A[16:31] lines are not accessible.
Workaround is already in-place.
Put the errata number to adhere errata handling framework.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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Enable interactive debugging by default. Remove DDR controller interleaving
because this SoC only has one controller. Use auto chip-select interleaving
to detect number of ranks.
Signed-off-by: York Sun <yorksun@freescale.com>
CC: Poonam Aggrwal <poonam.aggrwal@freescale.com>
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Adjust timing for dual-rank UDIMM, verified on M3CQ-8GHS3C0E for speed of
1066, 1333, 1600, 1866MT/s. The 1866 timing is copied to 2133 timing in
case such DIMM comes available.
Also update single-rank 1866 timing. Enable interactive debugging as well.
Signed-off-by: York Sun <yorksun@freescale.com>
CC: Shengzhou Liu <Shengzhou.Liu@freescale.com>
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Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Acked-by: Stefan Roese <sr@denx.de>
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Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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SystemID information could be read through I2C1 from EEPROM
on LS1021ATWR board.
As LS1 is a little-endian processor, getting the version ID by
be32_to_cpu() is wrong. Fix it by using e.version directly.
This change will be compatible for both ARM and PowerPC.
As there is an errata that I2C1 could not work in SD boot,
reading EEPROM through I2C1 is disabled too in SD boot.
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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Add define CONFIG_SYS_WRITE_SWAPPED_DATA.
For LS1021AQDS and LS1021QTWR nor flash write should swap the
bytes when handle unaligned tail bytes.
Because of the ending, if the date bus width is 16-bits and the
number of bytes is odd, we should swap the byte when write the
last one.
Signed-off-by: Yuan Yao <yao.yuan@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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Enable USB EHCI Host on LS1021AQDS
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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Signed-off-by: Zhao Qiang <B45475@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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add qe support to ls1021aqds
Signed-off-by: Zhao Qiang <B45475@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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Conflicts:
drivers/mmc/fsl_esdhc.c
Signed-off-by: Tom Rini <trini@ti.com>
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Add complete USB EHCI support for MPC837XEMDS and MPC837XERDB
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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This fixes CPLD timing from previous commit
ab06b236f76cfa42f264ee161be190b3e479298f.
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
[York Sun: This is the difference between v2 and v1 patch]
Reviewed-by: York Sun <yorksun@freescale.com>
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Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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This patch enhances the boot of origen board by adding support to ext2, bootz, initrd, bootenv loading and boot script.
It still keeps the previous mmc load command if boot script fails.
Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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This change adds support for enabling the USB host features of the board.
This includes the USB3503A hub and the SMC LAN9730 ethernet controller
as well.
Signed-off-by: Suriyan Ramasami <suriyan.r@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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Compile-time tested only, as I currently don't have access to
the eval board.
Signed-off-by: David Müller <d.mueller@elsoft.ch>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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I was running into this limit with a not overly long PXE append line.
Since the PXE code wants to print the resulting command line increase
CONFIG_SYS_PBSIZE too.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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This replaces the existing CONFIG_BOOTCOMMAND for exynos5250 and 5420.
exynos4 platforms seem to have existing complex extra env configuration for
booting and so are excluded here. Hence the bootcmd.h is added to
exynos5-common.h.
I have build tested on all exynos platforms (MAKEALL -s exynos), but only boot
tested on arndale.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Guillaume GARDET <guillaume.gardet@free.fr>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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...and remove explicit setting of things which this implies. This is done for
all exynos platforms (4 & 5) so it is added to exynos-common.h
I'm mainly interested in CONFIG_CMD_BOOTZ and CONFIG_SUPPORT_RAW_INITRD
I have build tested on all exynos platforms (MAKEALL -s exynos), but only boot
tested on arndale.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Guillaume GARDET <guillaume.gardet@free.fr>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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Since, not every board may have all memory channels configured
and all available banks of DMC used, we wish to refactor configs
for Memory Bank size and numbers as per board memory config.
For Example, Peach-Pit has 2GB memory and will be using only 4 banks
but Peach-Pi has 3.5GB memory and will be using all 7 available
SDRAM banks.
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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This adds following things :
- New config and defconfig for Peach-Pi board.
- Alterations in Kconfig and MAINTAINERS.
- Addition of CONFIG_EXYNOS5800.
- ADdition of exynos5800-peach-pi in dts list.
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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It is not used anywhere.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
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For use together with the hdmi console.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
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Add simplefb support, note this depends on the kernel having support for
the clocks property which has recently been added to the simplefb devicetree
binding.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
[hdegoede@redhat.com: Use pre-populated simplefb node under /chosen as
disussed on the devicetree list]
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>.
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This adds a fixed mode hdmi driver for the sunxi platform. The fixed
mode is a relatively safe 1024x768, more complete EDID handling is
currently not provided. Only HDMI is supported today.
This code is enabled when HPD detects an attached monitor.
Current config is such that 8MB is shaved off at the top of the RAM.
This avoids several memory handling issues, most significant is the fact
that on linux on ARM you are not allowed to remap known RAM as IO. A
clued in display driver will be able to recycle this reserved RAM in
future though.
cfbconsole was chosen as it provides the most important functionality: a
working u-boot console, allowing for the debugging of certain issues
without the need for a UART.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
[hdegoede@redhat.com: Major cleanups and some small bugfixes]
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
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Add arch/arm/cpu/armv7/Kconfig with non-secure and virt options, this is a
preparation patch for adding an env variable to choose between secure /
non-secure boot on non-secure boot capable systems, specifically this
prepares for adding CONFIG_ARMV7_BOOT_SEC_DEFAULT as a proper Kconfig option.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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Enable i.MX thermal DM driver to mx6sabre_common.h file. Since the
thermal is used in init_sequence_f, so define the CONFIG_SYS_MALLOC_F_LEN
to support DM driver using in pre relocation phase.
Additional, thermal driver depends on ocotp, make sure to enable
CONFIG_MXC_OCOTP when CONFIG_IMX6_THERMAL is selected.
Signed-off-by: Ye.Li <B37916@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
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Add the pfuze100 initialization in power_init_board for imx6q/dl
sabreauto board.
Signed-off-by: Ye.Li <B37916@freescale.com>
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Add full support for USDHC2, USDHC3, USDHC4 on mx6sx sabresd board.
The default boot socket is USDHC4, so the MMC environment device and
mmcdev variable are set to this device.
Signed-off-by: Ye.Li <B37916@freescale.com>
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This is nowhere documented and only used
by two other boards. Replace it with
TQMA6_SPI_FLASH_SECTOR_SIZE.
Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
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mx6sabreauto boards come with 32 MiB of parallel NOR flash.
Add support for it:
U-Boot 2015.01-rc1-18107-g1543636-dirty (Nov 14 2014 - 11:11:04)
CPU: Freescale i.MX6Q rev1.2 at 792 MHz
Reset cause: POR
Board: MX6Q-Sabreauto revA
I2C: ready
DRAM: 2 GiB
Flash: 32 MiB
NAND: 0 MiB
Due to pin conflict with I2C3, only define configure I2C3 IOMUX when flash is
not used.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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Since USDHC1 and USDHC3 added, the dev index for USDHC2 changed to
1. So modify the default mmcdev in environment variables to dev 1.
Signed-off-by: Ye.Li <B37916@freescale.com>
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Conflicts:
drivers/serial/serial-uclass.c
Signed-off-by: Tom Rini <trini@ti.com>
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The faster functions are not actually available in SPL and the code size
likely isn't worth it. Use the normal memcpy() in SPL.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Convert this at91sam9260-based board to use driver model. This should serve
as an example for other similar boards. Serial and GPIO are supported so
far.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
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This works correctly, so switch it over before the deadline.
Signed-off-by: Simon Glass <sjg@chromium.org>
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The value should be 0x21f00000. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
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