| Commit message (Collapse) | Author | Age | Lines |
|\ |
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
SystemID information could be read through I2C1 from EEPROM
on LS1021ATWR board.
As LS1 is a little-endian processor, getting the version ID by
be32_to_cpu() is wrong. Fix it by using e.version directly.
This change will be compatible for both ARM and PowerPC.
As there is an errata that I2C1 could not work in SD boot,
reading EEPROM through I2C1 is disabled too in SD boot.
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Add define CONFIG_SYS_WRITE_SWAPPED_DATA.
For LS1021AQDS and LS1021QTWR nor flash write should swap the
bytes when handle unaligned tail bytes.
Because of the ending, if the date bus width is 16-bits and the
number of bytes is odd, we should swap the byte when write the
last one.
Signed-off-by: Yuan Yao <yao.yuan@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
|
| |
| |
| |
| |
| |
| |
| | |
Enable USB EHCI Host on LS1021AQDS
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
|
| |
| |
| |
| |
| | |
Signed-off-by: Zhao Qiang <B45475@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
|
| |
| |
| |
| |
| |
| |
| | |
add qe support to ls1021aqds
Signed-off-by: Zhao Qiang <B45475@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
|
|\ \
| | |
| | |
| | |
| | |
| | |
| | | |
Conflicts:
drivers/mmc/fsl_esdhc.c
Signed-off-by: Tom Rini <trini@ti.com>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Add complete USB EHCI support for MPC837XEMDS and MPC837XERDB
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
This fixes CPLD timing from previous commit
ab06b236f76cfa42f264ee161be190b3e479298f.
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
[York Sun: This is the difference between v2 and v1 patch]
Reviewed-by: York Sun <yorksun@freescale.com>
|
| |/
| |
| |
| |
| | |
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
|
|\ \ |
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
This patch enhances the boot of origen board by adding support to ext2, bootz, initrd, bootenv loading and boot script.
It still keeps the previous mmc load command if boot script fails.
Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
This change adds support for enabling the USB host features of the board.
This includes the USB3503A hub and the SMC LAN9730 ethernet controller
as well.
Signed-off-by: Suriyan Ramasami <suriyan.r@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Compile-time tested only, as I currently don't have access to
the eval board.
Signed-off-by: David Müller <d.mueller@elsoft.ch>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
I was running into this limit with a not overly long PXE append line.
Since the PXE code wants to print the resulting command line increase
CONFIG_SYS_PBSIZE too.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
This replaces the existing CONFIG_BOOTCOMMAND for exynos5250 and 5420.
exynos4 platforms seem to have existing complex extra env configuration for
booting and so are excluded here. Hence the bootcmd.h is added to
exynos5-common.h.
I have build tested on all exynos platforms (MAKEALL -s exynos), but only boot
tested on arndale.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Guillaume GARDET <guillaume.gardet@free.fr>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
...and remove explicit setting of things which this implies. This is done for
all exynos platforms (4 & 5) so it is added to exynos-common.h
I'm mainly interested in CONFIG_CMD_BOOTZ and CONFIG_SUPPORT_RAW_INITRD
I have build tested on all exynos platforms (MAKEALL -s exynos), but only boot
tested on arndale.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Guillaume GARDET <guillaume.gardet@free.fr>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Since, not every board may have all memory channels configured
and all available banks of DMC used, we wish to refactor configs
for Memory Bank size and numbers as per board memory config.
For Example, Peach-Pit has 2GB memory and will be using only 4 banks
but Peach-Pi has 3.5GB memory and will be using all 7 available
SDRAM banks.
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
This adds following things :
- New config and defconfig for Peach-Pi board.
- Alterations in Kconfig and MAINTAINERS.
- Addition of CONFIG_EXYNOS5800.
- ADdition of exynos5800-peach-pi in dts list.
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
It is not used anywhere.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
For use together with the hdmi console.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Add simplefb support, note this depends on the kernel having support for
the clocks property which has recently been added to the simplefb devicetree
binding.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
[hdegoede@redhat.com: Use pre-populated simplefb node under /chosen as
disussed on the devicetree list]
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>.
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
This adds a fixed mode hdmi driver for the sunxi platform. The fixed
mode is a relatively safe 1024x768, more complete EDID handling is
currently not provided. Only HDMI is supported today.
This code is enabled when HPD detects an attached monitor.
Current config is such that 8MB is shaved off at the top of the RAM.
This avoids several memory handling issues, most significant is the fact
that on linux on ARM you are not allowed to remap known RAM as IO. A
clued in display driver will be able to recycle this reserved RAM in
future though.
cfbconsole was chosen as it provides the most important functionality: a
working u-boot console, allowing for the debugging of certain issues
without the need for a UART.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
[hdegoede@redhat.com: Major cleanups and some small bugfixes]
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
|
|\ \ \ |
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Add arch/arm/cpu/armv7/Kconfig with non-secure and virt options, this is a
preparation patch for adding an env variable to choose between secure /
non-secure boot on non-secure boot capable systems, specifically this
prepares for adding CONFIG_ARMV7_BOOT_SEC_DEFAULT as a proper Kconfig option.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
|
|\ \ \ \ |
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
Enable i.MX thermal DM driver to mx6sabre_common.h file. Since the
thermal is used in init_sequence_f, so define the CONFIG_SYS_MALLOC_F_LEN
to support DM driver using in pre relocation phase.
Additional, thermal driver depends on ocotp, make sure to enable
CONFIG_MXC_OCOTP when CONFIG_IMX6_THERMAL is selected.
Signed-off-by: Ye.Li <B37916@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
Add the pfuze100 initialization in power_init_board for imx6q/dl
sabreauto board.
Signed-off-by: Ye.Li <B37916@freescale.com>
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
Add full support for USDHC2, USDHC3, USDHC4 on mx6sx sabresd board.
The default boot socket is USDHC4, so the MMC environment device and
mmcdev variable are set to this device.
Signed-off-by: Ye.Li <B37916@freescale.com>
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
This is nowhere documented and only used
by two other boards. Replace it with
TQMA6_SPI_FLASH_SECTOR_SIZE.
Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
mx6sabreauto boards come with 32 MiB of parallel NOR flash.
Add support for it:
U-Boot 2015.01-rc1-18107-g1543636-dirty (Nov 14 2014 - 11:11:04)
CPU: Freescale i.MX6Q rev1.2 at 792 MHz
Reset cause: POR
Board: MX6Q-Sabreauto revA
I2C: ready
DRAM: 2 GiB
Flash: 32 MiB
NAND: 0 MiB
Due to pin conflict with I2C3, only define configure I2C3 IOMUX when flash is
not used.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
|
| | |_|/
| |/| |
| | | |
| | | |
| | | |
| | | |
| | | | |
Since USDHC1 and USDHC3 added, the dev index for USDHC2 changed to
1. So modify the default mmcdev in environment variables to dev 1.
Signed-off-by: Ye.Li <B37916@freescale.com>
|
|\ \ \ \
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
Conflicts:
drivers/serial/serial-uclass.c
Signed-off-by: Tom Rini <trini@ti.com>
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
The faster functions are not actually available in SPL and the code size
likely isn't worth it. Use the normal memcpy() in SPL.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
Convert this at91sam9260-based board to use driver model. This should serve
as an example for other similar boards. Serial and GPIO are supported so
far.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
This works correctly, so switch it over before the deadline.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
The value should be 0x21f00000. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
|\ \ \ \ \
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | | |
Conflicts:
arch/x86/cpu/Makefile
Signed-off-by: Tom Rini <trini@ti.com>
|
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | | |
Implement SDRAM init using the Memory Reference Code (mrc.bin) provided in
the board directory and the SDRAM SPD information in the device tree. This
also needs the Intel Management Engine (me.bin) to work. Binary blobs
everywhere: so far we have MRC, ME and microcode.
SDRAM init works by setting up various parameters and calling the MRC. This
in turn does some sort of magic to work out how much memory there is and
the timing parameters to use. It also sets up the DRAM controllers. When
the MRC returns, we use the information it provides to map out the
available memory in U-Boot.
U-Boot normally moves itself to the top of RAM. On x86 the RAM is not
generally contiguous, and anyway some RAM may be above 4GB which doesn't
work in 32-bit mode. So we relocate to the top of the largest block of
RAM we can find below 4GB. Memory above 4GB is accessible with special
functions (see physmem).
It would be possible to build U-Boot in 64-bit mode but this wouldn't
necessarily provide any more memory, since the largest block is often below
4GB. Anyway U-Boot doesn't need huge amounts of memory - even a very large
ramdisk seldom exceeds 100-200MB. U-Boot has support for booting 64-bit
kernels directly so this does not pose a limitation in that area. Also there
are probably parts of U-Boot that will not work correctly in 64-bit mode.
The MRC is one.
There is some work remaining in this area. Since memory init is very slow
(over 500ms) it is possible to save the parameters in SPI flash to speed it
up next time. Suspend/resume support is not fully implemented, or at least
it is not efficient.
With this patch, link boots to a prompt.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | | |
Enable GPIO support and provide the required GPIO setup information to
the driver.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | | |
Enable PCI so we can access devices that need to be set up before relocation.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | | |
On x86 machines U-Boot needs to be added to a large ROM image which is
then flashed onto the target board. The ROM has a particular format so it
makes sense for U-Boot to build this image automatically. Unfortunately
it relies on binary blobs so we cannot require this for the default
build as yet.
Create a u-boot.rom output file for this purpose.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | | |
This board is a 'bare' version of the existing 'link 'board. It does not
require coreboot to run, but is intended to start directly from the reset
vector.
This initial commit has place holders for a wide range of features. These
will be added in follow-on patches and series. So far it cannot be booted
as there is no ROM image produced, but it does build without errors.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
| |/ / / /
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
Many of the x86 CONFIG options will be common across different boards. Move
them to a common file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
Enable md5sum to obtain the MD5 of the read and written files to check
their contents for validity.
Use map_sysmem() to map buffer in a sandbox environment.
Signed-off-by: Suriyan Ramasami <suriyan.r@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
Since commit 0defddc851ed (config: Add a default CONFIG_SYS_PROMPT),
each board header does not need to define CONFIG_SYS_PROMPT
as long as it uses the default prompt "=> ".
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
CONFIG_CPU_ARM1136 was introduced into Kconfig by commit 2e07c249a67e
(kconfig: arm: introduce symbol for ARM CPUs).
This commit removes all the defines of CONFIG_ARM1136 and replaces
the only reference in arch/arm/lib/cache.c with CONFIG_CPU_ARM1136.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
CONFIG_CPU_ARM926EJS was introduced into Kconfig by commit 2e07c249a67e
(kconfig: arm: introduce symbol for ARM CPUs).
This commit removes all the defines of CONFIG_ARM926EJS and replaces
the only reference in arch/arm/lib/cache.c with CONFIG_CPU_ARM926EJS.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
CONFIG_CPU_ARM920T was introduced into Kconfig by commit 2e07c249a67e
(kconfig: arm: introduce symbol for ARM CPUs).
This commit removes all the defines of CONFIG_ARM920T and replaces the
only reference in drivers/usb/host/ohci-hcd.c with CONFIG_CPU_ARM920T.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
CONFIG_ARM1176 is defined for some boards but not referenced at all.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
|