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* malta: enable RTC supportPaul Burton2013-11-09-0/+5
| | | | | | | | | This is actually required in order for a Linux kernel to boot successfully on a physical Malta board. Without enabling the RTC, a Malta Linux kernel will get stuck in its estimate_frequencies function on boot. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
* malta: remove cache size definitionsPaul Burton2013-11-09-4/+0
| | | | | | | | | | These will now be detected at runtime, allowing a single U-boot configuration to function correctly with different bitstreams. Without this you may need to re-configure, re-build and re-flash U-boot to your Malta if you flash a new bitstream with a different cache configuration to your old bitstream. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
* malta: enable CONFIG_PCNET_79C973, PCNET_HAS_PROM, CONFIG_CMD_DHCPPaul Burton2013-11-09-0/+3
| | | | | | | | | | | | | This model of the pcnet is used in current Malta boards, at least in the Malta-R rev 3. Enable support for it. The Malta also has the ethernet controller PROM containing its MAC address, so enable support for that in order to read that MAC address. DHCP is a very useful feature to have available for many networks, enable support for it also. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
* malta: support for coreFPGA6 boardsPaul Burton2013-11-09-1/+3
| | | | | | | | | | | | | | | | | | | | | This patch adds support for running on Malta boards using coreFPGA6 core cards, including support for the msc01 system controller used with them. The system controller is detected at runtime allowing one U-boot binary to run on a Malta with either. Due to the PCI I/O base differing between Maltas using gt64120 & msc01 system controllers, the UART setup is modified slightly. A second UART is added so that there is one pointing at the correct address for each system controller. The Malta board then defines its own default_serial_console function to select the correct one at runtime. The incorrect UART will simply not function. Tested on: - A coreFPGA6 Malta running interAptiv and proAptiv bitstreams, both with and without an L2 cache. - QEMU. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
* qemu-malta: rename to just "malta"Paul Burton2013-11-09-6/+6
| | | | | | | | | This is in preparation for adapting this board to function correctly on a physical MIPS Malta board. The board is moved into an "imgtec" vendor directory at the same time in order to ready us for any other boards supported by Imagination in the future. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-usbTom Rini2013-11-08-2/+0
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| * usb: ums: move ums code from trats to Samsung common directoryPrzemyslaw Marczak2013-11-08-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | UMS init was implemented in trats board file but mostly it comprises common code. Due to that it has been moved to common/ums.c to avoid code duplication in the future. Changes: - move ums initialization code from trats to common/ums.c - remove unused CONFIG_USB_GADGET_MASS_STORAGE from trats.h Changes v2: - move this patch at the top of code cleanups patches Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Marek Vasut <marex@denx.de> Cc: Minkyu Kang <mk7.kang@samsung.com>
* | sandbox: convert to common time functionsRob Herring2013-11-08-0/+2
| | | | | | | | | | | | Convert sandbox to use common time functions. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
* | highbank: set AUTOBOOT_KEYED_CTRLC config optionMark Langsdorf2013-11-08-1/+1
| | | | | | | | | | | | Let highbank users break into the autoboot script with ctrl-c. Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
* | config/sandbox: Add EFI and GPT supportEgbert Eich2013-11-08-0/+4
| | | | | | | | Signed-off-by: Egbert Eich <eich@suse.com>
* | EP88x: remove remainders of dead boardMasahiro Yamada2013-11-08-187/+0
|/ | | | | | | | | | Commit 1b0757e deleted the EP88x entry from boards.cfg file. But it missed to remove include/configs/EP88x.h and board/ep88x/. This commit removes them and adds EP88x to README.scrapyard. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Wolfgang Denk <wd@denx.de>
* ColdFire: fix some typoes for CF platformjason2013-11-06-2/+2
| | | | Signed-off-by: Jason Jin <Jason.Jin@freescale.com>
* coldfire: cpu5282: increase malloc space to fix crash on start u-bootJens Scharsig (BuS Elektronik)2013-11-06-1/+1
| | | | | | | The malloc space is to small to boot, the current uboot 2013.10-rcX, This will fix the startup problems by increasing the mallog space to 4MiB. Signed-off-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
* ARM: versatile: convert to common timer codeRob Herring2013-11-04-5/+4
| | | | | | Convert versatile to use the commmon timer code. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
* ARM: tegra: convert to common timer codeRob Herring2013-11-04-0/+3
| | | | | | Convert tegra to use the commmon timer code. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
* ARM: socfpga: convert to common timer codeRob Herring2013-11-04-2/+3
| | | | | | Convert socfpga to use the commmon timer code. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
* ARM: vexpress: convert to common timer codeRob Herring2013-11-04-0/+4
| | | | | | Convert vexpress to use the commmon timer code. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
* ARM: mx25: convert to common timer codeRob Herring2013-11-04-0/+13
| | | | | | Convert mx25 to use the commmon timer code. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
* ARM: highbank: convert to common timer codeRob Herring2013-11-04-0/+4
| | | | | | Convert highbank to use the commmon timer code. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
* config: remove platform CONFIG_SYS_HZ definition part 2/2Rob Herring2013-11-04-443/+0
| | | | | | Remove platform CONFIG_SYS_HZ definition for configs a-z*. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
* config: remove platform CONFIG_SYS_HZ definition part 1/2Rob Herring2013-11-04-323/+0
| | | | | | Remove platform CONFIG_SYS_HZ definition for configs A-Z*. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
* config: Add a default CONFIG_SYS_PROMPTRob Herring2013-11-04-307/+0
| | | | | | | | | | The definitions for CONFIG_SYS_PROMPT are varied with little reason other than to display the board name. Over half the definitions are "==> ", so make this the default. The rest of the boards remain unchanged to avoid breaking any external scripts expecting a certain prompt. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
* powerpc/esdhc: Add 3.3v voltage support in esdhc capacity registerHaijun.Zhang2013-10-31-0/+1
| | | | | | | | | | T4240QDS eSDHC host capabilities reigster should have VS33 bit define. Add quirk CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 to deal with capacity missing Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
* mpc85xx: introduce the kmp204x reference design supportValentin Longchamp2013-10-24-0/+518
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch introduces the support for Keymile's kmp204x reference design. This design is based on Freescale's P2040/P2041 SoC. The peripherals used by this design are: - DDR3 RAM with SPD support - SPI NOR Flash as boot medium - NAND Flash - 2 PCIe busses (hosts 1 and 3) - 3 FMAN Ethernet devices (FMAN1 DTSEC1/2/5) - 3 Local Bus windows, with one dedicated to the QRIO reset/power mgmt FPGA - 2 HW I2C busses - last but not least, the mandatory serial port The board/keymile/kmp204x code is mostly based on Freescale's P2041rdb support and was changed according to our design (that means essentially removing what is not present on the designs and a few adaptations). There is currently only one prototype board that is based on this design and this patch also introduces it. The board is called kmlion1. Signed-off-by: Stefan Bigler <stefan.bigler@keymile.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> kmp204x: update the ENV #define The comments had to be refined as well as the total size Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> [York Sun: fix ddr.c] Acked-by: York Sun <yorksun@freescale.com>
* KM: add CONFIG_KM_COMMON_ETH_INIT for km common eth initValentin Longchamp2013-10-24-0/+4
| | | | | | | | | | | | This must be defined by a board support file that want to use the keymile common.c board_eth_init function that requires ethernet_present to be defined. Currently all the km architectures use it but the kmp204x architecture later supported in this series does use another board_eth_init function and thus does not define it. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
* KM: define CONFIG_SYS_I2C_INIT_BOARD only for concerned boardValentin Longchamp2013-10-24-5/+3
| | | | | | | | | | | | | This must be defined for all the keymile boards that use the common i2c_abort function that is used to "reset" the I2C bus. These are currently km82xx and km_arm boards. The km83xx boards use other functions and thus do not need this. This patch removes the CONFIG_SYS_I2C_INIT_BOARD from keymile-common.h and defines it for km_arm.h and km82xx.h. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
* KM: fix typo in default environmentValentin Longchamp2013-10-24-1/+1
| | | | | | | The ip kernel parameter had a typo in it (we've been lucky that it has worked until now). Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
* km-powerpc: move SYS_MALLOC_LEN out of keymile-common.hValentin Longchamp2013-10-24-2/+6
| | | | | | | It must be set to a different value for the later add kmp204x architecture, because we are restricted to 1MB SRAM. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
* powerpc/c29xpcie: add DDR ECC on off config settingPo Liu2013-10-24-0/+2
| | | | | | | | | | c29xpcie REV_A board DDR ECC chip has bad impedance in hardware, force that kind of board to be DDR ECC off when booting. Other version board config ECC on/off by hwconfig=fsl_ddr:ecc=on in uboot enviroment. Signed-off-by: Po Liu <Po.Liu@freescale.com> Acked-by: York Sun <yorksun@freescale.com>
* arm: rmobile: armadillo-800eva: Change clock definition of SCIF and TMUNobuhiro Iwamatsu2013-10-22-0/+2
| | | | | | | | | | This changes clock definition of SCIF from CONFIG_SYS_CLK_FREQ to CONFIG_SH_SCIF_CLK_FREQ, and clock definition of TMU from CONFIG_SYS_CLK_FREQ to CONFIG_SH_TMU_CLK_FREQ, Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Albert Aribaud <albert.u.boot@aribaud.net>
* arm: rmobile: kzm9g: Change clock definition of SCIF from ↵Nobuhiro Iwamatsu2013-10-22-0/+1
| | | | | | | | CONFIG_SYS_CLK_FREQ to CONFIG_SH_SCIF_CLK_FREQ Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Albert Aribaud <albert.u.boot@aribaud.net>
* Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini2013-10-22-0/+40
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| * sh: boards: Change clock definition of SCIF and TMUNobuhiro Iwamatsu2013-10-17-0/+40
| | | | | | | | | | | | | | | | | | | | This changes clock definition of SCIF from CONFIG_SYS_CLK_FREQ to CONFIG_SH_SCIF_CLK_FREQ, and clock definition of TMU from CONFIG_SYS_CLK_FREQ to CONFIG_SH_TMU_CLK_FREQ for boards. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Albert Aribaud <albert.u.boot@aribaud.net>
* | Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2013-10-21-6/+49
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| * | usb: ehci-mx6: add support for otg portTroy Kisky2013-10-20-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously, only host1 was supported using an index of 0. Now, otg has index 0, host1 is 1, host2 is 2, host3 is 3. Since OTG requires usbmode to be set after reset, I added CONFIG_EHCI_HCD_INIT_AFTER_RESET to nitrogen6x.h and mx6qsabreauto.h. I also added a weak function board_ehci_power to handle turning power on/off for otg. Type is type of device connected (USB stick vs Host.) Init is type of device desired. Only power up port if type == init == USB_INIT_HOST. Only return error if type != init. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| * | usb: am437x: Add support for am437x xhci USB hostDan Murphy2013-10-20-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add the support for the am437x xhci usb host. The xHCI host on AM437 is connected to a usb2 phy so need to add support to enable those clocks. Signed-off-by: Dan Murphy <dmurphy@ti.com>
| * | usb: dra7xx: Add support for dra7xx xhci USB hostDan Murphy2013-10-20-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the support for the dra7xx xhci usb host. dra7xx does not contain an EHCI controller so the headers can be removed from the board file. The xHCI host on dra7xx is connected to a usb2 phy so need to add support to enable those clocks. Signed-off-by: Dan Murphy <dmurphy@ti.com>
| * | trats: Update TRATS config to support TIZEN downloadLukasz Majewski2013-10-20-2/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A set of environment variables needs to be updated to provide support for TIZEN download command (tizendown). Since DFU is used as a flashing backend, it is also necessary to extent malloc pool size for DFU buffer allocation. Moreover, for compatibility reasons (Win vs. Lin) new USB idProduct number for download gadget had to be added. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Cc: Marek Vasut <marex@denx.de>
| * | nitrogen6x: add CONFIG_MV_UDCTroy Kisky2013-10-20-0/+6
| | | | | | | | | | | | | | | | | | Also, add other USB related config items. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| * | temp: config: exynos5250: Enable xHCI support for Exynos5Vivek Gautam2013-10-20-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This enables support for xHCI host controller on Exynos5 and further disables EHCI support, to make sure only one host controller is enabled at a time, since right now using two controllers at a time is not possible with current usb core infrastructure. Anyone who wants to enable EHCI support again needs to enable CONFIG_USB_EHCI, CONFIG_USB_EHCI_EXYNOS once again in exynos5-dt config. Signed-off-by: Vikas C Sajjan <vikas.sajjan@samsung.com> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de>
| * | config: arm: exynos5250: Define CONFIG_SYS_CACHELINE_SIZEVivek Gautam2013-10-20-0/+2
| |/ | | | | | | | | | | | | | | | | | | | | | | XHCI stack driver needs this to align buffers to CacheLine boundary. So define the same to be '64' Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-i2cTom Rini2013-10-17-56/+46
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| * | i2c: update config using mxc driver to new subsystemtrem2013-10-17-56/+46
| |/ | | | | | | Signed-off-by: Philippe Reynes <tremyfr@yahoo.fr>
* | powerpc/p1010rdb: add p1010rdb-pb support with updating p1010rdb-paShengzhou Liu2013-10-16-14/+87
| | | | | | | | | | | | | | | | | | | | | | | | - Rename old P1010RDB board as P1010RDB-PA. - Add support for new P1010RDB-PB board. - Some optimization. For more details, see board/freescale/p1010rdb/README. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> [York Sun: fix conflicts in boards.cfg] Acked-by: York Sun <yorksun@freescale.com>
* | board/p1010rdb: add pin mux and sdhc support in any bootShengzhou Liu2013-10-16-13/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since pins multiplexing, SDHC shares signals with IFC, with this patch: To enable SDHC in case of NOR/NAND/SPI boot a) For temporary use case in runtime without reboot system run 'mux sdhc' in u-boot to validate SDHC with invalidating IFC. b) For long-term use case set 'esdhc' in hwconfig and save it. To enable IFC in case of SD boot a) For temporary use case in runtime without reboot system run 'mux ifc' in u-boot to validate IFC with invalidating SDHC. b) For long-term use case set 'ifc' in hwconfig and save it. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
* | powerpc/t1040qds: Add T1040QDS boardPrabhakar Kushwaha2013-10-16-0/+761
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | T1040QDS is a high-performance computing evaluation, development and test platform supporting the T1040 QorIQ Power Architecture™ processor. T1040QDS board Overview ----------------------- - Four e5500 cores, each with a private 256 KB L2 cache - 256 KB shared L3 CoreNet platform cache (CPC) - Interconnect CoreNet platform - 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving support - Data Path Acceleration Architecture (DPAA) incorporating acceleration for the following functions: - Packet parsing, classification, and distribution - Queue management for scheduling, packet sequencing, and congestion management - Cryptography Acceleration - RegEx Pattern Matching Acceleration - IEEE Std 1588 support - Hardware buffer management for buffer allocation and deallocation - Ethernet interfaces - Integrated 8-port Gigabit Ethernet switch - Four 1 Gbps Ethernet controllers - SERDES Connections, 8 lanes supporting: — PCI Express: supporting Gen 1 and Gen 2; — SGMII — QSGMII — SATA 2.0 — Aurora debug with dedicated connectors - DDR Controller 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and Interleaving -IFC/Local Bus - NAND flash: 8-bit, async, up to 2GB. - NOR: 8-bit or 16-bit, non-multiplexed, up to 512MB - GASIC: Simple (minimal) target within Qixis FPGA - PromJET rapid memory download support - Ethernet - Two on-board RGMII 10/100/1G ethernet ports. - PHY #0 remains powered up during deep-sleep - QIXIS System Logic FPGA - Clocks - System and DDR clock (SYSCLK, “DDRCLK”) - SERDES clocks - Power Supplies - Video - DIU supports video at up to 1280x1024x32bpp - USB - Supports two USB 2.0 ports with integrated PHYs — Two type A ports with 5V@1.5A per port. — Second port can be converted to OTG mini-AB - SDHC - SDHC port connects directly to an adapter card slot, featuring: - Supporting SD slots for: SD, SDHC (1x, 4x, 8x) and/or MMC — Supporting eMMC memory devices - SPI - On-board support of 3 different devices and sizes - Other IO - Two Serial ports - ProfiBus port - Four I2C ports Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> [York Sun: fix conflict in boards.cfg] Acked-by-by: York Sun <yorksun@freescale.com>
* | powerpc/B4860: enable PBL tool for B4860Shaohui Xie2013-10-16-0/+2
| | | | | | | | | | | | | | | | Use a default RCW of protocol 0x2A_0x98, and a PBI configure file which uses CPC1 as 512KB SRAM, then PBL tool can be used on B4860 to build a pbl boot image. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
* | powerpc/usb: Mention usb1 before usb2 inside default hwconfig stringramneek mehresh2013-10-16-2/+2
| | | | | | | | | | | | | | | | For USB device-tree fix-up to work properly, its necessary to mention USB1 options before that of USB2 inside default hwconfig string Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
* | board/bsc9131rdb: Update IFC timings for NAND flashPrabhakar Kushwaha2013-10-16-8/+8
| | | | | | | | | | | | | | | | | | Current IFC timings for NAND flash are not able to support existing K9F1G08U0B and new K9F1G08U0D flash. so Update the timings to support both. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
* | powerpc: p1_p2_rdb_pc: add TPL for p1_p2_rdb_pc nand bootYing Zhang2013-10-16-26/+57
| | | | | | | | | | | | Enable TPL for p1_p2_rdb_pc nand boot. Signed-off-by: Ying Zhang <b40530@freescale.com>
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