| Commit message (Collapse) | Author | Age | Lines |
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The TrimSlice has an ethernet NIC connected to the PCIe bus. Enable the
PCIe controller and the network driver so that the device can boot over
the network.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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Conflicts:
include/configs/arndale.h
Signed-off-by: Tom Rini <trini@ti.com>
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Patch enables AX88179 driver for ARNDALE 5250
Signed-off-by: Rene Griessl <rgriessl@cit-ec.uni-bielefeld.de>
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The current current watchdog timeout of 12 seconds is a bit small for
booting into Linux, especially when using a NFS based rootfs. So lets
change this timeout to a more defensive value of 30 seconds.
Also we now call the hw_watchdog_init() function so that we override
the value already configured from the Preloader.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Vince Bridgers <vbridger@opensource.altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Pavel Machek <pavel@denx.de>
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Repair the register configuration and add proper support for the
display attached to both LVDS channels.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Sean Cross <xobs@kosagi.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
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Sequence like the following is completely useless and results from
an errorneous ordering of the statements during development. Zap it.
#ifdef FOO
#define FOO
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Sean Cross <xobs@kosagi.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
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This board uses setup_i2c() in SPL. The setup_i2c() function internally
calls gpio_request(), which in turn internally calls strdup(). The strdup()
requires a running mallocator, so this patch makes the mallocator available.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Sean Cross <xobs@kosagi.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
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This board uses setup_i2c() in SPL. The setup_i2c() function internally
calls gpio_request(), which in turn internally calls strdup(). The strdup()
requires a running mallocator, so this patch makes the mallocator available.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Sean Cross <xobs@kosagi.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
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Since the Riot & Mars boards are dev boards it's likely people will want to
run standard distros on them. So replace the current boot scripts with the
standard one from config_distro_bootcmd.h
Signed-off-by: Iain Paton <ipaton0@gmail.com>
Tested-by: Nikolay Dimitrov <picmaster@mail.bg>
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Update to use config_distro_defaults.h and remove explicit settings
Signed-off-by: Iain Paton <ipaton0@gmail.com>
Tested-by: Nikolay Dimitrov <picmaster@mail.bg>
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Signed-off-by: Stefano Babic <sbabic@denx.de>
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Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
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Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
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Add pinmux settings and implement board_ehci_hcd_init
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Add pinmux settings, implement board_ehci_hcd_init and board_ehci_power
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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USB is a pretty common feature on exynos 5 board, so it seems sensible
to configure it directly from exynos5-common. As a side-effect this
makes USB available from u-boot on exynos 5420 based boards.
While there enable support for common USB ethernet cards to make it more
likely the default config allows booting for network and enable XHCI on
SMDK5420 which has it defined in the dts but not in its config.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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Add samsung,vbus-gpio information for the XU3. This allows the usage of
the EHCI controller on the XU3, which is connected to the SMSC LAN9514
chip (usb hub + network).
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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This patch adds support for Odroid-XU3.
Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Reviewed-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Tested-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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The media for boot and environment is a board-specific feature, not a
processor-specific. This is same to console port number and some
other addresses. This patch moves the that kinds of configs to each
board-specific files from the common config file for Exynos5420.
Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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The few Versatile Express ARMv8 platforms we have may just as
well be switched to generic board from the beginning.
Tested on the ARM foundation model and the in progress support
for the ARMv8 Juno board.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Steve Rae <srae@broadcom.com>
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Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
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There are two standard SD card slots on the Crown Bay board, which
are connected to the Topcliff PCH SDIO controllers. Enable the SDHC
support so that we can use them.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
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We don't have driver for the Intel Topcliff PCH Gigabit Ethernet
controller for now, so enable the Intle E1000 NIC support, which
can be plugged into any PCIe slot on the Crown Bay board.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
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The Crown Bay board has an SST25VF016B flash connected to the Tunnel
Creek processor SPI controller used as the BIOS media where U-Boot
is stored. Enable this flash support.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
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Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
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Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
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Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
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Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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The normal image is working on DRAM. It is better to use DRAM also
for init stack than L2 cache.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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A new interface is introduced to support generic board structure.
Converts it to use new interface.
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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Following boards has incorrect number of portals defined.
powerpc/T102xQDS
powerpc/T102xRDB
powerpc/T1040QDS
powerpc/T104xRDB
Signed-off-by: Jeffrey Ladouceur <Jeffrey.Ladouceur@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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Not all portals might be managed and therefore visible.
Set the isdr register so that the corresponding isr register
won't be set. This is required when supporting power management.
Signed-off-by: Jeffrey Ladouceur <Jeffrey.Ladouceur@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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Add following configs in header file:
CONFIG_SYS_GENERIC_BOARD
CONFIG_DISPLAY_BOARDINFO
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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Signed-off-by: Harninder Rai <harninder.rai@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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Remove the now unnecessary clocking info from the SoCFPGA
config header. As this info in now used directly in the SPI driver
itself.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Vince Bridgers <vbridger@altera.com>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
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Enable support for the DW master SPI controller in the config header
for the SoCFPGA. This controller can only be enabled, if DT support
is enabled.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Vince Bridgers <vbridger@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Pavel Machek <pavel@denx.de>
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With this driver enabled for SoCFPGA, access to SPI NOR flash is
supported.
The configuration (page size, timing info) will be taken from the
DT. See socrates as an example.
This QSPI supports depends on DT. So QSPI is only enabled if
CONFIG_OF_CONTROL is defined (see socfpga_socrates_defconfig).
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Vince Bridgers <vbridger@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
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This converts all Tegra boards over to use driver model for I2C. The driver
is adjusted to use driver model and the following obsolete CONFIGs are
removed:
- CONFIG_SYS_I2C_INIT_BOARD
- CONFIG_I2C_MULTI_BUS
- CONFIG_SYS_MAX_I2C_BUS
- CONFIG_SYS_I2C_SPEED
- CONFIG_SYS_I2C
This has been tested on:
- trimslice (no I2C)
- beaver
- Jetson-TK1
It has not been tested on Tegra 114 as I don't have that board.
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
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Nyan-big is a Tegra124 clamshell board that is very similar to venice2, but
it has a different panel, the sdcard cd and wp sense are flipped, and it has
a different revision of the AS3722 PMIC.
This is the Acer Chromebook 13 CB5-311-T7NN (13.3-inch HD, NVIDIA
Tegra K1, 2GB). The display is not currently supported, so it should
boot on other nyan-based Chromebooks also, but only the device tree for
nyan-big is provided here.
The device tree file is from Linux but with features removed which are
unlikely to be supported in U-Boot soon (regulators, pinmux). Also the
addresses are updated to 32-bit.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
(rebase, change to 'nyan-big', fix pinmux that resets nyan-big)
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Enable the options to bring up I2C on sandbox. Also enable all the available
I2C commands for testing purposes.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
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Adjust the configuration to use the driver model version of the pl01x
serial driver. Add the required platform data.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
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Conflicts:
board/freescale/mx6sxsabresd/mx6sxsabresd.c
Signed-off-by: Tom Rini <trini@ti.com>
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Add pinmux settings, implement board_ehci_hcd_init, board_usb_phy_mode
There are two usb port on mx6sxsabresd board:
1. otg port
2. host port
The following are the connection between usb controller and board usb
interface, host port has not ID pin set:
otg1 core <---> board otg port
otg2 core <---> board host port
In order to make host port work, board_usb_phy_mode return USB_INIT_HOST
to make host port work in HOST mode.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Ye Li <B37916@freescale.com>
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