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* Merge with git://www.denx.de/git/u-boot.gitStefan Roese2007-06-25-22/+35
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| * Coding stylke cleanup; rebuild CHANGELOGWolfgang Denk2007-06-22-21/+21
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| * Extend POST support for PPC440Igor Lisitsin2007-06-22-1/+14
| | | | | | | | | | | | | | Added memory, CPU, UART, I2C and SPR POST tests for PPC440. Signed-off-by: Igor Lisitsin <igor@emcraft.com> --
* | ppc4xx: Add pci_pre_init() for 405 boardsStefan Roese2007-06-25-20/+0
| | | | | | | | | | | | | | | | This patch removes the CFG_PCI_PRE_INIT option completely, since it's not needed anymore with the patch from Matthias Fuchs with the "weak" pci_pre_init() implementation. Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Maintenance patch for esd's CPCI405 derivatsMatthias Fuchs2007-06-25-0/+21
|/ | | | | | | | | -add pci_pre_init() for pci interrupt fixup code -disable phy sleep mode via reset_phy() function -use correct io accessors -cleanup Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
* Coding style cleanup. Refresh CHANGELOG.Wolfgang Denk2007-06-20-1/+1
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* Merge with git://www.denx.de/git/u-boot.gitStefan Roese2007-06-20-5/+30
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| * TQM5200: Add Flat Device Tree support, update default env. accordingly.Bartlomiej Sieka2007-06-08-3/+27
| | | | | | | | | | Signed-off-by: Jan Wrobel <wrr@semihalf.com> Acked-by: Bartlomiej Sieka <tur@semihalf.com>
| * Fix config problems on SC3 board; make ide_reset_timeout work.Wolfgang Denk2007-06-08-2/+3
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* | [ppc4xx] Fix problem with NAND booting on AMCC AcadiaStefan Roese2007-06-19-2/+2
| | | | | | | | | | | | | | | | The latest changes showed a problem with the location of the NAND-SPL image in the OCM and the init-data area (incl. cache). This patch fixes this problem. Signed-off-by: Stefan Roese <sr@denx.de>
* | [ppc4xx] Change lwmon5 port to work with recent 440 exception reworkStefan Roese2007-06-15-0/+1
| | | | | | | | | | | | Now CONFIG_440 has to be defined in all PPC440 board config files. Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge with /home/stefan/git/u-boot/denx-440-exceptionsStefan Roese2007-06-15-1/+13
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| * | ppc4xx: Clean up 440 exceptions handlingGrzegorz Bernacki2007-06-15-1/+13
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Introduced dedicated switches for building 440 and 405 images required for 440-specific machine instructions like 'rfmci' etc. - Exception vectors moved to the proper location (_start moved away from the critical exception handler space, which it occupied) - CriticalInput now serviced (with default handler) - MachineCheck properly serviced (added a dedicated handler and return subroutine) - Overall cleanup of exceptions declared with STD_EXCEPTION macro (unused, unhandled and those not relevant for 4xx were eliminated) - Eliminated Linux leftovers, removed dead code Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com> Signed-off-by: Rafal Jaworowski <raj@semihalf.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | [ppc4xx] Add initial lwmon5 board supportStefan Roese2007-06-15-0/+437
| | | | | | | | | | | | | | This patch adds initial support for the Liebherr lwmon5 board euqipped with an AMCC 440EPx PowerPC. Signed-off-by: Stefan Roese <sr@denx.de>
* | [ppc4xx] Extend 44x GPIO setup with default output stateStefan Roese2007-06-15-65/+65
|/ | | | | | | The board config array CFG_440_GPIO_TABLE for the ppc440 GPIO setup is extended with the default GPIO output state (level). Signed-off-by: Stefan Roese <sr@denx.de>
* Coding Style cleanup; generate new CHANGELOG file.Wolfgang Denk2007-06-06-19/+18
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Merge with /home/wd/git/u-boot/custodian/u-boot-mpc86xxWolfgang Denk2007-06-06-1/+9
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| * Merge branch 'mpc8641'Jon Loeliger2007-06-05-1/+9
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| | * mpc8641 image size cleanupEd Swarthout2007-06-05-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | e600 does not have a bootpg restriction. Move the version string to beginning of image at fff00000. Resetvec.S is not needed. Update flash copy instructions. Add tftpflash env variable Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
* | | Merge with /home/wd/git/u-boot/custodian/u-boot-armWolfgang Denk2007-06-06-9/+208
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| * | | Reduce line lengths to 80 characters max.Peter Pearse2007-05-18-2/+5
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| * | | Merge with git://www.denx.de/git/u-boot.gitPeter Pearse2007-05-18-36/+719
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| * | | | Add the files for the SMN42 boardPeter Pearse2007-05-09-0/+198
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| * | | | New board SMN42 branchPeter Pearse2007-05-09-8/+6
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* | | | Merge with /home/stefan/git/u-boot/acadia-nand-bootStefan Roese2007-06-06-33/+119
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| * | | | ppc4xx: Add NAND booting support for AMCC Acadia (405EZ) eval boardStefan Roese2007-06-06-33/+119
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds NAND booting support for the AMCC Acadia eval board. Please make sure to configure jumper J7 to position 2-3 when booting from NOR, and to position 1-2 when booting for NAND. I also added a board command to configure the I2C bootstrap EEPROM values. Right now only 267MHz is support for booting either via NOR or NAND FLASH. Here the usage: => bootstrap 267 nor ;to configure the board for 267MHz NOR booting => bootstrap 267 nand ;to configure the board for 267MHz NNAND booting Signed-off-by: Stefan Roese <sr@denx.de>
* | | | | Merge with /home/wd/git/u-boot/custodian/u-boot-ppc4xxWolfgang Denk2007-06-04-16/+88
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| * | | | Merge with /home/stefan/git/u-boot/bamboo-nandStefan Roese2007-06-01-15/+86
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| | * | | | ppc4xx: Update Sequoia NAND booting support with ECCStefan Roese2007-06-01-3/+10
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| | * | | | ppc4xx: Add NAND booting support for AMCC Bamboo (440EP) eval boardStefan Roese2007-06-01-12/+76
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds NAND booting support for the AMCC Bamboo eval board. Since the NAND-SPL boot image is limited to 4kbytes, this version only supports the onboard 64MBytes of DDR. The DIMM modules can't be supported, since the setup code for I2C DIMM autodetection and configuration is too big for this NAND bootloader. Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | | ppc4xx: Change Luan config file to support ECCStefan Roese2007-06-01-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the updated 44x DDR2 driver the Luan board now supports ECC generation and checking. Signed-off-by: Stefan Roese <sr@denx.de>
* | | | | | Merge with /home/wd/git/u-boot/stx-gp3ssaWolfgang Denk2007-05-31-17/+24
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| * | | | | Add support for STX GP3SSA (stxssa) Board with 4 MiB flash.Wolfgang Denk2007-05-31-17/+24
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | | | | | Merge with /home/tur/git/u-boot#motionproWolfgang Denk2007-05-28-78/+120
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| * | | | | | Motion-PRO: Code cleanup, fix of a typo in OF_STDOUT_PATH.Bartlomiej Sieka2007-05-27-16/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
| * | | | | | Motion-PRO: Add support for redundant environment.Bartlomiej Sieka2007-05-27-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable redundant environment, add a MTD partition for it; also add env. variable command for passing MTD partitions to the kernel command line. Signed-off-by: Piotr Kruszynski <ppk@semihalf.com> Acked-by: Bartlomiej Sieka <tur@semihalf.com>
| * | | | | | Motion-PRO: Change maximum console buffer size from 256 to 1024 bytes.Bartlomiej Sieka2007-05-27-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow passing longer command line to the kernel - useful especially for passing MTD partition layout. Signed-off-by: Piotr Kruszynski <ppk@semihalf.com> Acked-by: Bartlomiej Sieka <tur@semihalf.com>
| * | | | | | Motion-PRO: Update EEPROM's page write bits and write delay.Bartlomiej Sieka2007-05-27-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change EEPROM configuration according to the datasheet: "The 24C01A and 24C02A have a page write capability of two bytes", and "This device offers fast (1ms) byte write". Add 3ms of extra delay. Signed-off-by: Piotr Kruszynski <ppk@semihalf.com> Acked-by: Bartlomiej Sieka <tur@semihalf.com>
| * | | | | | MPC5XXX, Motion-PRO: Fix PHY initialization problem.Bartlomiej Sieka2007-05-27-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After being reset in mpc5xxx_fec_init_phy(), PHY goes into FX mode, in which networking does not function. This commit switches PHY to TX mode by clearing the FX_SEL bit of Mode Control Register. It also reverses commit 008861a2f3ef2c062744d733787c7e530a1b8761, i.e., a temporary workaround. Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com> Acked-by: Bartlomiej Sieka <tur@semihalf.com>
| * | | | | | Motion-PRO: Add support for the temperature sensor.Bartlomiej Sieka2007-05-27-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Piotr Kruszynski <ppk@semihalf.com> Acked-by: Bartlomiej Sieka <tur@semihalf.com>
| * | | | | | Motion-PRO: Add displaying of CPLD revision information during boot.Bartlomiej Sieka2007-05-27-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jan Wrobel <wrr@semihalf.com> Acked-by: Bartlomiej Sieka <tur@semihalf.com>
| * | | | | | MPC5xxx: Change names of defines related to IPB and PCI clocks.Bartlomiej Sieka2007-05-27-57/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Both CFG_PCISPEED_66 and CFG_IPBSPEED_133 are misnamed, as defining them does not cause PCI or IPB clocks to run at the specified speed. Instead, they configure divisors used to calculate said clocks. This patch renames the defines according to their real function. Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com> Acked-by: Bartlomiej Sieka <tur@semihalf.com>
| * | | | | | Motion-PRO: Add LED support.Bartlomiej Sieka2007-05-27-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jan Wrobel <wrr@semihalf.com> Signed-off-by: Marian Balakowicz <m8@semihalf.com> Acked-by: Bartlomiej Sieka <tur@semihalf.com>
* | | | | | | ppc4xx: Update AMCC Acadia support for board revision 1.1Stefan Roese2007-05-24-18/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates the Acadia (405EZ) support for the new 1.1 board revision. It also adds support for NAND FLASH via the 4xx NDFC. Please note that the jumper J7 must be in position 2-3 for this NAND support. Position 1-2 is for NAND booting only. NAND booting support will follow later. Signed-off-by: Stefan Roese <sr@denx.de>
* | | | | | | Merge with git://www.denx.de/git/u-boot.gitStefan Roese2007-05-18-446/+719
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| * | | | | | Minor Coding Style cleanup, update CHANGELOG.Wolfgang Denk2007-05-16-24/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
| * | | | | | Merge with /home/wd/git/u-boot/custodian/u-boot-mpc83xxWolfgang Denk2007-05-16-0/+572
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| | * | | | | | Fix memory initialization on MPC8349E-mITXTimur Tabi2007-05-01-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Define CFG_DDR_SDRAM_CLK_CNTL for the MPC8349E-mITX and MPC8349E-mITX-GP. This allows ddr->sdram_clk_cntl to be properly initialized. This is necessary on some ITX boards, notably those with a revision 3.1 CPU. Also change spd_sdram() in cpu/mpc83xx/spd_sdram.c to not write anything into ddr->sdram_clk_cntl if CFG_DDR_SDRAM_CLK_CNTL is not defined. Signed-off-by: Timur Tabi <timur@freescale.com> Acked-by: Michael Benedict <MBenedict@twacs.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| | * | | | | | mpc83xx: minor fixups for 8313rdb introductionKim Phillips2007-04-25-2/+2
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| | * | | | | | mpc83xx: Add MPC8313ERDB support.Scott Wood2007-04-23-0/+569
| | | |_|_|_|/ | | |/| | | | | | | | | | | | | | | | | | Signed-off-by: Scott Wood <scottwood@freescale.com>
generated by cgit v1.1 at 2024-11-24 03:36:48 +0000