| Commit message (Collapse) | Author | Age | Lines |
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Signed-off-by: Jon Loeliger <jdl@freescale.com>
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Added code for reading and writing Mac addresses to/from ID EEPROM(0x57).
With attached patch, we can use command "mac/mac read/mac save/"
to read and write EEPROM under u-boot prompt.
U-boot will calculate the checksum of EEPROM while bootup,
if it is right, then u-boot will check whether the mac address
of eTSEC0/1/2/3 is availalbe (non-zero).
If there is mac address availabe in EEPROM, u-boot will use it,
otherewise, u-boot will use the mac address defined in
MPC8641HPCN.h. This matches the requirement to set unique mac address
for each TSEC port.
Signed-off-by: Haiying Wang <haiying.wang@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
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Signed-off-by:Jason Jin <Jason.jin@freescale.com>
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signed-off-by: Jason Jin <Jason.Jin@freescale.com>
signed-off-by: Wei Zhang <wei.zhang@freescale.com>
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Signed-off-by: Jason Jin <Jason.jin@freescale.com>
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Enable the CFI driver.
Remove bogus LAWBAR7 cruft.
Use correct TEXT_BASE, Fixup load script.
Enable SPD EEPROM during DDR setup.
Use generic RFC 1918 IP addresses by default.
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Removed //-style comments.
Use 80-column lines.
Remove trailing whitespace.
Remove dead code and debug cruft.
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Signed-off-by: dzu@denx.de <dzu@denx.de>
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Signed-off-by: dzu@denx.de <dzu@denx.de>
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- Fix dbau1x00 boards broken by dbau1550 patch
PLL:s were not set for boards other than 1550.
Flash CFI caused card to hang due to undefined CFG_FLASH_BANKS_LIST.
Default boot is now bootp for cards other than 1550.
Patch by Thomas Lange Aug 10 2005
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Some more NAND cleanup and small fixes.
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- Add Intel legacy lock/unlock support to common CFI driver
On some Intel flash's (e.g. Intel J3) legacy unlocking is
supported, meaning that unlocking of one sector will unlock
all sectors of this bank. Using this feature, unlocking
of all sectors upon startup (via env var "unlock=yes") will
get much faster.
- Fixed problem with multiple reads of envronment variable
"unlock" as pointed out by Reinhard Arlt & Anders Larsen.
- Removed unwanted linefeeds from "protect" command when
CFG_FLASH_PROTECTION is enabled.
- Changed p3p400 board to use CFG_FLASH_PROTECTION
Patch by Stefan Roese, 01 Apr 2006
* Changes/fixes for drivers/cfi_flash.c:
- Correctly handle the cases where CFG_HZ != 1000 (several
XScale-based boards)
- Fix the timeout calculation of buffered writes (off by a
factor of 1000)
Patch by Anders Larsen, 31 Mar 2006
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405 SDRAM: - The SDRAM parameters can now be defined in the board
config file and the 405 SDRAM controller values will
be calculated upon bootup (see PPChameleonEVB).
When those settings are not defined in the board
config file, the register setup will be as it is now,
so this implementation should not break any current
design using this code.
Thanks to Andrea Marson from DAVE for this patch.
440 DDR: - Added function sdram_tr1_set to auto calculate the
TR1 value for the DDR.
- Added ECC support (see p3p440).
Patch by Stefan Roese, 17 Mar 2006
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multiple-bit errors.
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Patch by Patch by Jose Maria (Txema) Lopez, 16 Jan 2006
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Patch by Yuli Barcohen, 13 Jul 2005
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Patch by Kumar Gala 11 Jan 2006
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Patch by Kumar Gala, 10 Feb 2006
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Patch by Kumar Gala, 11 Jan 2006
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CONFIG_OF_HAS_BD_T will put a copy of the bd_t
into the resulting flat device tree.
CONFIG_OF_HAS_UBOOT_ENV will copy the environment
variables from u-boot into the flat device tree
Patch by Kumar Gala 11 Jan 2006
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Patch by Sam Song, 19 Jun 2005
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Patch by Sam Song, 19 Jun 2005
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variable to set clock
Patch by Yuli Barcohen, 05 Jun 2005
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