| Commit message (Collapse) | Author | Age | Lines |
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This patch adds the minimal support for OMAP5. The platform and machine
specific headers and sources updated for OMAP5430.
OMAP5430 is Texas Instrument's SOC based on ARM Cortex-A15 SMP architecture.
It's a dual core SOC with GIC used for interrupt handling and SCU for cache
coherency.
Also moved some part of code from the basic platform support that can be made
common for OMAP4/5. Rest is kept out seperately. The same approach is followed
for clocks and emif support in the subsequent patches.
Signed-off-by: sricharan <r.sricharan@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
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Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Robert Schwebel <robert@schwebel.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
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m28evk has one bank of RAM.
Fix the comment.
Cc: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
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This enables the second port, aka. the port with the USB connector on the
M28EVK.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
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This code allows the DDR DRAM size to be detected at runtime. The RAM size is
stored into two scratch registers, from which it is then fetched in U-Boot.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
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This patch introduces proper ARM vector handling for i.MX28 CPU. This issue
wasn't addressed because the interrupts weren't enabled on any ARMv5 core,
therefore the issue wasn't noticed earlier.
In previous implementation, the vectoring code used by i.MX28 CPU when an
exception happened was that of the SPL. With this change, the branch target when
an exception happens can be reconfigured by U-Boot.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
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This patch adds SPL code for the M28 board.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Andy Fleming <afleming@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
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This contains support for the following components:
- DUART
- MMC
- Both FEC interfaces
- NAND
- I2C (RTC, EEPROM)
- SPI (FLASH)
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
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add new configuration file da850_am18xxevm.h for AM18xx boards
which are based on da850 SOC. AM18xx has WINBOND spi flash which
is indicated in the config file. And make appropriate changes in
board.cfg for building.
Signed-off-by: Nagabhushana Netagunte <nagabhushana.netagunte@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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This is needed to support the latest kernel versions.
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Alexander Holler <holler@ahsoftware.de>
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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The devkit8000 ships with either a 128MB or 256MB NAND chip. In
order for SPL to work with 256MB NAND CONFIG_SYS_NAND_5_ADDR_CYCLE
needs to be set. After talking with Scott Wood this should be
safe to set even for smaller NAND chips.
Cc: Scott Wood <scottwood@freescale.com>
Cc: Frederik Kriewitz <frederik@kriewitz.eu>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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Do away with the config.mk file and move the text offset to the
config files to make things easier.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Signed-off-by: Asen Chavdarov Dimov <dimov@ronetix.at>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
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add a function in board file to pass board revision
info to kernel. Revision number 0 and 1 are passed in
case of DM6467 and DM6467T respectively.
Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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add new configuration file for dm6467T and appropraite changes
in boards.cfg. dm6467T is the new varaiant of dm6467 SOC which
supports 33 MHz reference clock where as dm6467 supports 27 MHz
reference clock.
Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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Signed-off-by: David Mueller <d.mueller@elsoft.ch>
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* 'master' of git://git.denx.de/u-boot-mpc83xx:
powerpc/mpc83xx: Add 33.33MHz support for mpc8360emds
powerpc/mpc83xx: Add 512MB DDR support for mpc8360emds
mpc83xx: Rename CONFIG_SYS_DDR_CONFIG and cleanup DDR csbnds code
mpc83xx: Cleanup usage of LBC constants
mpc83xx: Cleanup usage of DDR constants
mpc83xx: Cleanup usage of BAT constants
mpc83xx: cosmetic: vme8349.h checkpatch compliance
mpc83xx: cosmetic: ve8313.h checkpatch compliance
mpc83xx: cosmetic: sbc8349.h checkpatch compliance
mpc83xx: cosmetic: mpc8308_p1m.h checkpatch compliance
mpc83xx: cosmetic: kmeter1.h checkpatch compliance
mpc83xx: cosmetic: TQM834x.h checkpatch compliance
mpc83xx: cosmetic: SIMPC8313.h checkpatch compliance
mpc83xx: cosmetic: MVBLM7.h checkpatch compliance
mpc83xx: cosmetic: MPC837XERDB.h checkpatch compliance
mpc83xx: cosmetic: MPC837XEMDS.h checkpatch compliance
mpc83xx: cosmetic: MPC8360ERDK.h checkpatch compliance
mpc83xx: cosmetic: MPC8360EMDS.h checkpatch compliance
mpc83xx: cosmetic: MPC8349ITX.h checkpatch compliance
mpc83xx: cosmetic: MPC8349EMDS.h checkpatch compliance
mpc83xx: cosmetic: MPC832XEMDS.h checkpatch compliance
mpc83xx: cosmetic: MPC8323ERDB.h checkpatch compliance
mpc83xx: cosmetic: MPC8315ERDB.h checkpatch compliance
mpc83xx: cosmetic: MPC8313ERDB.h checkpatch compliance
mpc83xx: cosmetic: MPC8308RDB.h checkpatch compliance
mpc83xx: cosmetic: MERGERBOX.h checkpatch compliance
mpc83xx: Fix ipic structure definition
powerpc, mpc83xx: add DDR SDRAM Timing Configuration 3 definitions
cosmetic, powerpc, mpc83xx: checkpatch cleanup
powerpc/83xx: move km 83xx specific i2c code to km83xx_i2c
mpc83xx: fix global timer structure definition
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The new MPC8360EMDS board changes the oscillator to 33.33MHz
in order to support QE 500MHz since 2008.
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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The new MPC8360EMDS board supports 512MB DDR since 2008.
For 512MB DDR:
BAT0 is used for the first 256MB memory, BAT4 is used for the second
256MB memory and the address space of SDRAM follows the DDR, so if the
size of DDR is 256MB, the BAT4 will be used for SDRAM and if the size of
DDR is 512MB, the BAT4 will be used for the second 256MB memory and
there is no BAT for SDRAM.
Therefore, if the size of DDR is 512MB, this patch will use BAT6 for
SDRAM and BAT5 will be used for PCI MEM to replace the BAT6 after the
codes relocates to the DDR.
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
CC: Kim Phillips <kim.phillips@freescale.com>
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Rename CONFIG_SYS_DDR_CONFIG to include which CS it is configuring
Cleanup the setting of the csnbds to respect the setting of
CONFIG_SYS_DDR_SDRAM_BASE
Use __ilog2 instead of writing the code to compute it
Disable unused CS configs
Ensure ddrlaw.bar is configured
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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* 'master' of git://git.denx.de/u-boot-arm:
Arm: re-introduce the MACH_TYPE_XXXXXX for EB_CPUX9K2 board
arm: jadecpu: Readd MACH_TYPE_JADECPU
at91: defined mach-types for otc570 board in board config file
at91: defined mach-types for meesc board in board config file
mx31pdk: Enable D and I caches
ehci-mxc: remove incorrect comment
README: Fix supported i.MX SoC list for CONFIG_MXC_SPI
mx53: Turn off child clocks before reconfigure perclk_root
qong: enable support for compressed images
imx: imx31_phycore.h: fix checkpatch warnings
vision2: Remove unused get_board_rev function
mx53smd: Remove unused get_board_rev function
mx53ard: Remove unused get_board_rev function
mx53evk: Remove unused get_board_rev function
mx53evk: Add RTC support
mx53loco: Remove unused get_board_rev function
mx53evk: Remove unneeded '1' from mx53evk.h
OMAP3: mvblx: Initial support for mvBlueLYNX-X
ARM: dig297: Define MACH_TYPE_OMAP3_CPS and CONFIG_MACH_TYPE
omap3: mem: Move comments next to definitions
omap3: mem: Clean-up whitespaces
omap3: mem: Define and use common macros
Davinci: ea20: added PREBOOT to configuration
Davinci: ea20: added I2C support
Davinci: ea20: added video support
VIDEO: davinci: add framebuffer to da8xx
ARM: Davinci: added missing registers to hardware.h
Davinci: ea20: add gpios for LCD backlight control
Davinci: ea20: add gpio for keeping power on in board_late_init
Davinci: ea20: Add default U-Boot environment
Davinci: ea20: Add early init to get early output from console
Davinci: ea20: Add NAND support
Davinci: ea20: set GPIOs to hold MII-Phy in reset and set UART0-Switch for console
Davinci: ea20: set console on UART0
arm, davinci: add cam_enc_4xx support
arm926ejs, davinci: add missing spi defines for dm365
arm926ejs, davinci: add cpuinfo for dm365
arm, davinci: add lowlevel function for dm365 soc
arm, davinci: add header files for dm365
spl, nand: add 4bit HW ecc oob first nand_read_page function
arm, davinci: add support for new spl framework
spl: add option for adding post memory test to the SPL framework
net, davinci_emac: make clock divider in MDIO control register configurable
arm, usb, davinci: make USBPHY_CTL register configurable
usb, davinci: add enable_vbus() weak function
omap3evm: fix errors caused by multiple definitions
omap3evm: Add (quick) configuration for NAND only
omap3evm: Add (quick) configuration for MMC/SD only
omap3evm: move common config options to new file
omap3evm: Prepare to split configuration
omap3evm: Reorder related config options
omap/spl: actually enable the console
davinci_emac: compilation fix, phy is array now
omap3evm: Set environment variable 'ethaddr'
arm, arm926: fix missing symbols in NAND_SPL mode
arm, davinci: Add function lpsc_syncreset()
arm, davinci: replace CONFIG_PRELOADER with CONFIG_SPL_BUILD
arm/km: portl2 environment address update to P1B
arm/km: adapt bootcounter evaluation
arm/km: enable jffs2 cmds
arm/km: trigger reconfiguration for the Xilinx FPGA
arm/km: add boardid and hwkey to kernel command line
ARM: Reintroduce MACH_TYPE_KM_KIRKWOOD for keymile ARM boards
netspace_v2: enable I2C EEPROM support
netspace_v2: fix SDRAM configuration
armada100: define CONFIG_SYS_CACHELINE_SIZE
pantheon: define CONFIG_SYS_CACHELINE_SIZE
kirkwood: define CONFIG_SYS_CACHELINE_SIZE
kirkwood: drop empty asm-offsets.s file
arm/km/mgcoge3un: enhance "waitforne" feature
arm/km: add variable waitforne to mgcoge3un
gplugD: Fix for error:MACH_TYPE_SHEEVAD undeclared
ARM: dreamplug: fix compilation
ARM: DockStar: fix compilation
ARM: netspace_v2: fix warnings
am335x: Drop board_sysinfo struct
am335x: Temporarily add MACH_TYPE define
misc:pmic:samsung Enable PMIC driver at C210 Universal target
dcache:s5p CONFIG_SYS_CACHELINE_SIZE added for s5p UNIVERSAL C210 target
dcache:s5p CONFIG_SYS_CACHELINE_SIZE added for s5p GONI target
smdkv310: use macro for mmc data read function address
smdkv310: use spl framework for mmc spl
SMDKV310: use get_ram_size() to validate dram size
SMDKV310: Initialize board id using CONFIG_MACH_TYPE
ORIGEN : use absolute paths and fix tool naming
ORIGEN : enable device tree support
MX25: tx25: Fix building due to missing MACH_TYPE
mx31: Add board support for HALE TT-01
mx31: add ESD control registers
mx31: define pins and init for UART2 and CSPI3
MX35: add support for flea3 board
MX51: vision2: add MACH_TYPE in config file
vision2: Remove unused header file
mx51evk: Remove unused get_board_rev function
mx51evk: Remove unneeded '1' from mx51evk.h
I2C: Fix mxc_i2c.c problem on imx31_phycore
mx35pdk: Add RTC support
mx51evk: Use GPIO API for configuring the IOMUX
mx51evk: Add RTC support
rtc: Make mc13783-rtc driver generic
qong: remove unneeded IOMUX settings
qong: Use mx31_set_gpr to setup USBH2 pins
mx31: Introduce mx31_set_gpr function
mx31pdk: Add MC13783 PMIC support
qong: remove unneeded "1" from qong.h
misc: pmic: fix regression in pmic_fsl.c (SPI)
mx5 configs: CONFIG_PRIME should really be CONFIG_ETHPRIME
MX35: Drop unnecessary prototypes from imx-regs.h
I2C: added I2C-2 and I2C-3 to MX35
MX35: factorize common assembly code
MX35: add reset cause as provided by other i.MX
MX35: add pins definition for UART3
MX35: added ESDC structure to imx-regs
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* re-introduce the MACH_TYPE_XXXXXX for EB_CPUX9K2 board
Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
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MACH_TYPE_JADECPU was removed from mach-types.h. Add it to board
config file.
Signed-off-by: Matthias Weisser <weisserm@arcor.de>
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quotation from Albert ARIBAUD:
"Recently the ARM mach-types.h file has been brought in sync with its
Linux original, leasing to a number of boards not being listed any more,
as the new list only contains boards which have actual Linux support or
were declared less than one year ago.
The symptom is a build failure with a message of the form "error:
'MACH_TYPE_XXXXXX' undeclared (first use in this function)".
U-Boot maintainers of such boards (in Cc: of this mail) should provide a
patch to re-introduce the MACH_TYPE_XXXXXX definition in their boards'
config header file in include/configs/."
Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
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quotation from Albert ARIBAUD:
"Recently the ARM mach-types.h file has been brought in sync with its
Linux original, leasing to a number of boards not being listed any more,
as the new list only contains boards which have actual Linux support or
were declared less than one year ago.
The symptom is a build failure with a message of the form "error:
'MACH_TYPE_XXXXXX' undeclared (first use in this function)".
U-Boot maintainers of such boards (in Cc: of this mail) should provide a
patch to re-introduce the MACH_TYPE_XXXXXX definition in their boards'
config header file in include/configs/."
Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
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- enable support for unzip command
- enable support for compressed bitmap images
We also have to increase the malloc() arena a bit for this.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
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