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* arm: socfpga: Add SoCFPGA SR1500 boardStefan Roese2015-12-07-0/+115
| | | | | | | | | | | | | | | The SR1500 board is a CycloneV based board, similar to the EBV SoCrates, equipped with the following devices: - SPI NOR - eMMC - Ethernet Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Cc: Pavel Machek <pavel@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de>
* eeprom: Zap CONFIG_SYS_I2C_MULTI_EEPROMSMarek Vasut2015-12-05-5/+0
| | | | | | | | | This symbol is no longer used anywhere, remove it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@konsulko.com> Acked-by: Heiko Schocher <hs@denx.de>
* Fix typo: commmand -> command.Vagrant Cascadian2015-12-05-1/+1
| | | | | Signed-off-by: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
* Merge branch 'master' of http://git.denx.de/u-boot-sparcTom Rini2015-12-04-22/+22
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| * sparc: Add CONFIG_DISPLAY_BOARDINFO variable to all LEON boardsFrancois Retief2015-12-03-5/+10
| | | | | | | | Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
| * sparc: leon2: Updates for generic board initializationFrancois Retief2015-12-03-2/+4
| | | | | | | | | | | | | | | | | | | | Reworked the LEON2 start.S code to call board_init_f function at startup. Also implemented the relocate_code function in assembly to relocate the monitor and setup the stack pointer before calling relocated board_init_r. Add the CONFIG_SYS_GENERIC_BOARD variable to all the LEON2 boards. Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
| * sparc: leon3: Updates for generic board initializationFrancois Retief2015-12-03-0/+8
| | | | | | | | | | | | | | | | | | | | Reworked the LEON3 start.S code to call board_init_f function at startup. Also implemented the relocate_code function in assembly to relocate the monitor and setup the stack pointer before calling relocated board_init_r. Add the CONFIG_SYS_GENERIC_BOARD variable to all the LEON3 boards. Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
| * sparc: Move SYS_SPARC_NWINDOWS to KconfigFrancois Retief2015-12-03-15/+0
| | | | | | | | Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2015-12-04-8/+67
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| * arm: imx6: novena: Enable extfs support in SPLMarek Vasut2015-12-01-0/+1
| | | | | | | | | | | | | | | | Simple patch to enable support for extfs filesystem in SPL, this is useful to those who want to avoid vfat like plague. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * cgtqmx6eval: Add DFU supportOtavio Salvador2015-11-25-0/+10
| | | | | | | | | | | | | | Add MMC and SPI DFU support. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
| * cgtqmx6eval: Add SPL supportOtavio Salvador2015-11-25-1/+21
| | | | | | | | | | | | | | | | | | Congatec has several MX6 boards based on quad, dual, dual-lite and solo. Add SPL support so that all the variants can be supported Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
| * cgtqmx6eval: Add fastboot supportOtavio Salvador2015-11-25-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tested basic fastboot commands, such as: On the U-boot prompt: => fastboot 0 On the host PC: $ fastboot getvar bootloader-version -i 0x0525 bootloader-version: U-Boot 2015.10-rc2-09654-g8f41d27 finished. total time: 0.000s $ fastboot reboot -i 0x0525 --> board reboots fine. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
| * cgtqmx6eval: Use SPI NOR to store the environmentOtavio Salvador2015-11-25-4/+14
| | | | | | | | | | | | | | | | Congatec boards boot from SPI NOR, so it makes more sense to use SPI NOR to store the environment variables. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
| * cgtqmx6eval: Add SPI NOR flash supportOtavio Salvador2015-11-25-0/+12
| | | | | | | | | | | | | | | | | | | | Add SPI NOR support: => sf probe SF: Detected SST25VF032B with page size 256 Bytes, erase size 4 KiB, total 4 MiB Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
| * arm: mx6: Reduce SPL malloc pool sizeMarek Vasut2015-11-23-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | Using 50 MiB malloc pool in SPL is nonsense. Since the caches are not enabled in SPL, it takes 2 seconds to init the pool and has no obvious benefit. Reduce the size to 1 MiB. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Tested-by: Stefano Babic <sbabic@denx.de> Acked-by: Tim Harvey <tharvey@gateworks.com>
* | iocon: Disable FIT_VERBOSETom Rini2015-12-01-2/+0
| | | | | | | | | | | | In order to fit into image constraints again, remove this feature. Signed-off-by: Tom Rini <trini@konsulko.com>
* | rockchip: move SYS_MALLOC_SIMPLE to mach-rockchip KconfigAriel D'Alessandro2015-12-01-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 1eb0c03c2198a7ec9de456b83dacdc4831b96cbf added SPL_SYS_MALLOC_SIMPLE Kconfig option and changed the way it is evaluated. Thus, the definitions of CONFIG_SYS_MALLOC_SIMPLE in rk3***_common.h board configs are now incorrect because CONFIG_SPL_BUILD is enabled so CONFIG_IS_ENABLED(SYS_MALLOC_SIMPLE) will look for SPL_SYS_MALLOC_SIMPLE instead of SYS_MALLOC_SIMPLE. This commit fix this enabling SPL_SYS_MALLOC_SIMPLE with the new Kconfig option by default in rockchip-mach. Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar> Acked-by: Simon Glass <sjg@chromium.org>
* | rockchip: Add basic support for evb-rk3036 boardhuang lin2015-12-01-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This add some basic files required to allow the board to dispaly serial message and can run command(mmc info etc) Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Moved board Kconfig fragment from previous patch into this one to fix build error: Signed-off-by: Simon Glass <sjg@chromium.org> Series-changes: 8 - moved board Kconfig fragment from previous patch into this one
* | rockchip: rk3036: Add core Soc start-up codehuang lin2015-12-01-0/+103
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | rk3036 only 4K size SRAM for SPL, so only support timer, uart, sdram driver in SPL stage, when finish initial sdram, back to bootrom.And in rk3036 sdmmc and debug uart use same iomux, so if you want to boot from sdmmc, you must disable debug uart. Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Fixed build error for chromebook_jerry, firefly-rk3288: Signed-off-by: Simon Glass <sjg@chromium.org> Series-changes: 8 - Fix build error for chromebook_jerry, firefly-rk3288
* | rockchip: add config decide whether to build common.chuang lin2015-12-01-0/+3
| | | | | | | | | | | | | | | | some rockchips soc will not use uclass in SPL stage, so define config to decide whether to build common.c Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* | rockchip: add timer driverhuang lin2015-12-01-1/+2
| | | | | | | | | | | | | | | | some rockchip soc will not include lib/timer.c in SPL stage, so implement timer driver for some soc can use us delay function in SPL. Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* | rockchip: firefly: Save the environment on SD cardSjoerd Simons2015-12-01-1/+9
| | | | | | | | | | | | | | | | Save the environment on the SD card for Firefly in the empty space between the SPL and the u-boot image. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org>
* | rockchip: Also load the initrd below 512MSjoerd Simons2015-12-01-0/+1
| | | | | | | | | | | | | | | | | | Similar to load an fdt, when loading an initrd about the 512Mb mark things seem to break. For now force loading below 512Mb until the reason why this fails has been determined/solved. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org>
* | dm: pci: Avoid a driver model build error with CONFIG_CMD_PCI_ENUMSimon Glass2015-12-01-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | This is not supported with driver model, so print a message instead of generating a build error. Rescanning PCI is not yet implemented. This function will be implemented later once some additional PCI driver model improvements are merged. It was confirmed on the mailing list that no one on the tegra side will miss this feature, so it is disabled for tegra. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com>
* | dm: tegra: pci: Move CONFIG_PCI_TEGRA to KconfigSimon Glass2015-12-01-6/+0
| | | | | | | | | | | | | | Move this option to Kconfig and fix up all users. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com>
* | x86: tsc: Move tsc_timer.c to drivers/timerBin Meng2015-12-01-2/+0
| | | | | | | | | | | | | | | | To group all dm timer drivers together, move tsc timer to drivers/timer directory. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-atmelTom Rini2015-11-30-0/+122
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| * | arm: atmel: Add SAMA5D2 Xplained boardWenyou Yang2015-11-30-0/+122
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The board supports following features: - Boot media support: SD card/e.MMC/SPI flash, - Support LCD display (optional, disabled by default), - Support ethernet, - Support USB mass storage. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> [fix checkpatch warnings] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2015-11-30-34/+454
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| * | | armv8: ls2080a: Define CONFIG_ENV_OVERWRITE to overwrite serial and ethaddrAlison Wang2015-11-30-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As the environment variables "serial#" and "ethaddr" need to be overwriten by the users, CONFIG_ENV_OVERWRITE is defined to disable the write protection. Anybody can change or delete these parameters. Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | arm: ls102xa: Update fdt_high and initrd_high for LS1021AQDS boardAlison Wang2015-11-30-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As 3G/1G user/kernel memory split is used on LS1021A, the Linux kernel fails to access the device tree blob on boot. The reason is that u-boot relocates the device tree blob into high memory when booting the kernel and the kernel is unable to access the blob. To avoid this issue, fdt_high is set to the value of 0xffffffff. The device tree blob will not get relocated and is still in low memory to make it accessible to the kernel. For the same reason, initrd_high is set to the value of 0xffffffff too. This patch is to update fdt_high and initrd_high for LS1021AQDS board. Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | armv8/ls1043ardb: add USB supportGong Qianyu2015-11-30-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the third USB controller for LS1043A. Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | armv8/ls1043ardb: add DSPI supportGong Qianyu2015-11-30-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the U-Boot Driver Model. Just enable Freescale DSPI driver and set DSPI related parameters in dts file. Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | armv8/ls1043aqds: add LS1043AQDS board supportShaohui Xie2015-11-30-0/+387
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LS1043AQDS Specification: ------------------------- Memory subsystem: * 2GByte DDR4 DIMM * 128 Mbyte NOR flash single-chip memory * 512 Mbyte NAND flash * 16 Mbyte high-speed SPI flash * SD connector to interface with the SD memory card Ethernet: * Two RGMII ports * XFI 10G port * SGMII * QSGMII with 4x 1G ports PCIe: supports Gen 1 and Gen 2 SATA 3.0: one SATA 3.0 port USB 3.0: two micro AB connector and one type A connector UART: supports two UARTs up to 115200 bps for console Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> [York Sun: Add CONFIG_SYS_NS16550=y in defconfig] Reviewed-by: York Sun <yorksun@freescale.com>
| * | | armv8: ls2085a: Add support of LS2085A SoCPrabhakar Kushwaha2015-11-30-2/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Freescale's LS2085A is a another personality of LS2080A SoC with support of AIOP and DP-DDR. This Patch adds support of LS2085A Personality. Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> [York Sun: Updated MAINTAINERS files Dropped #ifdef in cpu.h Add CONFIG_SYS_NS16550=y in defconfig] Reviewed-by: York Sun <yorksun@freescale.com>
| * | | armv8: LS2080A: Rename LS2085A to reflect LS2080APrabhakar Kushwaha2015-11-30-11/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LS2080A is a prime personality of Freescale’s LS2085A. It is a non-AIOP personality without support of DP-DDR, L2 switch, 1588, PCIe endpoint etc. So renaming existing LS2085A code base to reflect LS2080A (Prime personality) Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> [York Sun: Dropped #ifdef in cpu.c for cpu_type_list] Reviewed-by: York Sun <yorksun@freescale.com>
| * | | driver: net: fsl-mc: Add DPAA2 commands to manage MCPrabhakar Kushwaha2015-11-30-24/+0
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Management complex Firmware, DPL and DPC are depolyed during u-boot boot sequence. Add new DPAA2 commands to manage Management Complex (MC) i.e. start mc, aiop and apply DPL from u-boot command prompt. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | | Merge git://git.denx.de/u-boot-socfpgaTom Rini2015-11-30-11/+100
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| * | | arm: socfpga: Remove fsloadcmd from environmentChin Liang See2015-11-30-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove fsloadcmd / ext2load as we are using load command which use the corresponding latest file system command. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Reviewed-by: Stefan Roese <sr@denx.de>
| * | | mmc: socfpga_dw_mmc: Move drvsel and smplsel to dtsChin Liang See2015-11-30-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | socfpga_dw_mmc driver will obtain the drvsel and smplsel value from device tree instead of definition in config header file. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com> Cc: Simon Glass <sjg@chromium.org> Cc: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Marek Vasut <marex@denx.de>
| * | | arm: socfpga: Repair SoCrates boardMarek Vasut2015-11-30-0/+96
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This board was constantly parasiting on the CV SoCDK, so split it into it's own separate directory. Moreover, the board config was missing important bits, like simple-bus support in SPL, the DRAM configuration was incorrect and the DTS was also missing the pre reloc bits. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Jan Viktorin <viktorin@rehivetech.com>
| * | | ARM: socfpga: rename the cyclone5 and arria5 base address fileDinh Nguyen2015-11-30-5/+5
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | When adding support for the Arria10 platform, we're going to name the file base_addr_a10.h, so to be systematic about it, rename the socfpga_base_addr.h to be base_addr_ac5.h for the Arria5 and Cyclone5 platform. Suggested-by: Marek Vasut <marex@denx.de> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* | | arm: kirkwood: add ZyXEL NSA310S deviceGerald Kerma2015-11-29-0/+99
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add ZyXEL NSA310S 1-Bay Media Server The ZyXEL NSA310S device is a Kirkwood based NAS: - SoC: Marvell 88F6702 1000Mhz - SDRAM memory: 256MB DDR2 400Mhz - Gigabit ethernet: PHY Marvell 88E1318 - Flash memory: 128MB - 1 Power button - 1 Power LED (blue) - 4 Status LED (green) - 1 Copy/Sync button - 1 Reset button - 1 SATA II port - 2 USB 2.0 ports (front and back) - Smart fan Signed-off-by: Gerald Kerma <dreagle@doukki.net> Signed-off-by: Tony Dinh <mibodhi@gmail.com> Signed-off-by: Luka Perkov <luka.perkov@sartura.hr>
* | sf: Move SPI flash drivers to defconfigBin Meng2015-11-25-179/+0
| | | | | | | | | | | | | | | | There are already Kconfig options for SPI flash drivers, but we have not moved them from config.h to defconfig files. This commit does this in a batch. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
* | spi: Move SPI drivers to defconfigBin Meng2015-11-25-46/+0
| | | | | | | | | | | | | | | | There are already Kconfig options for SPI drivers, but we have not moved them from config.h to defconfig files. This commit does this in a batch. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
* | Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2015-11-22-5/+27
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| * | sunxi: Add basic H3 supportJens Kuske2015-11-22-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Add initial sun8i H3 support, only uart + mmc are supported for now. Signed-off-by: Jens Kuske <jenskuske@gmail.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * | sunxi: Enable DFU for RAMSiarhei Siamashka2015-11-22-5/+25
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DFU protocol implementation in U-Boot is much faster than the FEL protocol implementation in the boot ROM on Allwinner devices. Using DFU instead of FEL improves the USB transfer speed from 500-900 KB/s to 3.2-3.7 MB/s. This is particularly useful for reducing the time needed for booting systems with large initrd images. FEL is still useful for loading the U-Boot bootloader and a boot script, which may then activate DFU in the following way: setenv dfu_alt_info ${dfu_alt_info_ram} dfu 0 ram 0 bootm ${kernel_addr_r} ${ramdisk_addr_r} ${fdt_addr_r} The rest of the files can be transferred to the device using the "dfu-util" tool. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | vexpress64: store env in flashRyan Harkin2015-11-21-17/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for storing the environment in CFI NOR flash on Juno and FVP models. I also removed some config values that are not used by CFI flash parts. Juno has 1 flash part with 259 sectors. The first 255 sectors are 0x40000 (256kb) and are followed by 4 sectors of 0x10000 (64KB). FVP models simulate a 64MB NOR flash part at base address 0x0FFC0000. This part has 256 x 256kb sectors. We use the last sector to store the environment. To save the NOR flash to a file, the following parameters should be passed to the model: -C bp.flashloader1.fname=${FILENAME} -C bp.flashloader1.fnameWrite=${FILENAME} Foundation models don't simulate the NOR flash, but having NOR support in the u-boot binary does not harm: attempting to write to the NOR will fail gracefully. Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
generated by cgit v1.1 at 2024-08-26 20:19:21 +0000