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* arm: socfpga: clock: Add code to read clock configurationPavel Machek2014-10-06-0/+1
| | | | | | | | | | | | | | | | | | Add the entire bulk of code to read out clock configuration from the SoCFPGA CPU registers. This is important for MMC, QSPI and UART drivers as otherwise they cannot determine the frequency of their upstream clock. Signed-off-by: Pavel Machek <pavel@denx.de> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> V2: Fixed the L4 MP clock divider and synced the clock code with latest rocketboards codebase (thanks Dinh for pointing this out)
* net: Remove unused CONFIG_DW_SEARCH_PHY from configsPavel Machek2014-10-06-2/+0
| | | | | | | | | | | | | | | Remove this symbol from configs, since it's unused. Signed-off-by: Pavel Machek <pavel@denx.de> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Cc: Joe Hershberger <joe.hershberger@gmail.com> Acked-by: Chin Liang See <clsee@altera.com>
* Merge branch 'for-tom' of git://git.denx.de/u-boot-dmTom Rini2014-09-26-1/+7
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| * sandbox: config: Enable all SPI flash chipsSimon Glass2014-09-26-1/+7
| | | | | | | | | | | | | | | | | | Sandbox may as well support everything. This increases the amount of code that is built/tested by sandbox, and also provides access to all the supported SPI flash devices. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2014-09-26-6/+95
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| * | board/ls1021aqds: Add DDR4 supportYork Sun2014-09-25-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LS1021AQDS has a variant with DDR4 slot. This patch adds a new defconfig for this variant to enable DDR4 support. RAW timing parameters are not added for DDR4. The board timing parameters are only tuned for single- rank 1600 and 1800MT/s with Micron DIMM 9ASF51272AZ-2G1A1 due to DIMM availability. Signed-off-by: York Sun <yorksun@freescale.com> CC: Alison Wang <alison.wang@freescale.com>
| * | ARMv8/ls2085a: Move u-boot location to make room for RCWYork Sun2014-09-25-1/+1
| | | | | | | | | | | | | | | | | | When booting with SP, RCW resides at the beginning of IFC NOR flash. Signed-off-by: York Sun <yorksun@freescale.com>
| * | ARMv8/ls2085a: Enable secondary coresYork Sun2014-09-25-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Spin table is at the very beginning of boot code. Each core has an individual release address within the spin table, the ft_cpu_setup fn updates the "cpu-release-addr" property of each cpu node with the corresponding release address. Also fix CPU_RELEASE_ADDR to point to secondary_boot_func. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Arnab Basu <arnab.basu@freescale.com>
| * | ARMv8/ls2085a_emu: Enable DP-DDR as standalone memory blockYork Sun2014-09-25-1/+14
| | | | | | | | | | | | | | | | | | | | | DP-DDR is used for DPAA, separated from main memory pool for general use. It has 32-bit bus width and use a standard DDR4 DIMM (64-bit). Signed-off-by: York Sun <yorksun@freescale.com>
| * | board/ls2085a: Add support of NOR and NAND flash for simulatorPrabhakar Kushwaha2014-09-25-0/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support of NOR and NAND flash for simulator target. Here IFC - CS0: NOR flash IFC - CS1: NAND flash Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2014-09-26-10/+22
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| * | B4860QDS: Enable mac command supportShaveta Leekha2014-09-24-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | One of the I2C EEPROM is used to store/save and edit mac addresses of ports. this patch add required CONFIG to support the same Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
| * | powerpc/b4860: Updated default hwconfig to enable only cpc2Shaveta Leekha2014-09-24-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CPC1 is not being enabled by default as powerpc is supposed to use only CPC2. Though by editing hwconfig en_cpc option, CPC1 can also be enabled. Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Sandeep Singh <Sandeep@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | powerpc/t104xrdb: Add T1042RDB board supportvijay rai2014-09-24-8/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | T1042RDB is a Freescale reference board that hosts the T1042 SoC (and variants). The board is similar to T1040RDB, T1042 is a reduced personality of T1040 SoC without Integrated 8-port Gigabit(L2 Switch). T1042RDB is configured with serdes protocol 0x86 which can support following interfaces - 2 RGMII's on DTSEC4, DTSEC5 - 1 SGMII on DTSEC3 DTSEC1, DTSEC2 are not connected on board. This Patch - add T1042RDB support - updates README file for T1042RDB details and update commands for switching to alternate banks from vBank0 to vBank4 and vice versa This patch also does minor clean ups for fdt defines for T1042RDB and T1042RDB_PI board Signed-off-by: Vijay Rai <vijay.rai@freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | powerpc/t104xrdb: Add Support of rcw for T1042RDB in u-bootvijay rai2014-09-24-0/+3
| |/ | | | | | | | | | | | | | | | | | | | | | | This patch adds support of rcw for T1042RDB, it makes following changes : - Adds t1042_rcw.cfg file for serdes protocol 0x86 for T1042RDB - Renames t1042_pi_rcw.cfg file from t1042_rcw.cfg and also updates comments for valid serdes protocol which is 0x06 - Also updates CONFIG_SYS_FSL_PBL_RCW for T1042RDB Signed-off-by: Vijay Rai <vijay.rai@freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | kconfig: move CONFIG_DEFAULT_DEVICE_TREE to kconfigMasahiro Yamada2014-09-25-81/+0
| | | | | | | | | | | | | | | | | | | | | | This option specifies the default Device Tree used for the run-time configuration of U-Boot. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stephen Warren <swarren@nvidia.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Michal Simek <michal.simek@xilinx.com>
* | kconfig: move CONFIG_OF_* to KconfigMasahiro Yamada2014-09-25-61/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit moves: CONFIG_OF_CONTROL CONFIG_OF_SEPARATE CONFIG_OF_EMBED CONFIG_OF_HOSTFILE Because these options are currently not supported for SPL, the "Device Tree Control" menu does not appear in the SPL configuration. Note: zynq-common.h should be adjusted so as not to change the default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org> Cc: Stephen Warren <swarren@nvidia.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Acked-by: Michal Simek <michal.simek@xilinx.com>
* | kconfig: move CONFIG_CMD_IMPORTENV to KconfigMasahiro Yamada2014-09-24-2/+0
| | | | | | | | | | | | | | | | | | | | Since CONFIG_CMD_IMPORTENV is defined in config_cmd_defaults.h, it should be enabled for all the boards except bf506f-ezkit that undefs it explicitely. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* | kconfig: move CONFIG_CMD_EXPORTENV to KconfigMasahiro Yamada2014-09-24-1/+0
| | | | | | | | | | | | | | | | | | | | Since CONFIG_CMD_EXPORTENV is defined in config_cmd_defaults.h, it should be enabled for all the boards except bf506f-ezkit that undefs it explicitely. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* | kconfig: move CONFIG_CMD_CRC32 to KconfigMasahiro Yamada2014-09-24-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since CONFIG_CMD_CRC32 is defined in config_cmd_defaults.h, it is enabled for all the boards except the ones undefining it explicitly: kwb tseries_mmc tseries_nand tseries_spi vct_platinum_onenand_small vct_platinum_small vct_platinumavc_onenand_small vct_platinumavc_small vct_premium_onenand_small vct_premium_small The default value of this config option should be "y" and "# CONFIG_CMD_CRC32 is not set" should be added for those exceptions. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
* | kconfig: move CONFIG_CMD_BOOTM to KconfigMasahiro Yamada2014-09-24-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_CMD_BOOTM is defined in config_cmd_defaults.h which is forcebly included from each board. So, the default value of "config CMD_BOOTM" should be "y". For some boards undefining it (bf506f-ezkit, controlcenterd_TRAILBLA, controlcenterd_TRAILBLAZER_DEVELOP, controlcenterd_TRAILBLAZER), "# CONFIG_CMD_BOOTM is not set" should be added to their defconfig. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
* | kconfig: move CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED to KconfigMasahiro Yamada2014-09-24-24/+0
| | | | | | | | | | | | | | | | | | | | If this option is enabled, the objects under lib/ directory are compiled with speed optimization, not size optimization. (Currently, only used by some Blackfin boards.) Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* | powerpc/t104xrdb: Enable SPI flash Extend address supportZhiqiang Hou2014-09-25-0/+1
| | | | | | | | | | | | | | Enable the Extend address to support SPI flash more than 16MB. Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* | spl: replace CONFIG_SPL_SPI_* with CONFIG_SF_DEFAULT_*Nikita Kiryanov2014-09-24-20/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, CONFIG_SPL_SPI_* #defines are used for controlling SPI boot in SPL. These #defines do not allow the user to select SPI mode for the SPI flash (there's no CONFIG_SPL_SPI_MODE, so the SPI mode is hardcoded in spi_spl_load.c), and duplicate information already provided by CONFIG_SF_DEFAULT_* #defines. Kill CONFIG_SPL_SPI_*, and use CONFIG_SF_DEFAULT_* instead. Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Vitaly Andrianov <vitalya@ti.com> Cc: Lars Poeschel <poeschel@lemonage.de> Cc: Bo Shen <voice.shen@atmel.com> Cc: Hannes Petermaier <hannes.petermaier@br-automation.com> Cc: Michal Simek <monstr@monstr.eu> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | spi: mxc: fix sf probe when using mxc_spiNikita Kiryanov2014-09-24-9/+9
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MXC SPI driver has a feature whereas a GPIO line can be used to force CS high across multiple transactions. This is set up by embedding the GPIO information in the CS value: cs = (cs | gpio << 8) This merge of cs and gpio data into one value breaks the sf probe command: if the use of gpio is required, invoking "sf probe <cs>" will not work, because the CS argument doesn't have the GPIO information in it. Instead, the user must use "sf probe <cs | gpio << 8>". For example, if bank 2 gpio 30 is used to force cs high on cs 0, bus 0, then instead of typing "sf probe 0" the user now must type "sf probe 15872". This is inconsistent with the description of the sf probe command, and forces the user to be aware of implementaiton details. Fix this by introducing a new board function: board_spi_cs_gpio(), which will accept a naked CS value, and provide the driver with the relevant GPIO, if one is necessary. Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Eric Benard <eric@eukrea.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2014-09-21-13/+20
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| * am335x_evm: Add boot script support to am335x_evmGuillaume GARDET2014-09-17-11/+18
| | | | | | | | | | | | | | This patch adds boot script support to am335x_evm Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr> Cc: Tom Rini <trini@ti.com>
| * OMAP4: Use generic 'load' command instead of 'fatload' for 'loadbootscript' ↵Guillaume GARDET2014-09-17-2/+2
| | | | | | | | | | | | | | | | | | | | | | and 'loadbootenv' as already done for 'loadimage' and 'loaduimage'. This patch uses generic 'load' command instead of 'fatload' for 'loadbootscript' and 'loadbootenv' as already done for 'loadimage' and 'loaduimage' for OMAP4 boards. This allows to use EXT partition instead of FAT, while keeping FAT compatibility. Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr> Cc: Tom Rini <trini@ti.com>
* | ARM: at91sam9rlek: convert to generic board supportWu, Josh2014-09-19-0/+2
| | | | | | | | | | Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | ARM: at91sam9n12ek: convert to generic board supportWu, Josh2014-09-19-0/+1
| | | | | | | | | | Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | ARM: atmel: sama5d3xek: enable NOR flash supportBo Shen2014-09-19-1/+12
| | | | | | | | | | Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-09-17-6/+311
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| * imx: mx6slevk: Change to use generic boardYe.Li2014-09-11-0/+2
| | | | | | | | | | | | Enable CONFIG_SYS_GENERIC_BOARD for imx6slevk to use generic board. Signed-off-by: Ye.Li <B37916@freescale.com>
| * imx: mx6q/dlarm2: Change to use generic boardYe.Li2014-09-11-0/+2
| | | | | | | | | | | | | | Enable the CONFIG_SYS_GENERIC_BOARD for imx6q/dl arm2 board to use generic board. Signed-off-by: Ye.Li <B37916@freescale.com>
| * mx6sxsabresd: Add PCI supportFabio Estevam2014-09-09-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tested with an Intel Wireless PCI 7260HMW card: U-Boot 2014.10-rc1-16576-g4a8a8a8-dirty (Aug 23 2014 - 16:05:11) CPU: Freescale i.MX6SX rev1.0 at 792 MHz Reset cause: WDOG Board: MX6SX SABRE SDB I2C: ready DRAM: 1 GiB MMC: FSL_SDHC: 0 00:01.0 - 16c3:abcd - Bridge device 01:00.0 - 8086:08b1 - Network controller Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * mx6qsabreauto: Remove imx6q-sabreauto.dtsFabio Estevam2014-09-09-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit fa9c021632473 ("mx6: add example DTB for mx6qsabreauto") introduced 'imx6q-sabreauto.dts' but it adds no real value as the dts file only contains the 'model' and 'compatible' strings. After this commit the final binary is also changed from 'u-boot.imx' to 'u-boot-dtb.imx', which may confuse users. So revert it until a more complete and useful device tree could be provided. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
| * imx: nitrogen6x: Replace 'fatload' by 'load' command in env settings to be ↵Guillaume GARDET2014-09-09-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | filesystem independent nitrogen6x.h file defines CONFIG_CMD_FS_GENERIC, so we are able to use generic 'load' command instead of 'fatload'. It allows to use ext filesystem and keep compatibilty with fat filesystem. Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr> Cc: Stefano Babic <sbabic@denx.de> Acked-By: Eric Nelson <eric.nelson@boundarydevices.com>
| * imx: ventana: add pci fixup for PLX PEX860x switch GPIOTim Harvey2014-09-09-0/+1
| | | | | | | | | | | | | | | | Most Gateworks Ventana boards use a PLX PEX860x PCIe switch for PCIe expansion. These boards use GPIO on the PLX device as PERST# for the downstream ports thus we assert this when the PLX is enumerated. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * arm: mx6: cm_fx6: add sata supportNikita Kiryanov2014-09-09-0/+34
| | | | | | | | | | | | | | | | | | Add support for SATA. Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
| * arm: mx6: cm_fx6: use eepromNikita Kiryanov2014-09-09-0/+2
| | | | | | | | | | | | | | | | | | | | Use Compulab eeprom module to obtain revision number, serial number, and mac address from the EEPROM. Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
| * arm: mx6: cm_fx6: add i2c supportNikita Kiryanov2014-09-09-0/+11
| | | | | | | | | | | | | | | | | | | | Add support for all 3 I2C busses on Compulab CM-FX6 CoM. Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
| * arm: mx6: cm_fx6: add usb supportNikita Kiryanov2014-09-09-0/+10
| | | | | | | | | | | | | | | | | | Add USB and USB OTG host support for Compulab CM-FX6 CoM. Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
| * arm: mx6: cm_fx6: add ethernet supportNikita Kiryanov2014-09-09-2/+14
| | | | | | | | | | | | | | | | | | | | Add ethernet support for Compulab CM-FX6 CoM Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
| * arm: mx6: cm_fx6: add nand supportNikita Kiryanov2014-09-09-1/+30
| | | | | | | | | | | | | | | | | | | | Add NAND support for Compulab CM-FX6 CoM. Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
| * arm: mx6: add support for Compulab cm-fx6 CoMNikita Kiryanov2014-09-09-0/+192
| | | | | | | | | | | | | | | | | | | | | | | | | | Add initial support for Compulab CM-FX6 CoM. Support includes MMC, SPI flash, and SPL with dynamic DRAM detection. Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
| * compulab: eeprom: add support for defining eeprom i2c busNikita Kiryanov2014-09-09-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Create CONFIG_SYS_I2C_EEPROM_BUS #define to tell the EEPROM module what I2C bus the EEPROM is located at. Make cl_eeprom_read() switch to that bus when reading EEPROM. Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Dmitry Lifshitz <lifshitz@compulab.co.il> Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Acked-by: Dmitry Lifshitz <lifshitz@compulab.co.il> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
* | Merge branch 'master' of git://git.denx.de/u-boot-dmTom Rini2014-09-13-1/+13
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| * | dm: tegra: Enable driver model for serialSimon Glass2014-09-10-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | Use driver model for serial ports. Since Tegra now uses driver model for serial, adjust the definition of V_NS16550_CLK so that it is clear that this is only used for SPL. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | sandbox: Convert serial driver to use driver modelSimon Glass2014-09-10-0/+3
| | | | | | | | | | | | | | | | | | | | | Adjust the sandbox serial driver to use the new driver model uclass. The driver works much as before, but within the new framework. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | tegra: Convert tegra GPIO driver to use driver modelSimon Glass2014-09-10-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is an implementation of GPIOs for Tegra that uses driver model. It has been tested on trimslice and also using the new iotrace feature. The implementation uses a top-level GPIO device (which has no actual GPIOS). Under this all the banks are created as separate GPIO devices. The GPIOs are named as per the Tegra datasheet/header files: A0..A7, B0..B7, ..., Z0..Z7, AA0..AA7, etc. Since driver model is not yet available before relocation, or in SPL, a special function is provided for seaboard's SPL code. Signed-off-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-08-26 05:47:58 +0000