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* mpc52xx, manroland: add some commandsHeiko Schocher2009-12-07-0/+3
| | | | | | | | | | add the following commands for the manroland boards: CONFIG_CMDLINE_EDITING CONFIG_COMMAND_HISTORY CONFIG_AUTO_COMPLETE Signed-off-by: Heiko Schocher <hs@denx.de>
* Merge branch 'master' into nextWolfgang Denk2009-12-05-65/+3
|\ | | | | | | | | | | | | | | Conflicts: board/esd/plu405/plu405.c drivers/rtc/ftrtc010.c Signed-off-by: Wolfgang Denk <wd@denx.de>
| * 85xx: Remove unused CONFIG_ASSUME_AMD_FLASH from config filesBecky Bruce2009-12-02-63/+0
| | | | | | | | | | | | | | A bunch of the 85xx boards have this cruft in them - it's not used anywhere. Delete it. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
| * MIMC200: set default fbmem valueMark Jackson2009-11-22-1/+1
| | | | | | | | | | | | | | This patch adds a default bootargs "fbmem" value to the CONFIG_BOOTARGS string for the MIMC200 board. Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
| * ppc4xx: Initialize magnetic couplers in PLU405Matthias Fuchs2009-11-17-1/+2
| | | | | | | | | | | | | | | | | | This patch fixes an ugly behavior of the IL712 magnetic couplers as used on PLU405. These parts will remember their last state over a power cycle which might cause unwanted behavior. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
* | i386: Final RelocationGraeme Russ2009-12-05-0/+2
| | | | | | | | Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* | i386: Fix global label in inline asm compile errorGraeme Russ2009-12-05-2/+2
| | | | | | | | Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* | i386: Fix malloc initializationGraeme Russ2009-12-05-3/+3
| | | | | | | | Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* | Merge branch 'next-sync' of git://git.denx.de/u-boot-arm into nextWolfgang Denk2009-12-01-18/+511
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| * | NAND: Add config option for imx27liteSandeep Paulraj2009-11-27-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | We will get compilation warnings without "CONFIG_SYS_64BIT_VSPRINTF" being defined in the board config. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * | arm: A320: Add support for Faraday A320 evaluation boardPo-Yu Chuang2009-11-27-0/+222
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for A320 evaluation board from Faraday. This board uses FA526 processor by default and has 512kB and 32MB NOR flash, 64M RAM. FA526 is an ARMv4 processor and uses the ARM920T source in this patch. Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
| * | OMAP3:SDRC: introduce DDR typesNishanth Menon2009-11-27-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Micron DDR timings based on: http://www.sakoman.net/cgi-bin/gitweb.cgi?p=x-load-omap3.git;a=blob;f=include/asm/arch-omap3/mem.h;h=e6fbfe3947f5d0d85fea776e30821d4017316d86;hb=HEAD Introduce Micron DDR timings and provide CONFIG_OMAP3_INFINEON_DDR and CONFIG_OMAP3_MICRON_DDR config options to allow for platform files to setup their timings as per the type of DDR selected Reported-by: Steve Sakoman in http://www.nabble.com/forum/Permalink.jtp?root=25779518&post=25959734&page=y Signed-off-by: Nishanth Menon <nm@ti.com>
| * | TI DA8xx: Integrate DA830 EVM support into U-BootSekhar Nori2009-11-27-0/+243
| | | | | | | | | | | | | | | | | | | | | | | | | | | Integrate DA830 EVM support into U-Boot. Provides initial support for TI OMAP-L137/DA830 SoC devices on a Spectrum Digital EVM board. See http://www.spectrumdigital.com/ Signed-off-by: Nick Thompson <nick.thompson@gefanuc.com>
| * | Add a unified s3c24x0 header filekevin.morfitt@fearnside-systems.co.uk2009-11-27-16/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a unified s3c24x0 cpu header file that selects the header file for the specific s3c24x0 cpu from the SOC and CPU configs defined in board config file. This removes the current chain of s3c24-type #ifdef's from the s3c24x0 code. Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | S3C6400/SMDK6400: fix stack_setup in start.SSeunghyeon Rhee2009-11-27-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix stack_setup to place the stack on the correct address in DRAM accroding to U-Boot standard and remove conditional compilation by CONFIG_MEMORY_UPPER_CODE macro that is not necessry. This macro was introduced and used only by this board for some unclear reason. The definition of this macro is also removed because it's not referenced elsewhere. Signed-off-by: Seunghyeon Rhee <seunghyeon@lpmtec.com> Tested-by: Minkyu Kang <mk7.kang@samsung.com>
* | | ppc4xx: Remove autoupdate feature from PLU405 boardMatthias Fuchs2009-11-25-2/+0
|/ / | | | | | | | | | | | | | | The autoupdate feature is not used on PLU405 boards. So remove it. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Remove unused features from PMC440 board supportMatthias Fuchs2009-11-19-2/+0
| | | | | | | | | | | | | | | | This patch shrinks the PMC440 u-boot binary (from next branch) to fit into 384kB again. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: alpr: Remove some not needed commands to make image fit againStefan Roese2009-11-19-2/+0
| | | | | | | | | | | | | | | | | | | | The latest changes in the u-boot/next branch increased the size of the alpr image a bit more. Now it doesn't fit into the 256k reserved for it. This patch now removes the commands "askenv" and "irq" which are not needed in the production systems. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Pieter Voorthuijsen <pieter.voorthuijsen@prodrive.nl>
* | ppc4xx: Consolidate pci_pre_init() functionStefan Roese2009-11-19-0/+3
| | | | | | | | | | | | | | | | | | This patch removes the duplicted implementations of the pci_pre_init() function by introducing a weak default function for it. This weak default has a different implementation for some PPC variants. It can be overridden by a board specific version. Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Consolidate pci_target_init() functionStefan Roese2009-11-19-2/+6
| | | | | | | | | | | | | | | | | | | | This patch removes the duplicted implementations of the pci_target_init() function by introducing a weak default function for it. This weak default has a different implementation for 440EP(x)/GR(x) PPC's. It can be overridden by a board specific version (e.g. PMC440, korat). Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | Merge branch 'master' into nextWolfgang Denk2009-11-15-5/+3
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| * Merge branch 'master' of git://git.denx.de/u-boot-netWolfgang Denk2009-11-11-3/+1
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| | * Fix SMC91111 regression: lpd7a40x build failuresBen Warren2009-11-09-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Both lpd7a400 and lpd7a404 failed to compile because they had CONFIG_SMC_USE_IOFUNCS defined: examples/standalone/smc91111_eeprom.c:388: undefined reference to `SMC_outw' Also removed an orphaned paren in lpd7a404.h Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | ppc4xx: Canyonlands: Change EBC bus config to drive always (no high-z)Stefan Roese2009-11-09-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes a problem only seen very occasionally on Canyonlands. The NOR flash interface (CFI driver) doesn't work reliably in all cases. Erasing and/or programming sometimes doesn't work. Sometimes with an error message, like "flash not erased" when trying to program an area that should have just been erased. And sometimes without any error messages. As mentioned above, this problem was only seen rarely and with some PLL configuration (CPU speed, EBC speed). Now I spotted this problem a few times, when running my Canyonlands with the following setup (chip_config): 1000-nor - NOR CPU:1000 PLB: 200 OPB: 100 EBC: 100 Changing the EBC configuration to not release the bus into high impedance state inbetween the transfers (ATC, DTC and CTC bits set to 1 in EBC0_CFG) seems to fix this problem. I haven't seen any failure anymore with this patch applied. Signed-off-by: Stefan Roese <sr@denx.de> Cc: David Mitchell <dmitchell@amcc.com> Cc: Jeff Mann <MannJ@embeddedplanet.com>
| * | sbc8349: fix incorrect commentWolfgang Denk2009-10-28-1/+1
| |/ | | | | | | | | | | | | | | The comment for the BR0_PRELIM port size initialization incorrectly stated 32 bit, while it's actually 16 bit. The code is correct. Reported-by: Guenter Koellner <guenter.koellner@nsn.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
* | ENV Variable support for Flex-OneNANDAmul Kumar Saha2009-11-13-0/+2
| | | | | | | | | | | | | | | | Define and use CONFIG_ENV_ADDR_FLEX and CONFIG_ENV_SIZE_FLEX for storing environment variables. Signed-off-by: Rohit Hagargundgi <h.rohit@samsung.com> Signed-off-by: Amul Kumar Saha <amul.saha@samsung.com>
* | ppc4xx: Katmai: Add chip_config commandStefan Roese2009-11-10-1/+8
| | | | | | | | | | | | | | This patch removes the Katmai "bootstrap" command and replaces it with the now common command "chip_config". Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Add UBI support to PLU405 boardsMatthias Fuchs2009-11-10-4/+14
| | | | | | | | | | | | | | | | | | -add UBI support -increase malloc'able memory size -cleanup MONITOR|FLASH_BASE|LEN constants Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Consolidate 4xx PCIe board specific configurationStefan Roese2009-11-09-0/+8
| | | | | | | | | | | | | | | | | | This patch consolidates the PPC4xx board specific PCIe configuration code. This way the duplicated code is removed. Boards can implement a special, non standard behaviour (e.g. number of PCIe slots, etc) by overriding the weak default functions. Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: sc3: Remove unreferenced external declarations from sc3.hStefan Roese2009-11-02-5/+0
| | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
* | mpc52xx: add support for the IPEK01 boardWolfgang Grandegger2009-10-31-0/+408
| | | | | | | | | | | | | | This patch adds support for the board IPEK01 based on the MPC5200. The Futjitsu Lime graphics controller is configured in 16 bpp mode. Signed-off-by: Wolfgang Grandegger <wg@denx.de>
* | video: mb862xx: add option VIDEO_FB_16BPP_WORD_SWAP for IPEK01Wolfgang Grandegger2009-10-31-0/+2
| | | | | | | | | | | | | | | | | | | | In 16 bpp mode, the new IPEK01 board only requires swapping of D16 words for D32 accesses due to the diffferent connecting to the GDC bus. This patch introduces the configuration option VIDEO_FB_16BPP_WORD_SWAP, which should be set for all board using the mb862xx in 16 bpp mode. For the IPEK01, VIDEO_FB_16BPP_PIXEL_SWAP should not be set. Signed-off-by: Wolfgang Grandegger <wg@denx.de>
* | video: mb862xx: add option CONFIG_VIDEO_MB862xx_ACCEL for 32bpp modeAnatolij Gustschin2009-10-31-0/+2
| | | | | | | | | | | | | | | | | | | | | | The new IPEK01 board can use the 32 bpp mode for the Lime graphics controller. For this mode, video accelaration does not work. This patch makes the accelaration configurable via CONFIG_VIDEO_MB862xx_ACCEL, which is enabled for the lwmon5 and the socrates board for backward compatibility. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Wolfgang Grandegger <wg@denx.de>
* | video: mb862xx: improve board-specific Lime configurationWolfgang Grandegger2009-10-31-6/+9
|/ | | | | | | | | | | To avoid board-specific code accessing the mb862xx registers directly, the public function mb862xx_probe() has been introduced. Furthermore, the "Change of Clock Frequency" and "Set Memory I/F Mode" registers are now defined by CONFIG_SYS_MB862xx_CCF and CONFIG_SYS_MB862xx__MMR, respectively. The BSPs for the socrates and lwmon5 boards have been adapted accordingly. Signed-off-by: Wolfgang Grandegger <wg@denx.de>
* Fix Compliation warning for TNY-A9260 and TNY-A9G20Sandeep Paulraj2009-10-28-0/+1
| | | | | | | The patch fixes a compilation warning by defining CONFIG_SYS_64BIT_VSPRINTF in the config file Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* Fix Compliation warning for SBC35-A9G20 boardSandeep Paulraj2009-10-28-0/+1
| | | | | | | The patch fixes a compilation warning by defining CONFIG_SYS_64BIT_VSPRINTF in the config file Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* galaxy5200: Add default environment variablesEric Millbrandt2009-10-28-2/+8
| | | | | | | Extend bootdelay to 10 seconds. Set boot retry time to 120 seconds and use reset to retry. Define default bootcommand and bootargs for production. Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>
* Coding Style cleanup; update CHANGELOG, prepare -rc1v2009.11-rc1Wolfgang Denk2009-10-28-2/+0
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* mpc85xx: Add eLBC NAND support for MPC8569E-MDS boardsAnton Vorontsov2009-10-27-0/+23
| | | | | | | | Simply add some defines, and adjust TLBe setup to include some space for eLBC NAND. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* mpc85xx: Add eSDHC support for MPC8569E-MDS boardsAnton Vorontsov2009-10-27-0/+16
| | | | | | | | | | | | | | | | | | eSDHC is mutually exlusive with UART0 (in 4-bits mode) and I2C2 (in 1-bit mode). When eSDHC is used, we should switch u-boot console to UART1, and make the proper device-tree fixups. Because of an erratum in prototype boards it is impossible to use eSDHC without disabling UART0 (which makes it quite easy to 'brick' the board by simply issung 'setenv hwconfig esdhc', and not able to interact with U-Boot anylonger). So, but default we assume that the board is a prototype, which is a most safe assumption. There is no way to determine board revision from a register, so we use hwconfig. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* xpedite5370: Enable multi-core supportPeter Tyser2009-10-27-0/+8
| | | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Merge branch 'master-sync' of git://git.denx.de/u-boot-armWolfgang Denk2009-10-24-94/+1004
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| * TI OMAP3 SDP3430: Initial SupportTom Rix2009-10-24-0/+369
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Start of support of Texas Instruments Software Development Platform(SDP) for OMAP3430 - SDP3430 Highlights of this platform are: Flash Memory devices: Sibley NOR, Micron 8bit NAND and OneNAND Connectivity: 3 UARTs and expanded 4 UART ports + IrDA Ethernet, USB Other peripherals: TWL5030 PMIC+Audio+Keypad VGA display Expansion ports: Memory devices plugin boards (PISMO) Connectivity board for GPS,WLAN etc. Completely configurable boot sequence and device mapping etc. Support default jumpering and: - UART1/ttyS0 console(legacy sdp3430 u-boot) - UART3/ttyS2 console (matching other boards, and SDP HW docs) - Ethernet - mmc0 - NOR boot Currently the UART1 is enabled by default. for compatibility with other OMAP3 u-boot platforms, enable the #define of CONSOLE_J9. Conflicts: Makefile Fixed the conflict with smdkc100_config by moving omap_sdp3430_config to it is alphabetically sorted location above zoom1. Signed-off-by: David Brownell <david-b@pacbell.net> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
| * TI DaVinci: Adding Copyright for DM365 EVMSandeep Paulraj2009-10-24-0/+1
| | | | | | | | | | | | | | Forgot to add Copyright while submitting the patch. This patch adds the copyright. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * TI DaVinci Sonata: Add Config option for 64 bit SupportSandeep Paulraj2009-10-18-0/+1
| | | | | | | | | | | | | | | | | | | | Adding the CONFIG_SYS_64BIT_VSPRINTF fot the DM644x based Sonata Without this option enabled while performing NAND operations we will get wrong diagnostic messages. Example if the MTD NAND driver find a bad block while erasing from a certain address, it will say bad block skipped at 0x00000000. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * TI DaVinci DVEVM: Add Config option for 64 bit SupportSandeep Paulraj2009-10-18-0/+1
| | | | | | | | | | | | | | | | | | | | Adding the CONFIG_SYS_64BIT_VSPRINTF in the DVEVM config. Without this option enabled while performing NAND operations we will get wrong diagnostic messages. Example if the MTD NAND driver find a bad block while erasing from a certain address, it will say bad block skipped at 0x00000000. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * TI DaVinci DM365: Add Config option for 64 bit SupportSandeep Paulraj2009-10-18-0/+1
| | | | | | | | | | | | | | | | | | | | Adding the CONFIG_SYS_64BIT_VSPRINTF in the DM365 EVM config. Without this option enabled while performing NAND operations we will get wrong diagnostic messages. Example if the MTD NAND driver find a bad block while erasing from a certain address, it will say bad block skipped at 0x00000000. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * TI DaVinci DM355: Add Config option for 64 bit SupportSandeep Paulraj2009-10-18-0/+1
| | | | | | | | | | | | | | | | | | | | Adding the CONFIG_SYS_64BIT_VSPRINTF in the DM355 EVM config. Without this option enabled while performing NAND operations we will get wrong diagnostic messages. Example if the MTD NAND driver find a bad block while erasing from a certain address, it will say bad block skipped at 0x00000000. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * TI: OMAP3: Remove SZ_xx referencesSandeep Paulraj2009-10-18-56/+49
| | | | | | | | | | | | | | This patch removes dependency on the sizes.h header file and removes all references to SZ_xx. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * OMAP3: Update Overo and Beagle environmentSteve Sakoman2009-10-18-16/+38
| | | | | | | | | | | | | | | | Update default environment to support new kernel DSS2 subsystem and simplify rootfs type and location changes. Signed-off-by: Steve Sakoman <sakoman@gmail.com> Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>