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* Merge branch 'master' of git://www.denx.de/git/u-boot-armWolfgang Denk2008-04-08-9/+785
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| * Support for the MX31ADS evaluation board from FreescaleGuennadi Liakhovetski2008-03-30-0/+170
| | | | | | | | | | | | | | This patch adds support for the MX31ADS evaluation board from Freescale, initialization code is copied from RedBoot sources, also provided by Freescale. Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
| * Phytec Phycore-i.MX31 supportSascha Hauer2008-03-30-0/+190
| | | | | | | | | | | | | | This patch adds support for the Phytec Phycore-i.MX31 board Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
| * mx31 litekit supportSascha Hauer2008-03-30-0/+167
| | | | | | | | | | | | | | This patch adds support for the mx31 litekit board Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
| * Adds support for the Prodrive PMDRA board, based on a DM6441Pieter Voorthuijsen2008-03-30-0/+186
| | | | | | | | Signed-off-by: Pieter Voorthuijsen <pv@prodrive.nl>
| * Removes all board specific code from the arch. part for DM644x (DaVinci) boardsPieter Voorthuijsen2008-03-30-9/+72
| | | | | | | | Signed-off-by: Pieter Voorthuijsen <pv@prodrive.nl>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-shWolfgang Denk2008-04-08-0/+558
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| * | sh: Add support Renesas Solutions R2D plus boardNobuhiro Iwamatsu2008-03-28-0/+150
| | | | | | | | | | | | | | | | | | | | | | | | R2D plus is SH reference board used with SH7751R. This board has 266Mhz CPU, 64MB SDRAM, Cardbus, CF interface, one PCI bus, VGA, and two Ethernet controller. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: Move SuperH PCI driver from cpu/sh4 to drivers/pciNobuhiro Iwamatsu2008-03-28-0/+1
| | | | | | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: Added support for SH7720 based board MPR2.Mark Jonas2008-03-28-0/+92
| | | | | | | | | | | | | | | Signed-off-by: Mark Jonas <mark.jonas@de.bosch.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: Add support Renesas Solutions R7780MPYusuke Goda2008-03-28-0/+164
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Renesas Solutions R7780MP is a reference board on SH7780. This board has serial, 10/100 base Ethernet deivice, CF slot and VGA devices. This board can set extension board. Extension board has 10/100/1000 base Ethernet device, PCI slot, S-ATA, iDVR slot. Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: Add support Renesas Solutions Migo-R boardgoda.yusuke2008-03-28-0/+151
| |/ | | | | | | | | | | | | | | Migo-R is a board based on SH7722 and has may devices. In this patch, supported SCIF, NOR flash and Ethernet. Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-mpc83xxWolfgang Denk2008-04-07-3/+83
|\ \ | | | | | | | | | | | | | | | | | | | | | Conflicts: lib_ppc/board.c Signed-off-by: Wolfgang Denk <wd@denx.de>
| * | mpc8323erdb: fix EEPROM page size and get MAC from EEPROMMichael Barkowski2008-03-28-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes eeprom page size so that you can now write more than 64 bytes at a time. It also makes the board take MAC addresses, if found, from EEPROM. User should place up to 4 addresses at offset 0x7f00, for eth{,1,2,3}addr. Any unused addresses should be zero. This group of four six-byte values should have it's CRC at the end. crc32 and eeprom commands can be used to accomplish this. If CRC fails, MAC addresses come from the environment. If CRC succeeds, the environment is overwritten at startup. Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | mpc8323erdb: define CONFIG_PCI_SKIP_HOST_BRIDGEMichael Barkowski2008-03-28-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 55774b512fdf63c0516d441cc5da7c54bbffb7f2 broke the onboard USB controller on the PCI bus in Linux on the MPC8323ERDB. This fixes it by defining CONFIG_PCI_SKIP_HOST_BRIDGE in the board's config file. Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | mpc83xx: enable the SATA interface on mpc8315 rdb and mpc837x rdb boardsKim Phillips2008-03-28-0/+46
| | | | | | | | | | | | Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | mpc83xx: enable the SATA interface on mpc837xemds boardDave Liu2008-03-28-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | Enable the first two SATA interfaces on MPC837xEMDS board, The two SATA ports are on LYNX1. (SATA0/1 on J4/5) Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | mpc83xx: initialize serdes for MPC837xEMDS boardsDave Liu2008-03-28-0/+5
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is stolen from Anton Vorontsov's patch for mpc837xerdb boards. The reference clk and xcorevdd voltage of serdes1/2 is same between mpc837xemds and mpc837xerdb. 8377E: LYNX1- 2 SATA LYNX2- 2 PCIE 8378E: LYNX1- 2 SGMII LYNX2- 2 PCIE 8379E: LYNX1- 2 SATA LYNX2- 2 SATA Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | ppc4xx: Small whitespace fix of esd patchesStefan Roese2008-03-31-1/+1
| | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Minor updates for DU440 boardsMatthias Fuchs2008-03-31-10/+6
| | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
* | ppc4xx: Canyonlands: Print SATA/PCIe configuration and board revisionStefan Roese2008-03-28-0/+1
| | | | | | | | | | | | | | | | | | Canyonlands (460EX) shares the first PCIe interface with the SoC SATA interface. This usage can be configured with the jumper J6. This patch displays the current configuration upon bootup and changes the PCIe init loop, to only initialize the availabel PCIe slots. Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Enable ECC on LWMON5Stefan Roese2008-03-27-5/+1
| | | | | | | | | | | | | | | | | | | | | | Since all ECC related problems seem to be resolved on LWMON5, this patch now enables ECC support. We have to write the ECC bytes by zeroing and flushing in smaller steps, since the whole 256MByte takes too long for the external watchdog. Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Updates to Korat-specific codeLarry Johnson2008-03-27-22/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch contains updates for changes for the Korat PPC440EPx board. These changes include: (1) Support for "permanent" and "upgradable" copies of U-Boot, as described in the new "doc/README.korat" file; (2) a new memory map for the registers in the board's CPLD; (3) a revised format for manufacturer's data in serial EEPROM; and (4) changes to track updates to U-Boot for the Sequoia board. Signed-off-by: Larry Johnson <lrj@acm.org>
* | ppc4xx: Add fdt support to Prodrive alprStefan Roese2008-03-27-1/+12
| | | | | | | | | | | | | | | | Since this board will probably be ported to arch/powerpc in the near future, we add device tree support now. This way we are "ready" for arch/powerpc from now on. Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Enable cache support on the ALPR boardPieter Voorthuijsen2008-03-27-0/+1
| | | | | | | | Signed-off-by: Pieter Voorthuijsen <pv@prodrive.nl>
* | ppc: Add CFG_MEM_TOP_HIDE option to hide memory area that doesn't get "touched"Stefan Roese2008-03-27-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If CFG_MEM_TOP_HIDE is defined in the board config header, this specified memory area will get subtracted from the top (end) of ram and won't get "touched" at all by U-Boot. By fixing up gd->ram_size the Linux kernel should gets passed the now "corrected" memory size and won't touch it either. This should work for arch/ppc and arch/powerpc. Only Linux board ports in arch/powerpc with bootwrapper support, which recalculate the memory size from the SDRAM controller setup, will have to get fixed in Linux additionally. This patch enables this config option on some PPC440EPx boards as a workaround for the CHIP 11 errata. Here the description from the AMCC documentation: CHIP_11: End of memory range area restricted access. Category: 3 Overview: The 440EPx DDR controller does not acknowledge any transaction which is determined to be crossing over the end-of-memory-range boundary, even if the starting address is within valid memory space. Any such transaction from any PLB4 master will result in a PLB time-out on PLB4 bus. Impact: In case of such misaligned bursts, PLB4 masters will not retrieve any data at all, just the available data up to the end of memory, especially the 440 CPU. For example, if a CPU instruction required an operand located in memory within the last 7 words of memory, the DCU master would burst read 8 words to update the data cache and cross over the end-of-memory-range boundary. Such a DCU read would not be answered by the DDR controller, resulting in a PLB4 time-out and ultimately in a Machine Check interrupt. The data would be inaccessible to the CPU. Workaround: Forbid any application to access the last 256 bytes of DDR memory. For example, make your operating system believe that the last 256 bytes of DDR memory are absent. AMCC has a patch that does this, available for Linux. This patch sets CFG_MEM_TOP_HIDE for the following 440EPx boards: lwmon5, korat, sequoia The other remaining 440EPx board were intentionally not included since it is not clear to me, if they use the end of ram for some other purpose. This is unclear, since these boards have CONFIG_PRAM defined and even comments like this: PMC440.h: /* esd expects pram at end of physical memory. * So no logbuffer at the moment. */ It is strongly recommended to not use the last 256 bytes on those boards too. Patches from the board maintainers are welcome. Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Add AMCC Glacier 406GT eval board supportStefan Roese2008-03-27-11/+114
|/ | | | | | | | | | | | | | This patch adds support for the AMCC Glacier 460GT eval board. The main difference to the Canyonlands board are listed here: - 4 ethernet ports instead of 2 - no SATA port - no USB port Currently EMAC2+3 are not working. This will be fixed in a later release. Signed-off-by: Stefan Roese <sr@denx.de>
* Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xxWolfgang Denk2008-03-27-0/+32
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| * FSL: Clean up board/freescale/common/MakefileJon Loeliger2008-03-26-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Each file that can be built here now follows some CONFIG_ option so that they are appropriately built or not, as needed. And CONFIG_ defines were added to various board config files to make sure that happens. The other board/freescale/*/Makefiles no longer need to reach up and over into ../common to build their individually needed files any more. Boards that are CDS specific were renamed with cds_ prefix. Signed-off-by: Jon Loeliger <jdl@freescale.com>
| * 85xx: Add the concept of CFG_CCSRBAR_PHYSKumar Gala2008-03-26-0/+17
| | | | | | | | | | | | | | | | | | When we go to 36-bit physical addresses we need to keep the concept of the physical CCSRBAR address seperate from the virtual one. For the majority of boards CFG_CCSBAR_PHYS == CFG_CCSRBAR Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | ata: make the ata_piix driver using new SATA frameworkDave Liu2008-03-26-24/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | original ata_piix driver is using IDE framework, not real SATA framework. For now, the ata_piix driver is only used by x86 sc520_cdp board. This patch makes the ata_piix driver use the new SATA framework, so - remove the duplicated command stuff - remove the CONFIG_CMD_IDE define in the sc520_cdp.h - add the CONFIG_CMD_SATA define to sc520_cdp.h Signed-off-by: Dave Liu <daveliu@freescale.com>
* | ata: merge the ata_piix driverDave Liu2008-03-26-1/+0
|/ | | | | | | | move the cmd_sata.c from common/ to drivers/ata_piix.c, the cmd_sata.c have some part of ata_piix controller drivers. consolidate the driver to have better framework. Signed-off-by: Dave Liu <daveliu@freescale.com>
* Merge branch 'new-image' of git://www.denx.de/git/u-boot-testingBartlomiej Sieka2008-03-26-0/+6
|\ | | | | | | | | | | | | | | | | Conflicts: common/cmd_bootm.c cpu/mpc8xx/cpu.c Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
| * [new uImage] Enable new uImage support for the pcs440ep board.Bartlomiej Sieka2008-03-20-0/+6
| | | | | | | | Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
* | 83xx/fdt_support: let user specifiy FSL USB Dual-Role controller roleAnton Vorontsov2008-03-25-0/+2
| | | | | | | | | | | | | | | | | | Linux understands "host" (default), "peripheral" and "otg" (broken). Though, U-Boot doesn't restrict dr_mode variable to these values (think of renames in future). Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | Modified the DDR SDRAM clock control register to delay MCK/MCK_B 3/4 clockJoe D'Abbraccio2008-03-25-1/+1
| | | | | | | | | | | | | | | | | | With the original value of 1/2 clock cycle delay, the system ran relatively stable except when we run benchmarks that are intensive users of memory. When I run samba connected disk with a HDBENCH test, the system locks-up or reboots sporadically. Signed-off by: Joe D'Abbraccio <Joe.D'abbraccio@freescale.com>
* | mpc83xx: Set PCI I/O bus-address base to zero.Scott Wood2008-03-25-5/+5
| | | | | | | | | | | | | | | | | | | | The device trees for these boards describe PCI I/O as starting from address zero from the device's perspective. Placing I/O elsewhere may cause problems with certain PCI boards, and may cause problems with Linux. Signed-off-by: Scott Wood <scottwood@freescale.com>
* | mpc83xx: MPC8360E-RDK: use 33.3(3)MHz CLKIN/SYS_CLKAnton Vorontsov2008-03-25-2/+2
| | | | | | | | | | | | | | At least on the "33MHz Pilot" board crystal is actually 33.3MHz. This patch fixes "system time drifting" problem. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
* | mpc83xx: MPC8360E-RDK: define CONFIG_OF_STDOUT_VIA_ALIASAnton Vorontsov2008-03-25-0/+1
| | | | | | | | | | | | This is needed to update /choosen/linux,stdout-path properly. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
* | mpc83xx: MPC8360E-RDK: add dhcp commandAnton Vorontsov2008-03-25-4/+3
| | | | | | | | | | | | | | Plus modify environment to use it and remove bootfile env variable, it is internal and CONFIG_BOOTFILE is used for these purposes. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
* | mpc83xx: MPC8360E-RDK: rework ddr setup, enable eccAnton Vorontsov2008-03-25-12/+36
| | | | | | | | | | | | | | | | Current DDR setup easily causes memory corruption, this patch fixes it. Also fix TIMING_CFG0_MRS_CYC definition. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
* | mpc83xx: MPC8360E-RDK: add support for NANDAnton Vorontsov2008-03-25-0/+24
| | | | | | | | Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
* | mpc83xx: MPC8360E-RDK: use RGMII_RXID interface modeAnton Vorontsov2008-03-25-2/+2
| | | | | | | | | | | | This is needed for BCM PHYs to work on this board. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
* | 83xx: define CONFIG_OF_STDOUT_VIA_ALIAS for the MPC837XERDB boardsAnton Vorontsov2008-03-25-0/+1
| | | | | | | | | | | | This is primarily for the early console support. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
* | 83xx: initialize serdes for MPC837XRDB boardsAnton Vorontsov2008-03-25-0/+6
| | | | | | | | | | | | | | | | On the MPC8377ERDB: 2 SATA and 2 PCI-E. On the MPC8378ERDB: 2 PCI-E On the MPC8379ERDB: 4 SATA Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
* | 83xx: nand support for MPC837XRDB boardsAnton Vorontsov2008-03-25-0/+19
| | | | | | | | Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
* | Enable CONFIG_FLASH_SHOW_PROGRESS on the MPC8360EMDS.Jerry Van Baren2008-03-25-0/+1
| | | | | | | | | | Signed-off-by: Gerald Van Baren <vanbaren@cideas.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | mpc8323erdb: remove RTC and add EEPROMMichael Barkowski2008-03-25-3/+4
| | | | | | | | | | | | | | There's no on-board RTC on the MPC8323ERDB, but there is an EEPROM. Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com>
* | mpc8323erdb: Improve the system performanceMichael Barkowski2008-03-25-14/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following changes are based on kernel UCC ethernet performance: 1. Make the CSB bus pipeline depth as 4, and enable the repeat mode 2. Optimize transactions between QE and CSB. Added CFG_SPCR_OPT switch to enable this setting. The following changes are based on the App Note AN3369 and verified to improve memory latency using LMbench: 3. CS0_CONFIG[AP_n_EN] is changed from 1 to 0 4. CS0_CONFIG[ODT_WR_CONFIG] set to 1. Was a reserved setting previously. 5. TIMING_CFG_1[WRREC] is changed from 3clks to 2clks (based on Twr=15ns, and this was already the setting in DDR_MODE) 6. TIMING_CFG_1[PRETOACT] is changed from 3clks to 2clks. (based on Trp=15ns) 7. TIMING_CFG_1[ACTTOPRE] is changed from 9clks to 6clks. (based on Tras=40ns) 8. TIMING_CFG_1[ACTTORW] is changed from 3clks to 2clks. (based on Trcd=15ns) 9. TIMING_CFG_1[REFREC] changed from 21 clks to 11clks. (based on Trfc=75ns) 10. TIMING_CFG_2[FOUR_ACT] is changed from 10 clks to 7clks. (based on Tfaw=50ns) 11. TIMING_CFG_2[ADD_LAT] and DDR_MODE[AL] changed from 0 to 1 (based on CL=3 and WL=2). Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com>
* | mpc8323erdb: use readable DDR config macrosMichael Barkowski2008-03-25-8/+42
| | | | | | | | | | | | | | Use available shift/mask macros to define DDR configuration. Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com>
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