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* sparc: fix unknown escape sequence warningsMike Frysinger2011-12-05-5/+5
| | | | | | | | | | | | | | | I don't know what exactly the code was going for, but the object code is the same before/after my change, and in looking at the env strings, this seems to be OK. Otherwise gcc warns: cc1: warning: unknown escape sequence: '\$' cc1: warning: unknown escape sequence: '\)' cc1: warning: unknown escape sequence: '\040' cc1: warning: unknown escape sequence: '\$' cc1: warning: unknown escape sequence: '\)' Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2011-12-02-0/+568
|\ | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-ppc4xx: ppc4xx: Add Io64 board support ppc4xx: fix PMC440 painit command ppc4xx: remove invalid access to PCI_BRDGOPT2 register ppc4xx: use CONFIG_PCI_BOOTDELAY instead of private implementation
| * ppc4xx: Add Io64 board supportDirk Eibach2011-12-01-0/+566
| | | | | | | | | | | | | | Board support for the Guntermann & Drunck Io64. Signed-off-by: Dirk Eibach <eibach@gdsys.de> Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: use CONFIG_PCI_BOOTDELAY instead of private implementationMatthias Fuchs2011-12-01-0/+2
| | | | | | | | | | | | | | | | | | This patch switches PMC440 board code to the CONFIG_PCI_BOOTDELAY option instead of using a private implemention. This relies on Anatolji's patch that moves the pcidelay handling behind pci_target_init. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2011-12-01-26/+662
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mpc85xx: mpc85xx: support for Freescale COM Express P2020 arch/powerpc/cpu/mpc8xxx/ddr/interactive.c: Fix GCC 4.6 build warning mpc85xx: support board-specific reset function powerpc/85xx: verify the localbus device tree address before booting the OS mpc8xxx: update module_type values from JEDEC DDR3 SPD Specification powerpc/p3060qds: Add board related support for P3060QDS platform powerpc/85xx: clean up and document the QE/FMAN microcode macros powerpc/85xx: always implement the work-around for Erratum SATA_A001 powerpc/85xx: CONFIG_FSL_SATA_V2 should be defined in config_mpc85xx.h powerpc/85xx: Add workaround for erratum A-003474 powerpc/85xx: fixup flexcan device tree clock-frequency powerpc/85xx: Add workaround for erratum CPU-A003999
| * | mpc85xx: support for Freescale COM Express P2020Ira W. Snyder2011-11-29-0/+576
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for the Freescale COM Express P2020 board. This board is similar to the P1_P2_RDB, but has some extra (as well as missing) peripherals. Unlike all other mpc85xx boards, it uses a watchdog timeout to reset. Using the HRESET_REQ register does not work. This board has no NOR flash, and can only be booted via SD or SPI. This procedure is documented in Freescale Document Number AN3659 "Booting from On-Chip ROM (eSDHC or eSPI)." Some alternative documentation is provided in Freescale Document Number P2020RM "P2020 QorIQ Integrated Processor Reference Manual" (section 4.5). Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/p3060qds: Add board related support for P3060QDS platformShengzhou Liu2011-11-29-1/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The P3060QDS is a Freescale reference board for the six-core P3060 SOC. P3060QDS Board Overview: Memory subsystem: - 2G Bytes unbuffered DDR3 SDRAM SO-DIMM(64bit bus) - 128M Bytes NOR flash single-chip memory - 16M Bytes SPI flash - 8K Bytes AT24C64 I2C EEPROM for RCW Ethernet: - Eight Ethernet controllers (4x1G + 4x1G/2.5G) - Three VSC8641 PHYs on board (2xRGMII + 1xMII) - Suport multiple Vitesse VSC8234 SGMII Cards in Slot1/2/3 PCIe: Two PCI Express 2.0 controllers/ports USB: Two USB2.0, USB1(TYPE-A) and USB2(TYPE-AB) on board I2C: Four I2C controllers UART: Supports two dUARTs up to 115200 bps for console RapidIO: Two RapidIO, sRIO1 and sRIO2 Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/85xx: clean up and document the QE/FMAN microcode macrosTimur Tabi2011-11-29-19/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Several macros are used to identify and locate the microcode binary image that U-boot needs to upload to the QE or Fman. Both the QE and the Fman use the QE Firmware binary format to package their respective microcode data, which is why the same macros are used for both. A given SOC will only have a QE or an Fman, so this is safe. Unfortunately, the current macro definition and usage has inconsistencies. For example, CONFIG_SYS_FMAN_FW_ADDR was used to define the address of Fman firmware in NOR flash, but CONFIG_SYS_QE_FW_IN_NAND contains the address of NAND. There's no way to know by looking at a variable how it's supposed to be used. In the future, the code which uploads QE firmware and Fman firmware will be merged. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/85xx: CONFIG_FSL_SATA_V2 should be defined in config_mpc85xx.hTimur Tabi2011-11-29-6/+2
| |/ | | | | | | | | | | | | | | | | | | | | Macro CONFIG_FSL_SATA_V2 is defined if the SOC has a V2 Freescale SATA controller, so it should be defined in config_mpc85xx.h instead of the various board header files. So now CONFIG_FSL_SATA_V2 is always defined on the P1013, P1022, P2041, P3041, P5010, and P5020. It was already defined for the P1010 and P1014. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | x86: Provide more configuration granularityGraeme Russ2011-11-29-0/+5
|/ | | | | | Planned future ports requires more granularity for some options Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* davinci_sonata: define CONFIG_MACH_TYPE for davinci_sonata boardChristian Riesch2011-11-27-0/+2
| | | | | | | | This patch fixes the build breakage for the davinci_sonata board. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Sergey Kubushyn <ksi@koi8.net> Cc: Sandeep Paulraj <s-paulraj@ti.com>
* davinci_schmoogie: define CONFIG_MACH_TYPE for davinci_schmoogie boardChristian Riesch2011-11-27-0/+3
| | | | | | | | This patch fixes the build breakage for the davinci_schmoogie board. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Sergey Kubushyn <ksi@koi8.net> Cc: Sandeep Paulraj <s-paulraj@ti.com>
* arm: a320evb: define mach-type in board config fileYan-Pai Chen2011-11-27-0/+6
| | | | | | | | MACH_TYPE_FARADAY was dropped from mach-types.h. Add it back to board config file. Signed-off-by: Yan-Pai Chen <ypchen@faraday-tech.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
* Fix Stelian's email addressStelian Pop2011-11-27-12/+12
| | | | | | | Change my old email address which is no longer valid. Signed-off-by: Stelian Pop <stelian@popies.net> Signed-off-by: Anatolij Gustschin <agust@denx.de>
* microblaze: usable uart16550 for big endian systemsStephan Linz2011-11-27-2/+6
| | | | | | | | | | | | | As a result of the commit 6833260 the uart16550 driver is broken for Microblaze big endian systems, because of the missing 3 byte offset. Other than as described, not all U-Boot BSP will treat properly the 3 byte offset. This why prefer to mask out the 3 byte offset in general and setup correct _REG_SIZE value depending on edianess. Signed-off-by: Stephan Linz <linz@li-pro.net> Tested-by: Michal Simek <monstr@monstr.eu>
* Merge branch 'master' of git://git.denx.de/u-boot-niosWolfgang Denk2011-11-21-0/+4
|\ | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-nios: nios2: Offer ft_board_setup() capability and call fdt_fixup_ethernet(). board/nios2-generic: Use altera_pio driver and remove board specific driver gpio: Add driver for Altera's PIO core nios2: Pseudo implement dcache_status/enable/disable()
| * board/nios2-generic: Use altera_pio driver and remove board specific driverJoachim Foerster2011-10-28-0/+4
| | | | | | | | | | Signed-off-by: Joachim Foerster <joachim.foerster@missinglinkelectronics.com> Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* | Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2011-11-16-1016/+1021
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-arm: arm, davinci: add DAVINCI_MMC_CLKID arm, davinci_emac: fix driver bug if more then 3 PHYs are detected arm, davinci: da850/dm365 lowlevel cleanup omap5: Add omap5_evm board build support. omap4/5: Add support for booting with CH. omap5: emif: Add emif/ddr configurations required for omap5 evm omap5: clocks: Add clocks support for omap5 platform. omap5: Add minimal support for omap5430. omap: Checkpatch fixes omap4: make omap4 code common for future reuse GCC4.6: Squash warnings in onenand_base.c GCC4.6: Fix common/usb.c on xscale OneNAND: Add simple OneNAND SPL PXA: vpac270: Enable the new generic MMC driver PXA: Cleanup serial_pxa PXA: Drop csb226 and innokom boards (unmaintained) m28evk: Fix comment about the number of RAM banks mx31: Fix checkpatch warnings in generic.c mx31: Use proper IO accessor for GPR register mx31: Remove duplicate definition for GPR register qong: Use generic function for configuring GPR register M28EVK: Enable USB HOST support iMX28: Add USB HOST driver iMX28: Add USB and USB PHY register definitions M28: Add memory detection into SPL iMX28: Fix ARM vector handling M28: Add doc/README.m28 documentation M28: Add MMC SPL iMX28: Add support for DENX M28EVK board iMX28: Add u-boot.sb target to Makefile iMX28: Add image header generator tool iMX28: Add driver for internal RTC iMX28: Add GPMI NAND driver iMX28: Add APBH DMA driver iMX28: Add SPI driver iMX28: Add GPIO control iMX28: Add I2C bus driver iMX28: Add PINMUX control FEC: Add support for iMX28 quirks iMX28: Add SSP MMC driver iMX28: Initial support for iMX28 CPU MX25: zmx25: GCC4.6 fix build warnings da850: add new config file for AM18xx BeagleBoard: config: Switch to ttyO2 OMAP3: Change omap3_evm maintainer devkit8000: Fix NAND SPL on boards with 256MB NAND integrator: enable Vpp and disable flash protection integrator: add system controller header integrator: make flash writeable on boot integrator: use io-accessors for board init integrator: move text offset to config integrator: pass configs for core modules ARM: remove superfluous setting of arch_number in board specific code. SPL: Allow ARM926EJS to avoid compiling in the CPU support code integrator: do not test first part of the memory arm: a320: fix broken timer ARM: define CONFIG_MACH_TYPE for all ronetix boards dm646x: pass board revision info to kernel dm646x: add new configuration for dm6467T arm, davinci: Fix setting of the SDRAM configuration register arm, davinci: Remove the duplication of LPSC functions arm, davinci: Rename AM1808 lowlevel functions to DA850 da8xxevm: fix build error ARM: re-add MACH_TYPE_XXXXXX for VCMA9 board and add CONFIG_MACH_TYPE
| * | omap5: Add omap5_evm board build support.Sricharan2011-11-15-0/+284
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds the build support for the omap5_evm board. Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * | omap4/5: Add support for booting with CH.Sricharan2011-11-15-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Configuration header(CH) is 512 byte header attached to an OMAP boot image that will help ROM code to initialize clocks, SDRAM etc and copy U-Boot directly into SDRAM. CH can help us in by-passing SPL and directly boot U-boot, hence it's an alternative for SPL. However, we intend to support both CH and SPL for OMAP4/5. Initialization done through CH is limited and is not equivalent to that done by SPL. So U-Boot has to distinguish between the two cases and handle them accordingly. This patch takes care of doing this. Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * | omap5: Add minimal support for omap5430.Sricharan2011-11-15-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the minimal support for OMAP5. The platform and machine specific headers and sources updated for OMAP5430. OMAP5430 is Texas Instrument's SOC based on ARM Cortex-A15 SMP architecture. It's a dual core SOC with GIC used for interrupt handling and SCU for cache coherency. Also moved some part of code from the basic platform support that can be made common for OMAP4/5. Rest is kept out seperately. The same approach is followed for clocks and emif support in the subsequent patches. Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * | PXA: vpac270: Enable the new generic MMC driverMarek Vasut2011-11-15-1/+2
| | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
| * | PXA: Drop csb226 and innokom boards (unmaintained)Marek Vasut2011-11-15-1013/+0
| | | | | | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Robert Schwebel <robert@schwebel.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
| * | m28evk: Fix comment about the number of RAM banksFabio Estevam2011-11-11-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | m28evk has one bank of RAM. Fix the comment. Cc: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marek.vasut@gmail.com>
| * | M28EVK: Enable USB HOST supportMarek Vasut2011-11-11-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This enables the second port, aka. the port with the USB connector on the M28EVK. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Remy Bohmer <linux@bohmer.net>
| * | M28: Add memory detection into SPLMarek Vasut2011-11-11-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This code allows the DDR DRAM size to be detected at runtime. The RAM size is stored into two scratch registers, from which it is then fetched in U-Boot. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
| * | iMX28: Fix ARM vector handlingMarek Vasut2011-11-11-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch introduces proper ARM vector handling for i.MX28 CPU. This issue wasn't addressed because the interrupts weren't enabled on any ARMv5 core, therefore the issue wasn't noticed earlier. In previous implementation, the vectoring code used by i.MX28 CPU when an exception happened was that of the SPL. With this change, the branch target when an exception happens can be reconfigured by U-Boot. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
| * | M28: Add MMC SPLMarek Vasut2011-11-11-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds SPL code for the M28 board. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Andy Fleming <afleming@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
| * | iMX28: Add support for DENX M28EVK boardMarek Vasut2011-11-11-0/+282
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This contains support for the following components: - DUART - MMC - Both FEC interfaces - NAND - I2C (RTC, EEPROM) - SPI (FLASH) Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
| * | da850: add new config file for AM18xxNagabhushana Netagunte2011-11-10-0/+245
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | add new configuration file da850_am18xxevm.h for AM18xx boards which are based on da850 SOC. AM18xx has WINBOND spi flash which is indicated in the config file. And make appropriate changes in board.cfg for building. Signed-off-by: Nagabhushana Netagunte <nagabhushana.netagunte@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * | BeagleBoard: config: Switch to ttyO2Alexander Holler2011-11-10-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is needed to support the latest kernel versions. Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Alexander Holler <holler@ahsoftware.de> Signed-off-by: Dirk Behme <dirk.behme@gmail.com> Signed-off-by: Tom Rini <trini@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * | devkit8000: Fix NAND SPL on boards with 256MB NANDTom Rini2011-11-10-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The devkit8000 ships with either a 128MB or 256MB NAND chip. In order for SPL to work with 256MB NAND CONFIG_SYS_NAND_5_ADDR_CYCLE needs to be set. After talking with Scott Wood this should be safe to set even for smaller NAND chips. Cc: Scott Wood <scottwood@freescale.com> Cc: Frederik Kriewitz <frederik@kriewitz.eu> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Tom Rini <trini@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * | integrator: move text offset to configLinus Walleij2011-11-10-0/+2
| | | | | | | | | | | | | | | | | | | | | Do away with the config.mk file and move the text offset to the config files to make things easier. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | ARM: define CONFIG_MACH_TYPE for all ronetix boardsAsen Dimov2011-11-08-0/+9
| | | | | | | | | | | | | | | Signed-off-by: Asen Chavdarov Dimov <dimov@ronetix.at> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
| * | dm646x: pass board revision info to kernelManjunath Hadli2011-11-08-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | add a function in board file to pass board revision info to kernel. Revision number 0 and 1 are passed in case of DM6467 and DM6467T respectively. Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * | dm646x: add new configuration for dm6467TManjunath Hadli2011-11-08-0/+161
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | add new configuration file for dm6467T and appropraite changes in boards.cfg. dm6467T is the new varaiant of dm6467 SOC which supports 33 MHz reference clock where as dm6467 supports 27 MHz reference clock. Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * | ARM: re-add MACH_TYPE_XXXXXX for VCMA9 board and add CONFIG_MACH_TYPEDavid Müller (ELSOFT AG)2011-11-08-0/+4
| | | | | | | | | | | | Signed-off-by: David Mueller <d.mueller@elsoft.ch>
* | | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2011-11-16-6/+8
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mpc85xx: powerpc/85xx: Fix builds of P1020/P2020RDB-PC_36BIT_NAND arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c: Fix GCC 4.6 build warning arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c: Fix GCC 4.6 build warning arch/powerpc/cpu/mpc8xxx/ddr/options.c: Fix GCC 4.6 build warning drivers/qe/uec.c: Fix GCC 4.6 build warning drivers/usb/host/ehci-fsl.c: Fix GCC 4.6 build warning drivers/net/fm/fm.c: Fix GCC 4.6 build warning board/sbc8560/sbc8560.c: Fix GCC 4.6 build warning board/sbc8548/sbc8548.c: Fix GCC 4.6 build warning board/freescale/mpc8569mds/mpc8569mds.c: Fix GCC 4.6 build warning board/freescale/mpc8568mds/mpc8568mds.c: Fix GCC 4.6 build warning board/freescale/mpc8548cds/mpc8548cds.c: Fix GCC 4.6 build warning board/freescale/common/pixis.c: Fix GCC 4.6 build warning board/freescale/common/cds_pci_ft.c: Fix GCC 4.6 build warning arch/powerpc/cpu/mpc8xxx/fsl_lbc.c: Fix GCC 4.6 build warning arch/powerpc/cpu/mpc85xx/tlb.c: Fix GCC 4.6 build warning arch/powerpc/cpu/mpc85xx/cpu_init.c: Fix GCC 4.6 build warning phylib: Enable AR8021 phy support powerpc/85xx: Set max alloc length to 10MB on P1022DS powerpc/mpc85xx: Set SYSCLK to the required frequency powerpc/85xx: Fix NAND SPL support powerpc/85xx: Fix MPC8572DS NAND build fsl_ifc: Fixed a bug in the erratum handling code for IFC_A003399 powerpc/85xx: Add support for Book-E MMU Arch v2.0 powerpc/85xx: Make inclusion of USB device fixup conditional powerpc/85xx: Fix warning for USB device-fixup powerpc/85xx: resize the boot page TLB before relocating CCSR powerpc/85xx: verify the current address of CCSR before relocating it powerpc/85xx: add some missing sync instructions in the CCSR relocation code powerpc/85xx: fix some comments in the CCSR relocation code powerpc/85xx: fix definition of MAS register macros powerpc/mpc8548cds: Fix network initialization powerpc/mpc8548: Add workaround for erratum NMG_eTSEC129 powerpc/QorIQ: fix network frame manager TBI PHY address settings
| * | | powerpc/85xx: Set max alloc length to 10MB on P1022DSJerry Huang2011-11-11-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to support 1920x01080 resolution, we must increase the alloc length. Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> CC: Anatolij Gustschin <agust@denx.de> Acked-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | | powerpc/85xx: Fix NAND SPL supportKumar Gala2011-11-09-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We cause CCSRBAR to be relocated in the SPL phase of NAND boot which isn't expected and breaks things. Fixing the board config.h to NOT relocate CCSR during the CONFIG_NAND_SPL phase. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | | powerpc/mpc8548cds: Fix network initializationchenhui zhao2011-11-08-0/+2
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | Add board_eth_init(). PCIe network card is also supported. Put RGMII init after tsec_eth_init(). Skip initializing eTSEC3 and eTSEC4 with Carrier boards prior to ver 1.3. Signed-off-by: Ebony Zhu Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
* | | adp-ag101p: Add SoC and board support of ag101pMacpaul Lin2011-11-10-0/+383
|/ / | | | | | | | | | | Add softcore SoC ag101p and the board adp-ag101p support. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxWolfgang Denk2011-11-08-1937/+2891
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mpc83xx: powerpc/mpc83xx: Add 33.33MHz support for mpc8360emds powerpc/mpc83xx: Add 512MB DDR support for mpc8360emds mpc83xx: Rename CONFIG_SYS_DDR_CONFIG and cleanup DDR csbnds code mpc83xx: Cleanup usage of LBC constants mpc83xx: Cleanup usage of DDR constants mpc83xx: Cleanup usage of BAT constants mpc83xx: cosmetic: vme8349.h checkpatch compliance mpc83xx: cosmetic: ve8313.h checkpatch compliance mpc83xx: cosmetic: sbc8349.h checkpatch compliance mpc83xx: cosmetic: mpc8308_p1m.h checkpatch compliance mpc83xx: cosmetic: kmeter1.h checkpatch compliance mpc83xx: cosmetic: TQM834x.h checkpatch compliance mpc83xx: cosmetic: SIMPC8313.h checkpatch compliance mpc83xx: cosmetic: MVBLM7.h checkpatch compliance mpc83xx: cosmetic: MPC837XERDB.h checkpatch compliance mpc83xx: cosmetic: MPC837XEMDS.h checkpatch compliance mpc83xx: cosmetic: MPC8360ERDK.h checkpatch compliance mpc83xx: cosmetic: MPC8360EMDS.h checkpatch compliance mpc83xx: cosmetic: MPC8349ITX.h checkpatch compliance mpc83xx: cosmetic: MPC8349EMDS.h checkpatch compliance mpc83xx: cosmetic: MPC832XEMDS.h checkpatch compliance mpc83xx: cosmetic: MPC8323ERDB.h checkpatch compliance mpc83xx: cosmetic: MPC8315ERDB.h checkpatch compliance mpc83xx: cosmetic: MPC8313ERDB.h checkpatch compliance mpc83xx: cosmetic: MPC8308RDB.h checkpatch compliance mpc83xx: cosmetic: MERGERBOX.h checkpatch compliance mpc83xx: Fix ipic structure definition powerpc, mpc83xx: add DDR SDRAM Timing Configuration 3 definitions cosmetic, powerpc, mpc83xx: checkpatch cleanup powerpc/83xx: move km 83xx specific i2c code to km83xx_i2c mpc83xx: fix global timer structure definition
| * | powerpc/mpc83xx: Add 33.33MHz support for mpc8360emdsJerry Huang2011-11-07-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | The new MPC8360EMDS board changes the oscillator to 33.33MHz in order to support QE 500MHz since 2008. Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | powerpc/mpc83xx: Add 512MB DDR support for mpc8360emdsJerry Huang2011-11-03-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The new MPC8360EMDS board supports 512MB DDR since 2008. For 512MB DDR: BAT0 is used for the first 256MB memory, BAT4 is used for the second 256MB memory and the address space of SDRAM follows the DDR, so if the size of DDR is 256MB, the BAT4 will be used for SDRAM and if the size of DDR is 512MB, the BAT4 will be used for the second 256MB memory and there is no BAT for SDRAM. Therefore, if the size of DDR is 512MB, this patch will use BAT6 for SDRAM and BAT5 will be used for PCI MEM to replace the BAT6 after the codes relocates to the DDR. Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> CC: Kim Phillips <kim.phillips@freescale.com>
| * | mpc83xx: Rename CONFIG_SYS_DDR_CONFIG and cleanup DDR csbnds codeJoe Hershberger2011-11-03-8/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename CONFIG_SYS_DDR_CONFIG to include which CS it is configuring Cleanup the setting of the csnbds to respect the setting of CONFIG_SYS_DDR_SDRAM_BASE Use __ilog2 instead of writing the code to compute it Disable unused CS configs Ensure ddrlaw.bar is configured Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | mpc83xx: Cleanup usage of LBC constantsJoe Hershberger2011-11-03-405/+541
| | | | | | | | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | mpc83xx: Cleanup usage of DDR constantsJoe Hershberger2011-11-03-48/+111
| | | | | | | | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | mpc83xx: Cleanup usage of BAT constantsJoe Hershberger2011-11-03-164/+162
| | | | | | | | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | mpc83xx: cosmetic: vme8349.h checkpatch complianceJoe Hershberger2011-11-03-17/+18
| | | | | | | | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
generated by cgit v1.1 at 2024-07-16 08:47:51 +0000