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* Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2012-04-30-52/+85
|\ | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-ppc4xx: powerpc/ppc4xx: Remove typedefs for gdsys FPGA powerpc/ppc4xx: Fix typo in gdsys_fpga.h powerpc/ppc4xx: Update gdsys board configurations powerpc/ppc4xx: Support gdsys dlvision-10g hardware 1.20 powerpc/ppc4xx: Adapt gdsys 405ep boards to platform changes powerpc/ppc4xx: Make gdsys 405ep boards reset more generic powerpc/ppc4xx: Adjust environment size on neo
| * powerpc/ppc4xx: Update gdsys board configurationsDirk Eibach2012-04-30-5/+17
| | | | | | | | | | | | Signed-off-by: Dirk Eibach <eibach@gdsys.de> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
| * powerpc/ppc4xx: Support gdsys dlvision-10g hardware 1.20Dirk Eibach2012-04-30-2/+2
| | | | | | | | | | | | | | | | In hardware revision 1.20 one more fan controller is added to dlvision-10g. Signed-off-by: Dirk Eibach <eibach@gdsys.de> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
| * powerpc/ppc4xx: Adapt gdsys 405ep boards to platform changesDirk Eibach2012-04-30-0/+4
| | | | | | | | | | | | | | | | | | Print fpga info at last_stage_init on gdsys 405ep boards. Use dtt_init() to startup fans. Signed-off-by: Dirk Eibach <eibach@gdsys.de> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
| * powerpc/ppc4xx: Make gdsys 405ep boards reset more genericDirk Eibach2012-04-30-44/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to add boards that have different hardware for fpga reset, any 405ep gdsys board now provides these functions: void gd405ep_init(void); void gd405ep_set_fpga_reset(unsigned state); void gd405ep_setup_hw(void); int gd405ep_get_fpga_done(unsigned fpga); Signed-off-by: Dirk Eibach <eibach@gdsys.de> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
| * powerpc/ppc4xx: Adjust environment size on neoDirk Eibach2012-04-30-1/+1
| | | | | | | | | | | | | | | | Environment size on neo has to be 0x20000 for compatibilty reasons. Signed-off-by: Dirk Eibach <eibach@gdsys.de> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2012-04-30-6/+134
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mpc85xx: powerpc/85xx: don't touch MAS7 on e500v1 when relocating CCSR powerpc/85xx: don't display address map size (32-bit vs. 36-bit) during boot cmd_bdinfo: display the address map size (32-bit vs. 36-bit) PowerPC: correct the SATA for p1/p2 rdb-pc platform powerpc/corenet_ds: Slave core in holdoff when boot from SRIO powerpc/corenet_ds: Slave reads ENV from master when boot from SRIO powerpc/corenet_ds: Slave uploads ucode when boot from SRIO powerpc/corenet_ds: Slave module for boot from SRIO powerpc/corenet_ds: Master module for boot from SRIO powerpc/corenet_ds: Document for the boot from SRIO powerpc/corenet_ds: Correct the compilation errors about ENV powerpc/srio: Rewrite the struct ccsr_rio powerpc/85xx:Fix lds for nand boot debug info powerpc/p2041rdb: add env in NAND support powerpc/p2041rdb: add NAND and NAND boot support powerpc/mpc8xxx: Fix CONFIG_DDR_RAW_TIMING for two boards powerpc/85xx:Avoid vector table compilation for nand_spl powerpc/85xx:Fix IVORs addr after vector table relocation powerpc/85xx:Avoid hardcoded vector address for IVORs powerpc/p1023rds: Disable nor flash node and enable nand flash node
| * | PowerPC: correct the SATA for p1/p2 rdb-pc platformJerry Huang2012-04-24-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | For p1/p2 rdb-pc platform, use the PCIe-SATA Silicon Image SATA controller. Therefore, the SATA driver will use sata_sil, instead sata_sil3114. Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> CC: Andy Fleming <afleming@gmail.com>
| * | powerpc/corenet_ds: Slave core in holdoff when boot from SRIOLiu Gang2012-04-24-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When boot from SRIO, slave's core can be in holdoff after powered on for some specific requirements. Master can release the slave's core at the right time by SRIO interface. Master needs to: 1. Set outbound SRIO windows in order to configure slave's registers for the core's releasing. 2. Check the SRIO port status when release slave core, if no errors, will implement the process of the slave core's releasing. Slave needs to: 1. Set all the cores in holdoff by RCW. 2. Be powered on before master's boot. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
| * | powerpc/corenet_ds: Slave reads ENV from master when boot from SRIOLiu Gang2012-04-24-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When boot from SRIO, slave's ENV can be stored in master's memory space, then slave can fetch the ENV through SRIO interface. NOTE: Because the slave can not erase, write master's NOR flash by SRIO interface, so it can not modify the ENV parameters stored in master's NOR flash using "saveenv" or other commands. Master needs to: 1. Put the slave's ENV into it's own memory space. 2. Set an inbound SRIO window covered slave's ENV stored in master's memory space. Slave needs to: 1. Set a specific TLB entry in order to fetch ucode and ENV from master. 2. Set a LAW entry with the TargetID SRIO1 or SRIO2 for ucode and ENV. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
| * | powerpc/corenet_ds: Slave uploads ucode when boot from SRIOLiu Gang2012-04-24-1/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When boot from SRIO, slave's ucode can be stored in master's memory space, then slave can fetch the ucode image through SRIO interface. For the corenet platform, ucode is for Fman. Master needs to: 1. Put the slave's ucode image into it's own memory space. 2. Set an inbound SRIO window covered slave's ucode stored in master's memory space. Slave needs to: 1. Set a specific TLB entry in order to fetch ucode from master. 2. Set a LAW entry with the TargetID SRIO1 or SRIO2 for ucode. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
| * | powerpc/corenet_ds: Slave module for boot from SRIOLiu Gang2012-04-24-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For the powerpc processors with SRIO interface, boot location can be configured from SRIO1 or SRIO2 by RCW. The processor booting from SRIO can do without flash for u-boot image. The image can be fetched from another processor's memory space by SRIO link connected between them. The processor boots from SRIO is slave, the processor boots from normal flash memory space and can help slave to boot from its memory space is master. They are different environments and requirements: master: 1. NOR flash for its own u-boot image, ucode and ENV space. 2. Slave's u-boot image in master NOR flash. 3. Normally boot from local NOR flash. 4. Configure SRIO switch system if needed. slave: 1. Just has EEPROM for RCW. No flash for u-boot image, ucode and ENV. 2. Boot location should be set to SRIO1 or SRIO2 by RCW. 3. RCW should configure the SerDes, SRIO interfaces correctly. 4. Slave must be powered on after master's boot. 5. Must define CONFIG_SYS_QE_FMAN_FW_IN_REMOTE because of no ucode locally. For the slave module, need to finish these processes: 1. Set the boot location to SRIO1 or SRIO2 by RCW. 2. Set a specific TLB entry for the boot process. 3. Set a LAW entry with the TargetID SRIO1 or SRIO2 for the boot. 4. Slave's u-boot image should be generated specifically by make xxxx_SRIOBOOT_SLAVE_config. This will set SYS_TEXT_BASE=0xFFF80000 and other configurations. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
| * | powerpc/corenet_ds: Master module for boot from SRIOLiu Gang2012-04-24-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For the powerpc processors with SRIO interface, boot location can be configured from SRIO1 or SRIO2 by RCW. The processor booting from SRIO can do without flash for u-boot image. The image can be fetched from another processor's memory space by SRIO link connected between them. The processor boots from SRIO is slave, the processor boots from normal flash memory space and can help slave to boot from its memory space is master. They are different environments and requirements: master: 1. NOR flash for its own u-boot image, ucode and ENV space. 2. Slave's u-boot image in master NOR flash. 3. Normally boot from local NOR flash. 4. Configure SRIO switch system if needed. slave: 1. Just has EEPROM for RCW. No flash for u-boot image, ucode and ENV. 2. Boot location should be set to SRIO1 or SRIO2 by RCW. 3. RCW should configure the SerDes, SRIO interfaces correctly. 4. Slave must be powered on after master's boot. For the master module, need to finish these processes: 1. Initialize the SRIO port and address space. 2. Set inbound SRIO windows covered slave's u-boot image stored in master's NOR flash. 3. Master's u-boot image should be generated specifically by make xxxx_SRIOBOOT_MASTER_config 4. Master must boot first, and then slave can be powered on. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
| * | powerpc/corenet_ds: Correct the compilation errors about ENVLiu Gang2012-04-24-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When defined CONFIG_ENV_IS_NOWHERE, there will be some compilation errors: ./common/env_nowhere.o: In function `env_relocate_spec': ./common/env_nowhere.c:38: multiple definition of `env_relocate_spec' ./common/env_flash.o: ./common/env_flash.c:326: first defined here ./common/env_nowhere.o: In function `env_get_char_spec': ./common/env_nowhere.c:42: multiple definition of `env_get_char_spec' ./common/env_flash.o:./common/env_flash.c:78: first defined here ./common/env_nowhere.o: In function `env_init': ./common/env_nowhere.c:51: multiple definition of `env_init' ./common/env_flash.o:./common/env_flash.c:237: first defined here make[1]: *** [./common/libcommon.o] Error 1 make[1]: Leaving directory `./common' make: *** [./common/libcommon.o] Error 2 Remove the CONFIG_ENV_IS_IN_FLASH if defined CONFIG_ENV_IS_NOWHERE. Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
| * | powerpc/p2041rdb: add env in NAND supportShaohui Xie2012-04-24-0/+5
| | | | | | | | | | | | | | | | | | | | | Add env in NAND support when boot from NAND. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | powerpc/p2041rdb: add NAND and NAND boot supportShaohui Xie2012-04-24-3/+51
| | | | | | | | | | | | | | | | | | | | | | | | New P2041RDB board will add a NAND chip, so add support for NAND and NAND boot. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | powerpc/mpc8xxx: Fix CONFIG_DDR_RAW_TIMING for two boardsYork Sun2012-04-24-2/+2
| |/ | | | | | | | | | | | | | | | | P1010RDB and p1_pc_rdb_pc has incorrect configuration for CONFIG_DDR_RAW_TIMING. It should be CONFIG_SYS_DDR_RAW_TIMING. Incorrect setting causes DDR failure in case of SPD absent. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-i2cWolfgang Denk2012-04-30-1/+1
|\ \ | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-i2c: i2c:designware Turn off the ctrl when setting the speed i2c: Add support for designware i2c controller sh: i2c: Add support I2C controller of SH7734
| * | i2c: Add support for designware i2c controllerVipin KUMAR2012-04-24-1/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | Earlier, a driver exists in the u-boot source for designware i2c interface. That driver was specific to spear platforms. This patch implements the i2c controller as a generic driver which can be used by multiple platforms The driver files are now renamed to designware_i2c.c and designware_i2c.h and these are moved into drivers/i2c folder for reusability by other platforms Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-nds32Wolfgang Denk2012-04-30-0/+375
|\ \ | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-nds32: board/adp-ag102: add configuration of adp-ag102 board/adp-ag102: add board specific files nds32/ag102: add ag102 soc support nds32/ag102: add header support of ag102 soc
| * | board/adp-ag102: add configuration of adp-ag102Macpaul Lin2012-04-22-0/+375
| |/ | | | | | | | | | | | | | | | | | | | | | | board: Add config file of board adp-ag102 Add adp-ag102 into boards.cfg Add adp-ag102 into MAINTAINERS doc: add README of ag102 Signed-off-by: Macpaul Lin <macpaul@andestech.com>
* | Merge branch 'marex@denx.de' of git://git.denx.de/u-boot-stagingWolfgang Denk2012-04-29-21/+3
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | * 'marex@denx.de' of git://git.denx.de/u-boot-staging: CMD: CONFIG_CMD_SETECPR -> CONFIG_CMD_SETEXPR on omap3_logic CMD: Fix CONFIG_CMD_SAVEBP_WRITE_SIZE -> CONFIG_CMD_SPL_WRITE_SIZE CMD: Fix typo CMD_FSL -> CMD_MFSL in readme HWW1U1A: Fix CMD_SHA1 -> CMD_SHA1SUM CMD: Remove CMD_LOG, it's unused CMD: Fix typo KGBD -> KGDB on debris board CMD: Drop CONFIG_CMD_EMMC, it's not used CMD: Drop CONFIG_CMD_DFL, it's not used CMD: Drop CMD_DCR, it's not used CMD: Drop CMD_CAN, it's not used CMD: Remove CMD_AUTOSCRIPT, it's not used AT91: Drop AT91_SPIMUX command from cmd_all
| * CMD: CONFIG_CMD_SETECPR -> CONFIG_CMD_SETEXPR on omap3_logicMarek Vasut2012-04-19-1/+1
| | | | | | | | | | Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Anatolij Gustschin <agust@denx.de>
| * HWW1U1A: Fix CMD_SHA1 -> CMD_SHA1SUMMarek Vasut2012-04-19-1/+1
| | | | | | | | | | | | | | | | Fix typo Signed-off-by: Marek Vasut <marex@denx.de> Cc: Kyle.D.Moffett@boeing.com Acked-by: Anatolij Gustschin <agust@denx.de>
| * CMD: Remove CMD_LOG, it's unusedMarek Vasut2012-04-19-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | $ git grep CMD_LOG include/configs/kilauea.h:#define CONFIG_CMD_LOG include/configs/lwmon5.h:#define CONFIG_CMD_LOG include/configs/makalu.h:#define CONFIG_CMD_LOG include/configs/quad100hd.h:#undef CONFIG_CMD_LOG include/configs/zeus.h:#define CONFIG_CMD_LOG Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Anatolij Gustschin <agust@denx.de>
| * CMD: Fix typo KGBD -> KGDB on debris boardMarek Vasut2012-04-19-1/+1
| | | | | | | | | | | | Signed-off-by: Marek Vasut <marex@denx.de> Cc: dogoil@etinsys.com Acked-by: Anatolij Gustschin <agust@denx.de>
| * CMD: Drop CONFIG_CMD_EMMC, it's not usedMarek Vasut2012-04-19-1/+0
| | | | | | | | | | | | | | | | | | | | | | $ git grep CMD_EMMC include/configs/u8500_href.h:#define CONFIG_CMD_EMMC Signed-off-by: Marek Vasut <marex@denx.de> Cc: dirk.behme@googlemail.com Cc: helmut.raiger@hale.at Cc: john.rigby@linaro.org Cc: vapier@gentoo.org
| * CMD: Drop CONFIG_CMD_DFL, it's not usedMarek Vasut2012-04-19-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | $ git grep CMD_DFL board/atc/ti113x.c:#define CMD_DFLT (PCI_COMMAND_IO|PCI_COMMAND_MEMORY| \ board/atc/ti113x.c: pci_writew (s, PCI_COMMAND, CMD_DFLT); board/cpc45/pd67290.c:#define CMD_DFLT (PCI_COMMAND_IO|PCI_COMMAND_MEMORY| \ board/cpc45/pd67290.c: pci_writew (s, PCI_COMMAND, CMD_DFLT); drivers/pcmcia/i82365.c:#define CMD_DFLT (PCI_COMMAND_IO|PCI_COMMAND_MEMORY| \ drivers/pcmcia/i82365.c: pci_writew (s, PCI_COMMAND, CMD_DFLT); include/configs/MBX.h:#define CONFIG_CMD_DFL include/configs/MigoR.h:#define CONFIG_CMD_DFL include/configs/digsy_mtc.h:#define CONFIG_CMD_DFL include/configs/ms7722se.h:#define CONFIG_CMD_DFL include/configs/ms7750se.h:#define CONFIG_CMD_DFL include/configs/r2dplus.h:#define CONFIG_CMD_DFL include/configs/sh7757lcr.h:#define CONFIG_CMD_DFL include/configs/sh7785lcr.h:#define CONFIG_CMD_DFL Signed-off-by: Marek Vasut <marex@denx.de> Cc: Pfister_Werner@intercontrol.de Cc: iwamatsu@nigauri.org Cc: nobuhiro.iwamatsu.yj@renesas.com Cc: vapier@gentoo.org Cc: wd@denx.de Cc: yoshihiro.shimoda.uh@renesas.com Acked-by: Anatolij Gustschin <agust@denx.de> Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * CMD: Drop CMD_DCR, it's not usedMarek Vasut2012-04-19-1/+0
| | | | | | | | | | | | | | | | $ git grep CMD_DCR include/configs/ep8260.h:#undef CONFIG_CMD_DCR Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Anatolij Gustschin <agust@denx.de>
| * CMD: Drop CMD_CAN, it's not usedMarek Vasut2012-04-19-1/+0
| | | | | | | | | | | | | | | | $ git grep CMD_CAN include/configs/jadecpu.h:#define CONFIG_CMD_CAN Signed-off-by: Marek Vasut <marex@denx.de> Cc: Matthias Weisser <weisserm@arcor.de>
| * CMD: Remove CMD_AUTOSCRIPT, it's not usedMarek Vasut2012-04-19-2/+0
| | | | | | | | | | | | | | | | | | | | | | $ git grep AUTOSCRIPT include/configs/at91sam9m10g45ek.h:#undef CONFIG_CMD_AUTOSCRIPT include/configs/gplugd.h:#define CONFIG_CMD_AUTOSCRIPT Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Prafulla Wadaskar <prafulla@marvell.com> Acked-by: Anatolij Gustschin <agust@denx.de>
* | eb_cpux9k2: add USB host support to boardJens Scharsig2012-04-21-0/+14
|/ | | | Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
* sh: ecovec: Change macro from BOARD_LATE_INIT to CONFIG_BOARD_LATE_INITNobuhiro Iwamatsu2012-04-18-1/+1
| | | | | | | | When calling board_late_init, we need to define CONFIG_BOARD_LATE_INIT. The latest ecovec config defines BOARD_LATE_INIT, board_late_init is not called. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* Prepare v2012.04-rc2; minor Coding Style cleanupWolfgang Denk2012-04-16-42/+42
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2012-04-16-11/+41
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-arm: ARM926EJS: Fix cache.c to comply with checkpatch.pl ARM926EJS: Make asm routines volatile in cache ops MX35: mx35pdk: wrong board revision ARM1136: MX35: Make asm routines volatile in cache ops ARM: add u-boot.imx as target for i.MX SOCs M28: Pull out CONFIG_APBH_DMA so it's always enabled DMA: Split the APBH DMA init into block and channel init imx: Return gpio_set_value in gpio_direction_output imx: Use GPIO_TO_PORT macro in the gpio driver instead of (gpio >> 5) imx: Add GPIO_TO_PORT macro in the mxc_gpio driver imx: Remove unneeded/repititive definitions from imx headers i.MX28: Allow coexistence of PIO and DMA mode for SD/MMC MX31: mx31pdk: drop enable_caches from board file i.MX28: Fix initial stack pointer position mx35: mx35pdk: fix when cache functions are linked mx35: flea3: fix when cache functions are linked ARM: 926ejs: use debug() for misaligned addresses ARM1136: add cache flush and invalidate operations mx6qsabrelite: Fix the serial console port mx6qsabrelite: Add boot switch setting information into the README i.MX6: mx6qsabrelite: add cache commands if cache is enabled i.MX6: implement enable_caches() i.MX6: define CACHELINE_SIZE MX53: DDR: Fix ZQHWCTRL field TZQ_CS mx28evk: Add a README file mx28: Split the README into a common part and a m28 specific part tricorder: Load kernel from ubifs tricorder: Add UBIFS cm-t35: fix Ethernet reset timing hawkboard: Add CONFIG_SPL_LIBGENERIC_SUPPORT BeagleBoard: Remove userbutton command and use gpio command instead OMAP: Move omap1510inn to Unmaintained / Orphaned
| * MX35: mx35pdk: wrong board revisionStefano Babic2012-04-16-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The board revision is detected accessing to the pmic, that is not available before relocation (I2C). This generates the following error: CPU: Freescale i.MX35 rev 2.0 at 532 MHz. Reset cause: WDOG <reg num> = 7 is invalid. Should be less than 0 Board: MX35 PDK 1.0 The revision number is wrong, as a default value is printed (tested on a mx35pdk Rev. 2.0). Move the output in the board_late_init(), when pmic can be accessed. Signed-off-by: Stefano Babic <sbabic@denx.de>
| * M28: Pull out CONFIG_APBH_DMA so it's always enabledMarek Vasut2012-04-16-1/+5
| | | | | | | | | | | | | | | | | | | | | | The ABPH DMA is now used also by the SD card. Therefore it has to be enabled even if NAND is disabled. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
| * i.MX28: Fix initial stack pointer positionMarek Vasut2012-04-16-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch: m28evk: Use GENERATED_GBL_DATA_SIZE commit 1084606c972ea5f1d89f69bdbd978b867d0ee521 introduced usage of GENERATED_GBL_DATA_SIZE and calculation of initial stack pointer position defived from that. Due to a small typo, the SP position moved to 0x21f80, which is past the SRAM area. This didn't manifest on the real hardware as the SRAM repeats there (address bits in the CPU being ignored). Though this was caught in QEMU, where it crashed the emulator. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
| * mx35: mx35pdk: fix when cache functions are linkedStefano Babic2012-04-16-0/+2
| | | | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
| * mx35: flea3: fix when cache functions are linkedStefano Babic2012-04-16-0/+2
| | | | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
| * mx6qsabrelite: Fix the serial console portFabio Estevam2012-04-16-1/+1
| | | | | | | | | | | | On mx6qsabrelite the console is ttymxc1. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * i.MX6: mx6qsabrelite: add cache commands if cache is enabledEric Nelson2012-04-16-0/+4
| | | | | | | | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de>
| * i.MX6: implement enable_caches()Eric Nelson2012-04-16-0/+4
| | | | | | | | | | | | | | disabled by default until drivers are fixed Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de>
| * tricorder: Load kernel from ubifsBernhard Walle2012-04-16-2/+7
| | | | | | | | Signed-off-by: Bernhard Walle <walle@corscience.de>
| * tricorder: Add UBIFSBernhard Walle2012-04-16-2/+4
| | | | | | | | | | | | | | | | | | | | Since kernel should be in a ubifs partition, we need UBIFS. The greater malloc size is needed for UBIFS. Signed-off-by: Bernhard Walle <walle@corscience.de> Squashed two commits (UBIFS enabled and malloc size increased) into one. Signed-off-by: Thomas Weber <weber@corscience.de>
| * hawkboard: Add CONFIG_SPL_LIBGENERIC_SUPPORTTom Rini2012-04-16-0/+1
| | | | | | | | | | | | | | With older toolchains we need CONFIG_SPL_LIBGENERIC_SUPPORT in order for CONFIG_SPL_NAND_SUPPORT to link. Signed-off-by: Tom Rini <trini@ti.com>
| * BeagleBoard: Remove userbutton command and use gpio command insteadJoel Fernandes2012-04-16-2/+9
| | | | | | | | | | | | | | Remove userbutton command and do the detection in board config file using the gpio command Signed-off-by: Joel A Fernandes <agnel.joel@gmail.com> Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
* | configs: EB+MCF-EV123.h: Fix typo on CONFIG_SYS_HUSH_PARSERFabio Estevam2012-04-10-1/+2
|/ | | | | | | Fix typo on CONFIG_SYS_HUSH_PARSER and also add CONFIG_SYS_PROMPT_HUSH_PS2 to avoid build error. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* Merge branch 'marek.vasut@gmail.com' of git://git.denx.de/u-boot-stagingWolfgang Denk2012-04-09-0/+2
|\ | | | | | | | | | | | | | | * 'marek.vasut@gmail.com' of git://git.denx.de/u-boot-staging: LMB: Fix undefined lmb_reserve() on non-lmb platforms MIPS: fix endianess handling MIPS: fix inconsistency in config option for cache operation mode MIPS: board.c: fix init of flash data in bd_info
| * MIPS: fix endianess handlingDaniel Schwierzeck2012-04-02-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make endianess of target CPU configurable. Use the new config option for dbau1550_el and pb1000 boards. Adapt linking of standalone applications to pass through endianess options to LD. Build tested with: - ELDK 4 mips_4KC- and mips4KCle - Sourcery CodeBench Lite 2011.03-93 With this patch all 26 MIPS boards can be compiled now in one step by running "MAKEALL -a mips". Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
generated by cgit v1.1 at 2024-08-25 18:26:56 +0000