summaryrefslogtreecommitdiff
path: root/include/configs
Commit message (Collapse)AuthorAgeLines
* microblaze: Flush caches before enabling themMichal Simek2012-11-07-0/+4
| | | | | | | | Flushing caches is necessary because of soft reset which doesn't clear caches. Signed-off-by: Michal Simek <monstr@monstr.eu> Reviewed-by: Marek Vasut <marex@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-avr32Tom Rini2012-11-05-9/+0
|\
| * avr32: allow multi block mmc access for all boardsAndreas Bießmann2012-11-02-9/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 1db7377a70a8d931c32648e717695133120d5456 fixes the gen_atmel_mci driver to be able to use multi block access for avr32. Therefore remove the setting which forces single block access. This also adds a huge performace gain for mmc access: ---8<--- Loading file "/boot/uImage" from mmc device 0:1 1830666 bytes read in 1293 ms (1.3 MiB/s) --->8--- vs. ---8<--- Loading file "/boot/uImage" from mmc device 0:1 1830666 bytes read in 237 ms (7.4 MiB/s) --->8--- Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: haavard.skinnemoen@atmel.com Cc: hans-christian.egtvedt@atmel.com Cc: mpfj@mimc.co.uk Cc: alex.raimondi@miromico.ch Cc: julien.may@miromico.ch Cc: egtvedt@samfundet.no Cc: havard@skinnemoen.net
* | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2012-11-05-26/+699
|\ \
| * | arm: atmel: cpux9k2: add missing cache configsJens Scharsig (BuS Elektronik)2012-11-04-1/+4
| | | | | | | | | | | | | | | | | | | | | * add CONFIG_SYS_CACHELINE_SIZE to eb_cpux9k2 board config header * dissable dcache (CONFIG_SYS_DCACHE_OFF) for eb_cpux9k2 Signed-off-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
| * | Merge remote-tracking branch 'u-boot-ti/master'Albert ARIBAUD2012-11-03-5/+540
| |\ \
| | * | eco5pk: Add new board and default configRaphael Assenat2012-10-30-0/+81
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Raphael Assenat <raph@8d.com> [trini: Squash boards.cfg / MAINTAINERS change into main patch] Signed-off-by: Tom Rini <trini@ti.com>
| | * | New board support: Nokia RX-51 aka N900Pali Rohár2012-10-30-0/+452
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on previous work by: Alistair Buxton <a.j.buxton@gmail.com> Signed-off-by: Pali Rohár <pali.rohar@gmail.com> Cc: Ивайло Димитров <freemangordon@abv.bg>
| | * | am335x_evm: Enable use of UART{1,2,3,4,5}Andrew Bradford2012-10-25-5/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add targets of am335x_evm_uart{1,2,3,4,5} to have serial input/output on UART{1,2,3,4,5} for use with the Beaglebone RS232 cape, am335x_evm daughterboard, and other custom configurations. Modify target for am335x_evm to include SERIAL1 and CONS_INDEX=1 options in order to clarify UART selection requirements. Signed-off-by: Andrew Bradford <andrew@bradfordembedded.com>
| * | | tegra: move to common SPL frameworkAllen Martin2012-10-29-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change tegra SPL to use common SPL framework. Any tegra specific initialization is now done in spl_board_init() instead of board_init_f()/board_init_r(). Only one SPL boot target is supported on tegra, which is boot to RAM image. jump_to_image_no_args() must be overridden on tegra so the host CPU can be initialized. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Tested-by: Lucas Stach <dev@lynxeye.de> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | ARM: tegra: derive CONFIG_SPL_MAX_SIZE instead of hard-coding itStephen Warren2012-10-29-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For Tegra, the SPL and main U-Boot are concatenated together to form a single memory image. Hence, the maximum SPL size is the different in TEXT_BASE for SPL and main U-Boot. Instead of manually calculating SPL_MAX_SIZE based on those two TEXT_BASE, which can lead to errors if one TEXT_BASE is changed without updating SPL_MAX_SIZE, simply perform the calculation automatically. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Allen Martin <amartin@nvidia.com> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | tegra: nand: make ONFI detection workLucas Stach2012-10-29-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the missing bits to the Tegra NAND driver to make ONFI detection work properly. Also add it to the Tegra default config, as it seems to be a reasonable thing to have it available on all boards that use any kind of NAND. Signed-off-by: Lucas Stach <dev@lynxeye.de> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | ARM: tegra: Seaboard: enable multiple USB portsStephen Warren2012-10-29-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The device tree already contains the required configuration for both the USB1 and USB3 ports. Enable the required configuration options to enable both these ports, which in turn allows the USB1 port to be used. Note that on a true Seaboard, this port is typically used as a device port hosting Tegra's USB recovery protocol. However, on the Springbank derivative, this port is the only external USB port, so we enable it as a host port so that USB peripherals may be used. Enabling this port in U-Boot as a host port doesn't prevent the port from reverting to a device port when the CPU is reset into recovery mode. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | ARM: tegra: Harmony: enable ULPI USB portStephen Warren2012-10-29-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ULPI port is routed onto pins on the mini PCI Express connector. A standard breakout board may be used to access the port. * Add required DT entries to configure the ULPI port. * Setup up the ULPI pinmux in the board code. * Enable multiple USB controller and ULPI support in the board config. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | ARM: tegra: use standard variables to define load addressesStephen Warren2012-10-29-3/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, Tegra's default environment uses non-standard variables to define where boot scripts should load the kernel, FDT, and initrd. This change both changes the variable names to match those described in U-Boot's README, and shuffles their values around a little so that the values make a little more sense; see comments in the patch for rationale behind the values chosen. Note that this patch does remove the old non-standard variable "fdt_load" from the default environment, so this patch requires people to change their boot scripts. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | ARM: tegra: define CONFIG_SYS_BOOTMAPSZStephen Warren2012-10-29-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This define indicates the size of the memory region where it is safe to place data passed to the Linux kernel (ATAGs, DTB, initrd). The value needs to be: a) Less than or equal to RAM size. b) Small enough that the area is not within the kernel's highmem region, since the kernel cannot access ATAGs/DTB/initrd from highmem. c) Large enough to hold the kernel+DTB+initrd. 256M seems large enough for (c) in most circumstances, and small enough to satisfy (a) and (b) across any possible Tegra board. Note that the user can override this value via environment variable "bootm_mapsize" if needed. The advantage of defining BOOTMAPSZ is that we no longer need to define variable fdt_high in the default environment. Previously, we defined this to prevent the DTB from being relocated to the very end of RAM, which on most Tegra systems is within highmem, and hence which would cause boot failures. A user can still define this variable themselves if they want the FDT to be either left in-place wherever loaded, or copied to some other specific location. Similarly, there should no longer be a strict requirement for the user to define initrd_high if using an initrd. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | tegra: add Colibri T20 board supportLucas Stach2012-10-29-0/+83
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds board support for the Toradex Colibri T20 module. Working functions: - SD card boot - USB boot - Network - NAND environment Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | Merge remote-tracking branch 'u-boot-imx/master'Albert ARIBAUD2012-10-27-15/+31
| |\ \ \
| | * | | mx6qarm2: Enable DCACHE and CONFIG_MMC_BOUNCE_BUFFERFabio Estevam2012-10-20-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Data cache and CONFIG_MMC_BOUNCE_BUFFER can be safely enabled now. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| | * | | mx6qsabre_common: Enable DCACHE and CONFIG_MMC_BOUNCE_BUFFERFabio Estevam2012-10-20-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Data cache and CONFIG_MMC_BOUNCE_BUFFER can be safely enabled now. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| | * | | mx25pdk: Use internal RAM for stack pointerFabio Estevam2012-10-20-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use internal RAM for stack pointer as it is done in other i.MX boards. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| | * | | mx6qsabrelite: enable DCache and MMC bounce bufferDirk Behme2012-10-17-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The recent U-Boot version 2012.07 has improved drivers (e.g. MMC and network/FEC) regarding DCache handling. So it should be safe to use the DCache on the i.MX6, now. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de>
| | * | | configs: mx53evk: Remove CONFIG_HAS_ETH1Fabio Estevam2012-10-17-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mx53evk has only one Ethernet port, so remove CONFIG_HAS_ETH1 option. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| | * | | configs: mx51evk: Remove CONFIG_HAS_ETH1Fabio Estevam2012-10-17-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mx51evk has only one Ethernet port, so remove CONFIG_HAS_ETH1 option. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| | * | | configs: mx53loco: Remove CONFIG_HAS_ETH1Fabio Estevam2012-10-17-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mx53loco has only one Ethernet port, so remove CONFIG_HAS_ETH1 option. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| | * | | mx53loco: Adapt the IPU clockFabio Estevam2012-10-17-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since PLL2 now has changed, it is necessary to adapt the CONFIG_IPUV3_CLK accordingly. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| | * | | i.MX6: mx6qsabrelite: Add splash screen supportEric Nelson2012-10-16-1/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds support for HDMI, two LVDS panels and one RGB panel to the SABRE-Lite board. Displays supported: HDMI - 1024 x 768 for maximum compatibility Hannstar-XGA - 1024 x 768 LVDS (Freescale part number MCIMX-LVDS1) wsvga-lvds - 1024 x 600 LVDS (Boundary p/n Nit6X_1024x600) wvga-rgb - 800 x 480 RGB (Boundary p/n Nit6X_800x480) Since the ipuv3_fb display driver currently supports only a single display, this code auto-detects panel by probing the HDMI Phy for Hot Plug Detect or the I2C touch controller of the LVDS and RGB displays in the priority listed above. Setting 'panel' environment variable to one of the names above will override auto-detection. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
| | * | | mx6qsabreauto: Change mmcroot so it works out of boxOtavio Salvador2012-10-16-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The mmcroot setting vary between mx6qsabreauto and mx6qsabresd so we move this to the board configuration file. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
* | | | | x86: config: Enable AHCI support for corebootSimon Glass2012-11-02-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable AHCI driver for Intel SATA devices. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | | | am335x_evm: Add CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG supportTom Rini2012-11-02-0/+11
| |_|_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We add CONFIG_ENV_VARS_UBOOT_CONFIG, CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG and CONFIG_BOARD_LATE_INIT to set the variables and then fdtfile and findfdt to make us of this. It is now possible to do 'run findfdt' to have fdtfile be set to the value of the dtb file to load for the board we are running on. Signed-off-by: Tom Rini <trini@ti.com>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-coldfireTom Rini2012-10-29-1/+1
|\ \ \ \
| * | | | ColdFire: Remove save env in NAND support for M54418TWR board.Jason Jin2012-10-29-1/+1
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | This patch remove the env saving in NAND as so far the NAND driver is not ported to the M54418TWR platform. Signed-off-by: Jason Jin <Jason.jin@freescale.com>
* | | | PPC: remove dead boards (AMX860, c2mon, ETX094, IAD210, LANTEC, SCM)Wolfgang Denk2012-10-28-2522/+0
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | These boards have long reached EOL, and there has been no indication of any active users of such hardware for years. Get rid of the dead weight. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Wolfgang Grandegger <wg@denx.de>
* | | arm: arm925t: remove SX1 boardAlbert ARIBAUD2012-10-26-189/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SX1 does not build properly by itself, is not built as part of MAKEALL arm or MAKEALL -a arm, and is only present in Makefile, not boards.cfg. As it also has no entry in MAINTAINERS, it is orphan and non-functional. Remove it. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
* | | Merge remote-tracking branch 'u-boot-atmel/master'Albert ARIBAUD2012-10-26-0/+10
|\ \ \
| * | | ARM: at91sam9x5: enable MCI0 support for 9x5ek board.Wu, Josh2012-10-17-0/+10
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | | | Merge remote-tracking branch 'u-boot-ti/master'Albert ARIBAUD2012-10-26-41/+53
|\ \ \ \ | | |_|/ | |/| |
| * | | am33xx: Add SPI SPL as an optionTom Rini2012-10-25-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the required config.mk logic for this SoC as well as the BOOT_DEVICE define. Finally, enable the options on the am335x_evm. Signed-off-by: Tom Rini <trini@ti.com>
| * | | OMAP3: add video support to the mcx boardStefano Babic2012-10-25-1/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add video support to the board with the display focaltech etm070003dh6. Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | | OMAP3: mcx: updated to new hardware revisionStefano Babic2012-10-25-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some GPIOs differ in the new revision board. Previous revision are considered obsolete and they will not anymore supported. Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | | OMAP3: updated pinmux and environment for new revision of mcx boardStefano Babic2012-10-25-5/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The mcx board was slightly modified and the pinmux must be updated. There is no need to support the old board, that becomes obsolete. Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | | cm-t35: clean unused defines from configIgor Grinberg2012-10-23-11/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Neither cm-t35, nor cm-t3730 is using OneNAND or flash. Remove the related defines from config file. Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
| * | | configs: Fix usage of mmc rescanAndrew Bradford2012-10-23-22/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix usage of 'mmc rescan' by many configs. Proper use is 'mmc dev ${mmcdev}; mmc rescan' to set the mmc device and then rescan the device. 'mmc rescan' itself does not take any arguments. Signed-off-by: Andrew Bradford <andrew@bradfordembedded.com>
* | | | ColdFire: Add Freescale MCF54418TWR ColdFire development board supportAlison Wang2012-10-24-0/+448
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add Freescale MCF54418TWR ColdFire development board support. Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Alison Wang <b18965@freescale.com>
* | | | km83xx: add kmvect1 boardGerlando Falauto2012-10-23-3/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the new kmvect1 board powered by the mpc8309 processor. As this board is very similar to the existing suvd3, instead of adding a new config header file, just add a new config option to suvd3.h Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | | km83xx: add common support for km8309 boardsGerlando Falauto2012-10-23-0/+182
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Keymile boards based on mpc8309 (it would be only kmvect1 for now) Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com> [#elseif -> #if to allow kmcoge5ne and kmeter1 to build successfully] Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | | cleanup: introduce CONFIG_MPC830xGerlando Falauto2012-10-23-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce a new configuration token CONFIG_MPC830x to be shared among mpc8308 and mpc8309. Define it for existing 8308 boards, and refactor existing common code so to make future introduction of 8309 simpler. Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | | cosmetic: suvd3: align #definesGerlando Falauto2012-10-23-3/+3
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | | Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xxTom Rini2012-10-22-4/+922
|\ \ \ \
| * | | | powerpc/t4qds: Add T4QDS boardYork Sun2012-10-22-0/+910
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The T4240QDS is a high-performance computing evaluation, development and test platform supporting the T4240 QorIQ Power Architecture™ processor. SERDES Connections 32 lanes grouped into four 8-lane banks Two “front side” banks dedicated to Ethernet Two “back side” banks dedicated to other protocols DDR Controllers Three independant 64-bit DDR3 controllers Supports rates up to 2133 MHz data-rate Supports two DDR3/DDR3LP UDIMM/RDIMMs per controller QIXIS System Logic FPGA Each DDR controller has two DIMM slots. The first slot of each controller has up to 4 chip selects to support single-, dual- and quad-rank DIMMs. The second slot has only 2 chip selects to support single- and dual-rank DIMMs. At any given time, up to total 4 chip selects can be used. Detail information can be found in doc/README.t4qds Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>