| Commit message (Collapse) | Author | Age | Lines |
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Before running authentication on uImage in DDR, u-boot first check if
SEC_CONFIG[1] (OTP_CFG5[1]) is burned. If so, it means the chip is in
secure configuration, the authentication continues; if not, the chip
in not in secure configuration, just bypass the authentication
Signed-off-by: Eric Sun <jian.sun@freescale.com>
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Security boot need to use fuse item. Thus it should not be enabled as
default.
Signed-off-by: Terry Lv <r65388@freescale.com>
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The first stage of High Assurance Boot (HAB) is the authentication of
U-boot. A CST tool is used to generate the CSF data, which include
public key, certificate and instruction of authentication process. Then
it is attached to the original u-boot.bin
The IVT should be modified to contain a pointer to the CSF data. The original
u-boot.bin is with size between 0x27000 to 0x28000. For convinence, we first
extend the u-boot.bin to 0x2F000 (with fill 0xFF). Then concatenate it with
the CSF data. The combined image is again extend to a fixed length (0x31000),
which is used as the IVT size parameter.
The new memory layout is as the following.
U-Boot Image
+-------------+
| Blank |
|-------------| 0x400
| IVT |-----------------------+
|-------------| |
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|Remaining UB | | CSF pointer
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|-------------| |
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| Fill Data | |
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|-------------| 0x2F000 <-------------+
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| CSF Data |
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|-------------|
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| Fill Data |
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+-------------+ 0x31000
HAB APIs are ROM implemented, the entry table is located in a fixed
location in the ROM. We export them so that during the HAB we can
have some information about the secure boot process. For convinience
some wrapper API is implemented based on the HAB APIs.
- get_hab_status : used to dump information of authentication result
- authenticate_image : used by u-boot to authenticate uImage
For security hardware to function, CAAM related clock (CG0[4~6]) must
be open. They are default closed in the original U-boot.
"hab_caam_clock_enable" and "hab_caam_clock_disable" are created to
open and close these clock gates.
The generation of CSF data is not in the scope of this patch. CST tool
will be used for this purpose. The procedure will be introduced in
another document.
Signed-off-by: Eric Sun <jian.sun@freescale.com>
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Add "nosmp arm_freq=800" options for mx6solo sabreauto board
by default
Signed-off-by: Lily Zhang <r58066@freescale.com>
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add android config file;
support booti fastboot command and etc.
Signed-off-by: Lin Fuzhen <fuzhen.lin@freescale.com>
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SPI NOR flash(m25p32-vmw6tg) not probed and function as expected, this
due to the lack of iomux pad config and incorrect CS line.
This patch fix the above issue and also fix the mfg config file
(For the code readable, I intent to omit the following checkpatch warning:
in the iomux/mx6_pins.h WARNING: line over 80 characters)
Signed-off-by: Jason Liu <r64343@freescale.com>
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- i.mx6q sabresd revA ethernet phy addr is 0 (PHYADDRESS1-PHYADDRESS0:00)
, but revB ethernet phy address is 0x1 (PHYADDRESS1-PHYADDRESS0:01).
To avoid to change hardware, add auto discover phy address configuration.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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Add mfg configs for mx6dl sabresd and mx6solo sabreauto.
Signed-off-by: Terry Lv <r65388@freescale.com>
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- FEC detect phy OUID to check phy type, so remove MICREL macro
in board config file.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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add android config to this board.
only basic boot support.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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The serial of patches adds the initial support for mx6dl
sabra sd board:
- DDR3 400MHz@64bit, 1G, 256M*4
- SD/MMC basic operations
- Add PIN/IOMUX support for mmx6dl sabresd.
- Ethernet is ok for 100/1000Mbps.
- OTP fuse
Signed-off-by: Fugang Duan <B38611@freescale.com>
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fix build error invoke by this patch:
commit e3303f5b59df570c1f76b043d85e42be3dc7a63f
Author: Lily Zhang <r58066@freescale.com>
Date: Fri Mar 9 21:16:51 2012 +0800
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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The serial of patches adds the initial support for mx6solo
sabra auto board:
- DDR3 400MHz@32bit
- SD/MMC basic operations
- SPI-NOR basic operations
- OTP fuse
- clock command
- Anatop regulator command
- splash screen support by enabling "CONFIG_SPLASH_SCREEN"
Because i.mx6solo share the same ARD board with i.mx6dq,
the same board file is shared between i.mx6dq and i.mx6solo.
CONFIG_MX6DL configuration is used to distinguish the difference.
This patch is used to add mx6solo sabreauto configuration support.
Signed-off-by: Lily Zhang <r58066@freescale.com>
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Change fastboot vender id to orignal ID to
avoid install USB driver.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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This patch adds splash screen support for MX6 ARD.
Changes:
- Configure GPIO_3 as I2C3_SCL
- Change MAX7310 I2C address as 0x30
- Enable LVDS power
Usage:
1. To enable splash screen by default, define
CONFIG_SPLASH_SCREEN in mx6q_sabreauto.h
2. Config U-boot with followed command:()
setenv splashimage '0x30000000'
#Set splash position as Center
setenv splashpos 'm,m'
#Set LVDS via LVDS bridge 0
setenv lvds_num 0
Signed-off-by: Lily Zhang <r58066@freescale.com>
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Add MFG tool support for i.MX6DQ ARD board
Signed-off-by: Lily Zhang <r58066@freescale.com>
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Fix the following build error when building mx53_smd_android
config:
mx53_smd_android.h:175: error: expected identifier or xx
before string constant
Signed-off-by: Lily Zhang <r58066@freescale.com>
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CONFIG_CPU_1_2G is used to enable 1.2GHz@1.3V. To enable
1.2GHz by default, enable CONFIG_CPU_1_2G into config file.
For example, uncomment CONFIG_CPU_1_2G in mx53_smd.h or
mx53_smd_android.h.
Signed-off-by: Lily Zhang <r58066@freescale.com>
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Apply script "Mx6DL_init_LPDDR2_400MHz_Micron_1.1.inc" in IVT, make U-boot
work for the LPDDR2 Board. The Make target name for the new board is
"MX6DL_ARM2_LPDDR2_CONFIG"
The script is provided by Chen Wei - B26879 for a quick bring up, which don't
have a corresponding compass link. It is uploaded to CR ticket page for
reference.
Originally for MX6DL DDR3 board, "CONFIG_MX6DL" is defined. It is used by
"board/freescale/mx6q_arm2/flash_header.S" to select the correct IVT. Since
MX6DL LPDDR2 board also define this macro, for distiguish purpose, another
2 macros "CONFIG_MX6DL_DDR3", "CONFIG_MX6DL_LDPPR2" are defined
Signed-off-by: Eric Sun <jian.sun@freescale.com>
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define a new macro to show which mmc bus was main storage
in recovery check, only check the main storage /cache
partition.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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The default console on i.MX6DL ARM2 CPU board is
ttymxc3
Signed-off-by: Lily Zhang <r58066@freescale.com>
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A "destroyenv" command is provided to erase any pre-save environment in the
boot storage. The command simply add 1 to the CRC section and write it back
to the storage. Per the logic of U-Boot, this means after a reset, the
software will recognize the stored environment settings as "damaged" and turn
to use the default one, which is defined in "default_environment"
With this command, platform bring up owner can maintain a "ready-to-use"
environment settings in software which others can use very conviniently.
U-boot users can also use it to do a environment restore if they want.
-----------------------------------
Usage Example:
> destroyenv
invalidate the CRC
write invalidate enviroment data to storage
Erasing SPI flash...Erasing SPI NOR flash 0xc0000 [0x2000 bytes]
..SUCCESS
Writing to SPI flash...Writing SPI NOR flash
0xc0000 [0x2000 bytes] <- ram 0x276009b8
SUCCESS
done
>
-----------------------------------
Signed-off-by: Eric Sun <jian.sun@freescale.com>
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change boot command and recovery command to booti.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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Support booti command which can boot from a boot.img
boot.img is a zImage + ramdisk.img + bootargs + boot addr
which include these info can be used to avoid mis match between
kernel and ramdisk, also can avoid commit to chagne default
bootargs.
For example:
> booti mmc1
command will read the boot.img from 1M offset,
and then parser the bootargs and ramdisk
then do the boot from that zImage.
> booti mmc1 recovery
will going to read the recovery's partition no
and offset and boot from recovery image.
this recovery image also a zImage + ramdisk
bootargs:
if uboot have define a env var 'bootargs', booti command
will use this bootargs as kernel cmdline
if you want use boot.img 's bootargs, just type:
> setenv bootargs
in uboot to clear the bootargs in uboot env.
our default uboot env will be NULL in config file.
also, android use boot.img to support OTA.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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dd read and change voltage support for mx6.
For help, pls type "help regul"
Detail command info:
regul list - List all regulators' name
regul show all - Display all regulators' voltage
regul show core - Show core voltage in mV
regul show periph - Show peripheral voltage in mV
regul show <regulator name> - Show regulator's voltage in mV
regul set core <voltage value> - Set core voltage in mV
regul set periph <voltage value> - Set periph voltage in mV
regul set <regulator name> <voltage value> - Set regulator's voltage in
mV
Example:
MX6Q ARM2 U-Boot > regul list
Name Voltage
vddpu
vddcore
vddsoc
vdd2p5
vdd1p1
vdd3p0
MX6Q ARM2 U-Boot > regul show all
Name Voltage
vddpu 1100000
vddcore 1100000
vddsoc 1200000
vdd2p5 2400000
vdd1p1 1100000
vdd3p0 3000000
MX6Q ARM2 U-Boot > regul show periph
Name Voltage
periph: 1100000
MX6Q ARM2 U-Boot > regul show core
Name Voltage
core: 1100000
MX6Q ARM2 U-Boot > regul set core 1100000
Set voltage succeed!
Name Voltage
core: 1100000
Signed-off-by: Terry Lv <r65388@freescale.com>
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enable mfg profile.
enable recovery mode.
mx6q_sabresd board's usb otg have HW issue, disable it in
android profile.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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Add MFG tool support in imx6dl U-boot
Signed-off-by: Lily Zhang <r58066@freescale.com>
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Move partition command from nand to sata in mx6 for nand don't need
these partition command.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Two issues are fixed:
1. Enlarge malloc size to 10K.
2. Too many configs in sabresd's iram config, remove redundent configs.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Add mx6dl iram boot config.
Signed-off-by: Terry Lv <r65388@freescale.com>
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CONFIG_DOS_PARTITION, CONFIG_CMD_FAT, CONFIG_CMD_EXT2 are only for
MMC and SATA, remove from NAND config segment
Signed-off-by: Allen Xu <allen.xu@freescale.com>
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remove arm_freq=800 from default env thus keep 1GHz for kernel
Signed-off-by: Jason Liu <r64343@freescale.com>
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enable i.mx6solo config by default
Signed-off-by: Jason Liu <r64343@freescale.com>
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The 32bit DDR script got from the following link:
http://compass.freescale.net/livelink/livelink/225194568/
MX6DL_init_DDR3_400MHZ_32bit_1.0.inc.txt?func=doc.Fetch&nodeid=225194568
The DDR hw connection on the ARM2 board is 64bit wire, but we can make it use
as 32bit, the side effect is that DDR access size will reduce to the half
Signed-off-by: Jason Liu <r64343@freescale.com>
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This patch add the initial support for i.mx6dl ARM2 board
-SD/MMC basic
-DDR 400Mhz,
-FEC,basic
Due to i.mx6dl shares the same board with i.mx6q on ARM2,
the most common code should be the same as the i.mx6q ARM2
So, no need to create one seperate board file for i.mx6dl.
But We can't simply resue anything from the board file since
the i.mx6dl iomux is changed and thus we have to deal with the
difference between i.mx6q and i.mx6dl for the pad setting part.
Signed-off-by: Jason Liu <r64343@freescale.com>
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For ARM2 and Sabreauto, change TTY0 to TTY3 (which is physical UART4)
For SabreSD, Change TTY3 to TTY0 (which is physical UART1)
Signed-off-by: Eric Sun <jian.sun@freescale.com>
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Add suport for i.MX 6Quad SABRE Smart Device.
Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
Signed-off-by: Tony Lin <tony.lin@freescale.com>
Signed-off-by: Frank Li <Frank.Li@freescale.com>
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Update the config to delete bootcmd_base from the default env settings for
Sabre-lite
Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
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change default console to ttymxc1
Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
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Fix a typo in default config.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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1. C macro don't eval, so the rd_loadaddr will be (CONFIG_LOADADDR + 0x300000)
rather then number, will cause uboot can't boot, change this to a number which
make default boot env correct.
2. update android mx6q saberlite config to align lastest code status.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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Add fec support for sabreauto board
Need hardware rework:
1. Add R450 10.0k
2. Remove R1105 1k
3. short Pin 1,2 of u516, will impact CAN1
Signed-off-by: Hake Huang <b20222@freescale.com>
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Disable the uboot workaround. It will crash the MFGTOOL.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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Align latest boot command with user guide.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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For uImage's size of mx6q is larger than 3M, we enlarge mmc read size to
4M in default env.
Signed-off-by: Terry Lv <r65388@freescale.com>
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As we want TF to be default boot media.
Then SD slot can be used by WIFI dongle.
Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
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add android mx6q sabrelite configure file.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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Add support for MX6Q ARM2 LPDDR2 POP CPU Board. Change thing include
- TEXT_BASE
- RAM address and size
- Initialization DCD
- MMU related code
Use mx6q_arm2_lpddr2pop_config as the build config. After u-boot.bin is
generated, set the board to serial download mode, use sb loader to run the
bootloader.
There is one line in the original DDR initialization script
setmem /32 0x00B00000 = 0x1
however this address can not be accessed by DCD. A try to add it later in
"dram_init" block the boot up. Waiting for IC team to give an explanation
on it. Hold temperorily
The MMU Change can be concluded as the following
- Cacheable and Uncacheable SDRAM allocation changes to
Phys Virtual Size Property
---------- ---------- -------- ----------
0x10000000 0x10000000 256M cacheable
0x80000000 0x20000000 16M uncacheable
0x81000000 0x21000000 240M cacheable
- TEXT_BASE change to 0x10800000, which reserves 8MB of memory at the start
of SDRAM. This address makes sure that the text section of U-boot have the
same Physical and Virtural address, thus the PC don't need to change when
MMU is enabled. Also the text section is all allocated in cacheable memory,
which may increase excecution performance.
- Since this SDRAM allocation avoid overlap in physical memory between
cacheable and uncacheable memory, the implementation of __ioremap can be
ignored
Signed-off-by: Eric Sun <jian.sun@freescale.com>
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Fix for DDR3 initialization based on the MX6Q ARD. This will
reflect 2GB of RAM onboard.
Signed-off-by: Prabhu Sundararaj <prabhu.sundararaj@freescale.com>
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Add "download_mode" command to U-Boot. It will force a system reset and let
boot running in "boot from serial rom" mode, which can be used by manufacturing
tool.
The command will triggle a write to SRC_GPR9 and SRC_GPR10, then triggle a
watchdog reset. GPR9 and GPR10 can maintain their value during the reset, the
value in it make ROM to start in "boot from serial rom" mode. After that GPR9
and GPR10 are written by their original value for normal boot.
Signed-off-by: Eric Sun <jian.sun@freescale.com>
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