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* 85xx: Introduce CONFIG_SYS_PCI*_IO_VIRT for FSL boardsKumar Gala2009-01-23-6/+28
| | | | | | | | | Introduce a new define to seperate out the virtual address that PCI IO space is at from the physical address. In most situations these are mapped 1:1. However any code accessing the bus should use VIRT. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Andy Fleming <afleming@freescale.com>
* 85xx: Introduce CONFIG_SYS_PCI*_MEM_VIRT for FSL boardsKumar Gala2009-01-23-26/+56
| | | | | | | | | Introduce a new define to seperate out the virtual address that PCI memory is at from the physical address. In most situations these are mapped 1:1. However any code accessing the bus should use VIRT. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Andy Fleming <afleming@freescale.com>
* 85xx: Use CONFIG_SYS_{PCI*,RIO*}_MEM_PHYS for physical address on FSL boardsKumar Gala2009-01-23-0/+1
| | | | | | | | Use the _MEM_PHYS defines instead of _MEM_BUS for LAW and real address fields of TLBs. This is what we should have always been using from the start. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Andy Fleming <afleming@freescale.com>
* 85xx: Convert CONFIG_SYS_PCI*_IO_BASE to _IO_BUS for FSL boardsKumar Gala2009-01-23-28/+28
| | | | | | | Use CONFIG_SYS_PCI*_IO_BUS for the bus relative address instead of _IO_BASE so we are more explicit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Convert CONFIG_SYS_{PCI*,RIO*}_MEM_BASE to _MEM_BUS for FSL boardsKumar Gala2009-01-23-52/+52
| | | | | | | | Use CONFIG_SYS_{PCI,RIO}_MEM_BUS for the bus relative address instead of _MEM_BASE so we are more explicit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Andy Fleming <afleming@freescale.com>
* 85xx: separate FLASH BASE virtual from physical addressKumar Gala2009-01-23-8/+10
| | | | | | | | | | Added a CONFIG_SYS_FLASH_BASE_PHYS for use as the physical address and maintain CONFIG_SYS_FLASH_BASE as the virtual address of the flash. This allows us to deal with 36-bit phys on these boards in the future. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Andy Fleming <afleming@freescale.com>
* 85xx: separate PIXIS virtual from physical addressKumar Gala2009-01-23-2/+4
| | | | | | | | | | Added a PIXIS_BASE_PHYS for use as the physical address and maintain PIXIS_BASE as the virtual address of the PIXIS fpga registers. This allows us to deal with 36-bit phys on these boards in the future. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Andy Fleming <afleming@freescale.com>
* Merge branch 'master' of git://git.denx.de/u-boot-nand-flashWolfgang Denk2009-01-23-65/+6
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| * NAND: rename NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPSWolfgang Grandegger2009-01-23-61/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch renames NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS and changes the default from 8 to 1 for the legacy and the new MTD NAND layer. This allows to remove all NAND_MAX_CHIPS definitions in the board config files because none of the boards use multi chip support (NAND_MAX_CHIPS > 1) so far. The bamboo and the DU440 define #define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE but that's bogus and did not work anyhow. Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * mpc83xx: enable eLBC NAND support for MPC8315ERDB boardDave Liu2009-01-23-5/+7
| | | | | | | | Signed-off-by: Dave Liu <daveliu@freescale.com>
* | microblaze: Add cache flushMichal Simek2009-01-23-1/+18
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* | microblaze: Change microblaze-generic config fileMichal Simek2009-01-23-47/+52
| | | | | | | | Signed-off-by: Michal Simek <monstr@monstr.eu>
* | microblaze: Rename ml401 to microblaze-genericMichal Simek2009-01-23-2/+1
|/ | | | Signed-off-by: Michal Simek <monstr@monstr.eu>
* ppc4xx: Add loadpci command to esd's CPCI4052 and CPCI405AB boardsMatthias Fuchs2009-01-14-0/+5
| | | | | | | | This patch adds esd's loadpci BSP command to CPCI4052 and CPCI405AB board. This requires CONFIG_CMD_BSP and CONFIG_PRAM. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: Stefan Roese <sr@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2009-01-14-0/+1
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| * Some changes of TLB entry setting for MPC8572DSHaiying Wang2009-01-13-0/+1
| | | | | | | | | | | | | | | | | | | | - Move the TLB entry of PIXIS_BASE from TLB0 to TLB1[8], because in CAMP mode, all the TLB0 entries will be invalidated after cpu1 brings up kernel, thus cpu0 can not access PIXIS_BASE anymore (any access will cause DataTLBError exception) - Set CONFIG_SYS_DDR_TLB_START to 9 for MPC8572DS board. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
* | mpc8610hpcd: Fix PCI mapping conceptsBecky Bruce2009-01-13-11/+13
| | | | | | | | | | | | | | | | | | Rename _BASE to _BUS, as it's actually a PCI bus address, separate virtual and physical addresses into _VIRT and _PHYS, and use each appopriately. This makes the code easier to read and understand, and facilitates mapping changes going forward. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
* | sbc8641d: Fix PCI mapping conceptsBecky Bruce2009-01-13-14/+18
|/ | | | | | | | | Rename _BASE to _BUS, as it's actually a PCI bus address, separate virtual and physical addresses into _VIRT and _PHYS, and use each appopriately. This makes the code easier to read and understand, and facilitates mapping changes going forward. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
* m501sk: move to the common memory setupJean-Christophe PLAGNIOL-VILLARD2009-01-06-0/+33
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* at91rm9200: rename lowlevel init value to CONFIG_SYS_Jean-Christophe PLAGNIOL-VILLARD2009-01-06-92/+92
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2008-12-30-16/+1139
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| * XPedite5200 board support cleanupPeter Tyser2008-12-29-0/+546
| | | | | | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
| * sbc8548: use proper PHY addressPaul Gortmaker2008-12-19-2/+2
| | | | | | | | | | | | | | | | | | The values given for the PHY address were wrong, so the code read no valid PHY ID, and fell through to the generic PHY support, which would work on 1000M but would not auto negotiate down to 100M or 10M. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
| * sbc8548: enable command line editing by default.Paul Gortmaker2008-12-19-0/+1
| | | | | | | | | | | | Lets make things a bit more user friendly. It isn't 1985 anymore. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
| * sbc8548: don't enable the 3rd and 4th eTSECPaul Gortmaker2008-12-19-14/+1
| | | | | | | | | | | | | | These interfaces don't have usable connectors on the board, so don't bother enumerating or configuring them. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
| * XPedite5370 board supportPeter Tyser2008-12-19-0/+589
| | | | | | | | | | | | | | | | Initial support for Extreme Engineering Solutions XPedite5370 - a MPC8572-based 3U VPX single board computer with a PMC/XMC site. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* | MIPS: qemu_mips: move env storage just after u-bootJean-Christophe PLAGNIOL-VILLARD2008-12-17-1/+1
|/ | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
* include/configs/at91cap9adk.h: fix typo.Wolfgang Denk2008-12-16-1/+1
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Coding style cleanup, update CHANGELOG.Wolfgang Denk2008-12-16-2/+1
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Remove unused CONFIG_ADDR_STREAMING definesPeter Tyser2008-12-14-20/+0
| | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* Fix new found CFG_Jean-Christophe PLAGNIOL-VILLARD2008-12-14-9/+9
| | | | | | | Also fix some minor typos. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2008-12-13-7/+4
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| * ppc4xx: Update TEXT_BASE for CPCI405 boardsMatthias Fuchs2008-12-10-3/+3
| | | | | | | | | | | | | | This patch fixes building U-Boot for CPCI405 boards. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Remove some features from ALPR to fit into 256k againStefan Roese2008-12-10-4/+1
| | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-shWolfgang Denk2008-12-13-0/+3
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| * | sh: Update ms7722se board configNobuhiro Iwamatsu2008-12-10-0/+3
| |/ | | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | microblaze: Remove XUPV2P boardMichal Simek2008-12-10-226/+0
| | | | | | | | | | | | | | | | | | | | | | --- Microblaze platforms use generic settings and to have many platforms is confusing that's why I decided to remove this platform from U-BOOT. ml401 tree is sufficient for covering all Microblaze platforms. This change will go through microblaze custodian tree.
* | microblaze: Remove CONFIG_LIBFDT due to error in common filesMichal Simek2008-12-10-2/+0
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* | microblaze: Fix ml401 uart16550 settingMichal Simek2008-12-10-7/+10
|/ | | | Signed-off-by: Michal Simek <monstr@monstr.eu>
* Merge branch 'master' of git://git.denx.de/u-boot-at91Wolfgang Denk2008-12-09-14/+15
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| * at91: Choose environment variables location within make config targetNicolas Ferre2008-12-06-14/+15
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds the possiblity to choose the media where the environment will be located. This allow to choose this fundamental configuration without editing config files. Documentation file added. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Stelian Pop <stelian@popies.net> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | Use new CONFIG_SYS_VXWORKS parameters for Netstal boardsNiklaus Giger2008-12-07-15/+14
| | | | | | | | Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org>
* | Update U-Boot's build timestamp on every compilePeter Tyser2008-12-06-3/+3
|/ | | | | | | Use the GNU 'date' command to auto-generate a new U-Boot timestamp on every compile. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* Merge branch 'master' of git://git.denx.de/u-boot-at91Wolfgang Denk2008-12-05-1/+1
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| * at91rm9200dk: Fix typoJean-Christophe PLAGNIOL-VILLARD2008-12-02-1/+1
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2008-12-05-26/+18
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| * | 85xx: fix the wrong DDR settings for MPC8572DSDave Liu2008-12-04-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | The default DDR freq is 400MHz or 800M data rate, the old settings is pure wrong for the default case. Signed-off-by: Dave Liu <daveliu@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
| * | FSL: Moved BR_PHYS_ADDR for localbus to common headerKumar Gala2008-12-04-9/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The BR_PHYS_ADDR macro is useful on all machines that have local bus which is pretty much all 83xx/85xx/86xx chips. Additionally most 85xx & 86xx will need it if they want to support 36-bit physical addresses. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Andy Fleming <afleming@freescale.com>
| * | Removed unused CONFIG_L1_INIT_RAM symbol.Jon Loeliger2008-12-03-30/+0
| | | | | | | | | | | | | | | | | | | | | | | | Prevent further viral propogation of the unused symbol CONFIG_L1_INIT_RAM by just removing it. Signed-off-by: Jon Loeliger <jdl@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
| * | 85xx: remove the unused ddr_enable_ecc in the board fileDave Liu2008-12-03-4/+5
| |/ | | | | | | | | | | | | | | | | | | The DDR controller of 8548/8544/8568/8572/8536 processors have the ECC data init feature, and the new DDR code is using the feature, and we don't need the way with DMA to init memory any more. Signed-off-by: Dave Liu <daveliu@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
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