summaryrefslogtreecommitdiff
path: root/include/configs/tegra114-common.h
Commit message (Collapse)AuthorAgeLines
* ARM: tegra: implement bootcmd_pxeStephen Warren2014-03-05-0/+4
| | | | | | | | | This retrieves a PXE config file over the network, and executes it. This allows an extlinux config file to be retrieved over the network and executed, whereas the existing bootcmd_dhcp retrieves a U-Boot script. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: set CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTSStephen Warren2014-03-05-0/+1
| | | | | | | | | Tegra's EHCI controllers only have a single PORTSC register. Configure U-Boot to know this. This prevents e.g. ehci_shutdown() from touching non-existent registers. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: move CONFIG_TEGRAnnStephen Warren2014-03-05-5/+0
| | | | | | | | | | <asm/arch-tegra/tegra.h> needs to use CONFIG_TEGRA* to conditionalize some definitions, since some modules moved between generations. Move the definition of CONFIG_TEGRAnn to a header that's included earlier, so that it's set by the time tegra.h needs to use it. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: config: USB: Tegra30/114: Fix EHCI timeout issue on "bootp"Jim Lin2013-12-18-0/+1
| | | | | | | | | | | | Fix the timeout issue after running "bootp" command in u-boot console. For example you see "EHCI timed out on TD- token=0x...". TXFIFOTHRES bits of TXFILLTUNING register should be set to 0x10 after a controller reset and before RUN bit is set (per technical reference manual). Signed-off-by: Jim Lin <jilin@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: Make cache line size SoC specificThierry Reding2013-08-19-0/+3
| | | | | | | | | | | | Currently all Tegra SoCs are assumed to have 32 byte cache lines. This isn't true for Tegra114, however, which uses 4 Cortex-A15 cores and therefore uses a cache line size of 64 bytes. Move the cache line size setting to the per-SoC common configuration file. Signed-off-by: Thierry Reding <treding@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* Tegra: Config: Enable Tegra30/Tegra114 USB functionJim Lin2013-07-11-0/+3
| | | | | | | | | | Add USB EHCI, storage and network support. Tested on Tegra30 Cardhu, and Tegra114 Dalmore platforms. All works well. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* Tegra: Remove unused/non-existent spl linker script referenceTom Warren2013-05-28-2/+0
| | | | | | | Tegra builds use the common u-boot-spl.lds now. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* Tegra114: I2C: Enable I2C driver on Dalmore E1611 eval boardTom Warren2013-03-14-0/+3
| | | | | | | | Tested all 5 'buses', i2c probe enumerates device addresses on bus 0, 1 and 2. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
* Tegra114: Add/enable Dalmore build (T114 reference board)Tom Warren2013-02-11-0/+79
This build is stripped down. It boots to the command prompt. GPIO is the only peripheral supported. Others TBD. Signed-off-by: Tom Warren <twarren@nvidia.com>
generated by cgit v1.1 at 2024-11-06 16:33:22 +0000