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* 86xx: Fix non-64-bit compilation problems.Jon Loeliger2008-12-01-0/+14
| | | | | | | | | | | Introducing 64-bit (36-bit) support for the MPC8641HPCN failed to accomodate the other two 86xx boards. Introduce definitions for CONFIG_SYS_CCSRBAR_PHYS_{LOW,HIGH} CONFIG_SYS_CCSR_DEFAULT_DBAT{U,L} and CONFIG_SYS_CCSR_DEFAULT_IBAT{U,L} with nominal 32-bit values. Signed-off-by: Jon Loeliger <jdl@freescale.com> Acked-by: Becky Bruce <becky.bruce@freescale.com>
* mpc86xx: Change early FLASH mapping to 1M at CONFIG_MONITOR_BASE_EARLYBecky Bruce2008-11-10-0/+9
| | | | | | | | | | | We define CONFIG_MONITOR_BASE_EARLY to define the initial location of the bootpage in flash. Use this to create an early mapping definition for the FLASH, and change the early_bats code to use this. This change facilitates the relocation of the flash since the early mappings are no longer tied to the final location of the flash. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* powerpc: change 86xx SMP boot methodBecky Bruce2008-11-04-0/+7
| | | | | | | | | We put the bootpg for the secondary cpus into memory and use BPTR to get to it. This is a step towards converting to the ePAPR boot methodology. Also, the code is written to deal properly with more than 4GB of RAM. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* 86xx: Convert all fsl_pci_init users to new APIsKumar Gala2008-10-24-5/+0
| | | | | | | | | | | | Converted MPC8610HCPD, MPC8641HPCN, and SBC8641D to use fsl_pci_setup_inbound_windows() and ft_fsl_pci_setup(). With these changes the board code is a bit smaller and we get dma-ranges set in the device tree for these boards. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com> Acked-by: Jon Loeliger <jdl@freescale.com>
* rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-18-184/+184
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* rename CFG_ENV macros to CONFIG_ENVJean-Christophe PLAGNIOL-VILLARD2008-09-10-3/+3
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* rename CFG_ENV_IS_IN_FLASH in CONFIG_ENV_IS_IN_FLASHJean-Christophe PLAGNIOL-VILLARD2008-09-10-1/+1
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* cmd_mac: Move conditional compilation to MakefileJean-Christophe PLAGNIOL-VILLARD2008-09-10-1/+1
| | | | | | | finish remaning CFG_ID_EEPROM in CONFIG_ID_EEPROM start in commit ad8f8687b78c3e917b173f038926695383c55555 Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* FSL DDR: Convert SBC8641D to new DDR code.Kumar Gala2008-08-27-2/+4
| | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* drivers/mtd: Move conditional compilation to MakefileJean-Christophe PLAGNIOL-VILLARD2008-08-13-1/+1
| | | | | | rename CFG_FLASH_CFI_DRIVER to CONFIG_FLASH_CFI_DRIVER Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* POWERPC: 86xx - add missing CONFIG_HIGH_BATS to sbc8641d configBecky Bruce2008-08-11-0/+2
| | | | | Signed-off-by: Becky Bruce <becky.bruce@freescale.com> Acked-by: Jon Loeliger <jdl@freescale.com>
* Big white-space cleanup.Wolfgang Denk2008-05-21-12/+12
| | | | | | | | | | | This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de>
* 85xx/86xx: Rename ext_refrec to timing_cfg_3 to match docsKumar Gala2008-04-29-1/+1
| | | | | | | All the 85xx and 86xx UM describe the register as timing_cfg_3 not as ext_refrec. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 86xx: Convert sbc8641d to use libfdt.Jon Loeliger2008-02-18-7/+3
| | | | | | | | | | | | | | | This is the proper fix for a missing closing brace in the function ft_cpu_setup() noticed by joe.hamman <at> embeddedspecialties.com. The ft_cpu_setup() function in mpc8641hpcn.c should have been removed earlier as it was under the obsolete CONFIG_OF_FLAT_TREE, but was missed. Only, the sbc8641d was nominally still using it. It all got ripped out, and the funcality that was in ft_board_setup() was refactored to remove the CPU portions into the new file cpu/mpc86xx/fdt.c instead. Make sbc8641d use this now. Based loosely on an original patch from joe.hamman@embeddedspecialties.com Signed-off-by: Jon Loeliger <jdl@freescale.com>
* 86xx: Add reginfo commandBecky Bruce2008-01-24-0/+1
| | | | Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* 86xx: Convert sbc8641d to use new law setup code.Becky Bruce2008-01-24-0/+1
| | | | Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* sbc8641: remove unused OF_FLAT_TREE_MAX_SIZEKim Phillips2007-08-29-3/+0
| | | | | | | | this had slipped through the cracks, since the sbc board was added after I wrote the original patch to remove all these symbols, and before it was merged. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* Add CONFIG_HAS_ETH0 to all boards with TSECAndy Fleming2007-08-16-0/+1
| | | | | | | | | The 85xx code now relies on CONFIG_HAS_ETH0 to determine whether to update TSEC1's device-tree node, so we need to add it to all the boards with TSECs. Do this for 83xx and 86xx, too, since they will eventually do something similar. Signed-off-by: Andy Fleming <afleming@freescale.com>
* Define tsec flag values in config filesAndy Fleming2007-08-16-0/+4
| | | | | | | | | | The tsec_info structure and array has a "flags" field for each ethernet controller. This field is the only reason there are settings. Switch to defining TSECn_FLAGS for each controller in the config header, and we can greatly simplify the array, and also simplify the addition of future boards. Signed-off-by: Andy Fleming <afleming@freescale.com>
* 86xx: Fix lingering CFG_CMD_* references in sbc8641d.hJon Loeliger2007-08-15-3/+3
| | | | | | Remove a leftover in net/tftp.c while we're at it. Signed-off-by: Jon Loeliger <jdl@freescale.com>
* Modify SBC8641D to use new Freescale PCI routinesJoe Hamman2007-08-13-2/+7
| | | | | | | | PCI-Express sockets 1 and 2 verified working with Intel Pro/1000 PT adapter. Signed-off-by: Joe Hamman <joe.hamman@embeddedspecialties.com> Signde-off-by: Jon Loeliger <jdl@freescale.com>
* Add support for SBC8641D. Config files.Joe Hamman2007-08-10-0/+599
Add support for Wind River's SBC8641D reference board. Signed-off by: Joe Hamman <joe.hamman@embeddedspecialties.com> Acked-by: Wolfgang Denk <wd@denx.de> Acked-by: Jon Loeliger <jdl@freescale.com>
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