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path: root/include/configs/rk3288_common.h
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* rockchip: Drop SPL GPIO support for rk3288Simon Glass2016-05-27-1/+0
| | | | | | This is not currently used and saves a little over 1KB of SPL image size. Signed-off-by: Simon Glass <sjg@chromium.org>
* configs: Re-sync with cmd/KconfigTom Rini2016-04-25-7/+0
| | | | | | | Update the config.h and defconfig files for the commands that 8e3c036 converted over to Kconfig Signed-off-by: Tom Rini <trini@konsulko.com>
* include/configs: Whitespace fixupTom Rini2016-04-25-1/+0
| | | | | | | A number of moveconfig.py runs have left a instances of multiple empty lines in a row. Correct this to a single empty line. Signed-off-by: Tom Rini <trini@konsulko.com>
* configs: Re-sync almost all of cmd/KconfigTom Rini2016-04-25-5/+0
| | | | | | | | This syncs up the current cmd/Kconfig and include/configs/ files with the only exception being CMD_NAND. Due to how we have used this historically we need to take further care here when converting. Signed-off-by: Tom Rini <trini@konsulko.com>
* Move CONFIG_OF_LIBFDT to KconfigSimon Glass2016-03-14-1/+0
| | | | | | Move this option to Kconfig and tidy up existing boards. Signed-off-by: Simon Glass <sjg@chromium.org>
* armv7: add cacheline sizes where missingAlbert ARIBAUD2016-01-31-0/+2
| | | | | | | | | | Some armv7 targets are missing a cache line size declaration. In preparation for "arm: cache: Implement cache range check for v7" patch, add these declarations with the appropriate value for the target's SoC or CPU. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Reviewed-by: Tom Rini <trini@konsulko.com>
* rockchip: config: Enable the 'gpio' commandSimon Glass2016-01-21-0/+1
| | | | | | | Now that we have a pretty good GPIO driver, enable the 'gpio' command on all rockchip boards. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: Don't skip low-level initSimon Glass2016-01-21-1/+0
| | | | | | | At present the low-level init is skipped on rockchip. Among other things this means that the instruction cache is left disabled. Fix this. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: jerry: Enable the Chrome OS ECSimon Glass2016-01-21-0/+7
| | | | | | Turn on the EC and enable the keyboard. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: Use pwrseq for MMC start-up on jerrySimon Glass2016-01-21-0/+1
| | | | | | | This is defined in the device tree in Linux. Copy over the settings so that this can be used instead of hard-coding the reset line. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: move SYS_MALLOC_SIMPLE to mach-rockchip KconfigAriel D'Alessandro2015-12-01-4/+0
| | | | | | | | | | | | | | | | | Commit 1eb0c03c2198a7ec9de456b83dacdc4831b96cbf added SPL_SYS_MALLOC_SIMPLE Kconfig option and changed the way it is evaluated. Thus, the definitions of CONFIG_SYS_MALLOC_SIMPLE in rk3***_common.h board configs are now incorrect because CONFIG_SPL_BUILD is enabled so CONFIG_IS_ENABLED(SYS_MALLOC_SIMPLE) will look for SPL_SYS_MALLOC_SIMPLE instead of SYS_MALLOC_SIMPLE. This commit fix this enabling SPL_SYS_MALLOC_SIMPLE with the new Kconfig option by default in rockchip-mach. Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar> Acked-by: Simon Glass <sjg@chromium.org>
* rockchip: add config decide whether to build common.chuang lin2015-12-01-0/+3
| | | | | | | | some rockchips soc will not use uclass in SPL stage, so define config to decide whether to build common.c Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* rockchip: add timer driverhuang lin2015-12-01-1/+2
| | | | | | | | some rockchip soc will not include lib/timer.c in SPL stage, so implement timer driver for some soc can use us delay function in SPL. Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* rockchip: firefly: Save the environment on SD cardSjoerd Simons2015-12-01-1/+0
| | | | | | | | Save the environment on the SD card for Firefly in the empty space between the SPL and the u-boot image. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org>
* rockchip: Also load the initrd below 512MSjoerd Simons2015-12-01-0/+1
| | | | | | | | | Similar to load an fdt, when loading an initrd about the 512Mb mark things seem to break. For now force loading below 512Mb until the reason why this fails has been determined/solved. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org>
* sf: Move SPI flash drivers to defconfigBin Meng2015-11-25-1/+0
| | | | | | | | There are already Kconfig options for SPI flash drivers, but we have not moved them from config.h to defconfig files. This commit does this in a batch. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
* ns16550: move CONFIG_SYS_NS16550 to KconfigThomas Chou2015-11-21-1/+0
| | | | | | Move CONFIG_SYS_NS16550 to Kconfig, and run moveconfig.py. Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* arm, powerpc: select SYS_GENERIC_BOARDMasahiro Yamada2015-10-24-1/+0
| | | | | | | | | | | We have finished Generic Board conversion for ARM and PowerPC, i.e. all the boards have been converted except OpenRISC, SuperH, SPARC, which have not supported Generic Board framework yet. Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro defines in include/configs/*.h. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* rockchip: Add config_distro_bootcmd supportSjoerd Simons2015-09-02-0/+21
| | | | | | | | | | | Now that MMC works in U-Boot add config distro command support to start Linux in a standard fashion. One oddity here is that linux fails to load when the fdt is relocated to above 512MB, so set fdt_high to make sure it's loaded below that. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: Add basic support for firefly-rk3288Simon Glass2015-09-02-0/+97
The Firefly RK3288 is a suitable target board for initial mainline Rockchip support. It includes a good set of peripherals, a recent SoC and it is readily available. This adds only some basic files required to allow the baord to display a serial message in SPL and hang. Signed-off-by: Simon Glass <sjg@chromium.org>
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